Impact of Tellurium Precipitates in CdZnTe Substrates on MBE HgCdTe Deposition

State-of-the-art (112)B CdZnTe substrates were examined for near-surface tellurium precipitate-related defects. The Te precipitate density was observed to be fairly uniform throughout the bulk of the wafer, including the near-surface region. After a molecular beam epitaxy (MBE) preparation etch, exposed Te precipitates, small pits, and bumps on the (112)B surface of the CdZnTe wafer were observed. From near-infrared and dark field microscopy, the bumps and small pits on the CdZnTe surface are associated with strings of Te precipitates. Raised bumps are Te precipitates near the surface of the (112)B CdZnTe where the MBE preparation etch has not yet exposed the Te precipitate(s). An exposed Te precipitate sticking above the etched CdZnTe surface plane occurs when the MBE preparation etch rapidly undercuts a Te precipitate. Shallow surface pits are formed when the Te precipitate is completely undercut from the surrounding (112)B surface plane. The Te precipitate that was previously located at the center of the pit is liberated by the MBE preparation etch process.     

Molecular Beam Epitaxy Growth of HgCdTe on Large-Area Si and CdZnTe Substrates

This paper presents the status of HgCdTe growth on large-area Si and CdZnTe substrates at Raytheon Vision Systems (RVS). The different technological tools that were used to scale up the growth from 4 inch to 6 inch diameter on Si and from 4 cm × 4 cm to 8 cm × 8 cm on CdZnTe without sacrificing the quality of the layers are described. Extremely high compositional uniformity and low macrodefect density were achieved for single- and two-color HgCdTe layers on both Si and CdZnTe substrates. Finally, a few examples of detector and focal-plane array results are included to highlight the importance of high compositional uniformity and uniformly low macrodefect density of the epitaxial layers in obtaining high operability and low cluster outages in single- and two-color focal-plane arrays (FPAs).     

Progress in the Molecular Beam Epitaxy of HgCdTe on Large-Area Si and CdZnTe Substrates

This paper presents the progress in the molecular beam epitaxy (MBE) growth of HgCdTe on large-area Si and CdZnTe substrates at Raytheon Vision Systems. We report a very high-quality HgCdTe growth, for the first time, on an 8 cm × 8 cm CdZnTe substrate. This paper also describes the excellent HgCdTe growth repeatability on multiple 7 cm × 7 cm CdZnTe substrates. In order to study the percentage wafer area yield and its consistency from run to run, small lots of dual-band long-wave infrared/long-wave infrared triple-layer heterojunction (TLHJ) layers on 5 cm × 5 cm CdZnTe substrates and single-color double-layer heterojunction (DLHJ) layers on 6-inch Si substrates were grown and tested for cutoff wavelength uniformity and micro- and macrovoid defect density and uniformity. The results show that the entire lot of 12 DLHJ-HgCdTe layers on 6-inch Si wafers meet the testing criterion of cutoff wavelength within the range 4.76 ± 0.1 μm at 130 K and micro- and macrovoid defect density of ≤50 cm⁻² and 5 cm⁻², respectively. Likewise, five out of six dual-band TLHJ-HgCdTe layers on 5 cm × 5 cm CdZnTe substrates meet the testing criterion of cutoff wavelength within the range 6.3 ± 0.1 μm at 300 K and micro- and macrovoid defect density of ≤2000 cm⁻² and 500 cm⁻², respectively, on the entire wafer area. Overall we have found that scaling our HgCdTe MBE process to a 10-inch MBE system has provided significant benefits in terms of both wafer uniformity and quality.     

Characterization of HgCdTe Films Grown on Large-Area CdZnTe Substrates by Molecular Beam Epitaxy

Recent advances in growth of Hg_1?x Cd _x Te films on large-area (7 cm × 7.5 cm) CdZnTe (CZT) substrates is presented. Growth of Hg_1?x Cd _x Te with good uniformity on large-area wafers is achieved using a Riber 412 molecular beam epitaxy (MBE) tool designed for growth of Hg_1?x Cd _x Te compounds. The reactor is equipped with conventional CdTe, Te, and Hg sources for achieving uniform exposure of the wafer during growth. The composition of the Hg_1?x Cd _x Te compound is controlled in situ by employing a closed-loop spectral ellipsometry technique to achieve a cutoff wavelength (λ _co) of 14 μm at 78 K. We present data on the thickness and composition uniformity of films grown for large-format focal-plane array applications. The composition and thickness nonuniformity are determined to be <1% over the area of a 7 cm × 7.5 cm wafer. The films are further characterized by Fourier-transform infrared spectroscopy, optical microscopy, and Hall measurements. Additionally, defect maps show the spatial distribution of defects generated during the epitaxial growth of the Hg_1?x Cd _x Te films. Microdefect densities are in the low 10³ cm^?2 range, and void defects are below 500 cm^?2. Dislocation densities less than 5 × 10⁵ cm^?2 are routinely achieved for Hg_1?x Cd _x Te films grown on CZT substrates. HgCdTe 4k × 4k focal-plane arrays with 15 μm pitch for astronomical wide-area infrared imagers have been produced using the recently developed MBE growth process at Teledyne Imaging Sensors.     

HgCdTe外延用的CdZnTe衬底研制

阐述了ＣｄＺｎＴｅ衬底在红外焦平面阵列探测器研究中的重要性;概括了ＣｄＺｎＴｅ晶体生长的方法、原理和工艺步骤;分析了影响晶体质量（单晶面积、组分及均匀性、结晶完整性、光电特性）的因素,并提出了与质量相关的控制技术;介绍了ＣｄＺｎＴｅ衬底制备过程中,晶片处理的工艺和步骤（晶锭的定向切割、单晶划片、极性鉴别、磨抛、腐蚀）;报道了目前ＣｄＺｎＴｅ晶体的性能水平,晶片处理结果和ＣｄＺｎＴｅ的应用情况。     

Impact of CdZnTe Substrates on MBE HgCdTe Deposition

The highest sensitivity, lowest dark current infrared focal plane arrays (IRFPAs) are produced using HgCdTe on CdZnTe substrates. As-received state-of-the-art CdZnTe 6 × 6 and 7 × 7.5 cm substrates were analyzed using Nomarski phase contrast microscopy, Auger electron spectroscopy, scanning electron microscopy/energy dispersive spectroscopy, and scanning profilometry. On all CdZnTe substrates tested, we observed as-received large area macro-defect contamination. Using a defect specification limit of 50 contiguous defective pixels, we identified non-compliant 1280 × 720 12-μm pitch focal plane arrays due to as-received substrate macro-defect contamination. Using the above specification, up to 20% IRFPA wafer yield loss is due to state-of-the-art as-received CdZnTe substrate macro-contamination.     

液相外延碲镉汞薄膜表面的结晶类缺陷分析

利用扫描电镜、能谱分析、光学轮廓仪以及金相显微镜等测试手段对液相外延碲镉汞薄膜表面缺陷的形貌、成分和断面进行了分析,并研究了不同种类表面缺陷的特征及来源。结果表明,液相外延碲镉汞薄膜表面上存在的结晶类缺陷往往尺寸较大或成片分布,对后续器件产生明显影响。通过分析其成因可以发现,母液均匀性的提升是减少该类缺陷和提高碲镉汞薄膜质量的关键。     

碲锌镉衬底缺陷对液相外延碲镉汞薄膜结构的影响

采用红外显微镜、X射线双晶回摆衍射法、X射线貌相术对CdZnTe衬底中的沉淀相、亚结构、组分偏析等缺陷进行了研究,并对用此衬底液相外延的HgCdTe薄膜作了测试。结果显示：CdZnTe衬底中亚晶界处聚集的位错在外延生长中呈发散状向薄膜中延伸,造成了薄膜形成亚晶界和更大面积的由位错引起的晶格畸变应力区域,影响了薄膜结构的完整性。     

Study of Morphological Defects on Dual-Band HgCdTe on CdZnTe

HgCdTe dual-band epitaxial layers on lattice-matched CdZnTe substrates often have morphological defects. These defects, unlike normal void and microvoid defects, do not contain a polycrystalline core and, therefore, do not offer a good contrast for observation using optical and electron microscopes. This paper reports a way of identifying these defects by using a Nomarski optical microscopy image overlay on focused ion beam microscopy images for preparation of thin cross-sectional foils of these defects. Transmission electron microscopy was used to study the defect cross-sections to identify the origin and evolution of the morphological defects and their effect on the epitaxial layer. This paper reports cross-sectional analysis of four morphological defects of different shape and size.     

碲镉汞p-on-n双层异质结材料表面缺陷研究

对碲镉汞p-on-n双层异质结材料的表面缺陷进行了研究。材料表面缺陷会对后续器件的性能产生影响。利用光学显微镜观察外延完的材料表面,发现表面不规则块状缺陷和表面孔洞缺陷较为常见。使用共聚焦显微镜、扫描电子显微镜、能谱分析等测试手段分析发现,缺陷的形成原因是p型层生长过程中镉耗尽以及n型层生长过程中产生缺陷的延伸。     

长波碲镉汞薄膜外延用碲锌镉衬底筛选方法研究

主要报道了用于提高液相外延(Liquid Phase Epitaxy, LPE)长波碲镉汞薄膜质量的碲锌镉衬底筛选方法研究。通过对碲锌镉衬底的锌组分、红外透过率、沉淀/夹杂、位错密度、X射线形貌像和X射线衍射半峰宽等参数进行全面测试以及对外延后碲镉汞薄膜的X射线形貌像和X射线衍射半峰宽进行测试评估,发现目前X射线形貌像和锌组分是影响LPE长波碲镉汞薄膜用碲锌镉衬底的重要参数。结果表明,锌组分处于4.2%～4.8%之间、形貌像衍射强度高且均匀性好是长波碲镉汞薄膜外延用衬底的理想选择。     

Surface passivation of HgCdTe by CdZnTe and its characteristics

In this paper, we report the results of capacitance-voltage measurements conducted on several metal-insulator semiconductor (MIS) capacitors in which HgCdTe surfaces are treated with various surface etching and oxidation processes. CdZnTe passivation layers were deposited on HgCdTe surfaces by thermal evaporation after the surfaces were etched with 0.5?2.0% bromine in methanol solution, or thin oxide layers (t_ox ～ few ten Å) were grown on the surfaces, in order to investigate effects of the surface treatments on the electrical properties of the surfaces, as determined from capacitance-voltage (C-V) measurements at 80K and 1 MHz. A negative flat band voltage has been observed for MIS capacitors fabricated after etching of HgCdTe surfaces with bromine in methanol solutions, which is reported to make the surface Te-rich. It is inferred that residual Te on the surface is a positive charge, Te⁴⁺. C-V characteristics for MIS capacitors fabricated on oxide surfaces grown by air-exposure and electrolytic process have shown large hysteresis effects, from which it is inferred that imperfect and electrically active oxide compounds and HgTe particles near the surface become slow interface states.     

CdZnTe Substrate Surface Preparation Technology at ASELSAN,Inc. for Molecular Beam Epitaxy Growth of High Quality HgCdTe Epilayers

High quality CdZnTe substrates with 4% ZnTe mole fraction are used for epitaxial growth of HgCdTe infrared detector layers. Molecular Beam Epitaxy (MBE) growth of HgCdTe epilayers requires high quality surface layer with sub-nanometer surface roughness values as well. We report on the development of a CdZnTe substrate surface preparation process for MBE growth of high quality HgCdTe epilayers. Surface preparation processes were performed on both commercially available CdZnTe substrates and substrates obtained from in-house grown CdZnTe boules. We developed a multi-step substrate surface processing flow to achieve sub-nanometer surface roughness, low total thickness variation (TTV), and wax or slurry residue free CdZnTe substrate surfaces. Each process step was optimized with the aim of removing the subsurface damage caused by the previous process step; so that we reduce the amount of damaged layer needed to be etched prior to epitaxy. Our developed surface preparation process can be applicable to commercially available CdZnTe substrates with high surface roughness and high TTV. This process was also optimized for as-cut CdZnTe slices. We are capable of processing typically 25 mm?×?25 mm CdZnTe substrates with achievable surface roughness values (R_rms) down to below 0.5 nm.     

Influence of Cd-rich Annealing on Defects in Te-rich CdZnTe Materials

The influence of Cd-rich annealing at temperatures of 440–900 °C on the defect properties of Te-rich CdZnTe materials was studied. Cd-rich annealing at temperatures above the melting point of Te was confirmed to effectively reduce the size of Te-rich inclusions in the materials. However, dislocation multiplication occurred in the regions near Te-rich inclusions. Etch pit clusters were observed on the surfaces of annealed materials etched with Everson etchant. The etch pit clusters were much larger than the as-grown Te-rich inclusions. The dependence of the cluster size on that of the Te-rich inclusions and the annealing conditions was investigated. The density of etch pits in the normal region increased when the annealing temperature exceeded 750 °C. The mechanisms of the evolution of the Te-rich inclusions and the formation of new defects during the Cd-rich annealing are discussed.     

CdZnTe衬底沉积相成分分析

采用扫描电子显微镜技术对CdZnTe单晶片中的沉积相进行成分分析研究,结果表明通过红外显微系统观察到的CdZnTe晶片中常见的“放射状”沉积相和“链状”沉积相Cd含量富集,确认为Cd沉积相;另外,扫描电镜能谱仪对沉积相颗粒分析表明,CdZnTe晶体中的杂质元素易在Cd沉积相中富集。     

碲锌镉缓冲层液相外延技术的研究

文章报道了采用液相外延方法，在碲锌镉衬底上进行碲锌镉薄膜缓冲层生长的情况，并且采用X光双晶衍射仪、X光形貌仪、红外傅里叶光谱仪、二次离子质谱仪等手段对碲锌镉薄膜进行了表征，碲锌镉薄膜具有较好地组分及均匀性，晶体结构质量也较好。采用碲锌镉缓冲结构生长了碲镉汞液相外延片，其碲锌镉与碲镉汞薄膜界面附近的杂质得到了有效的控制。     

碲锌镉缓冲层液相外延技术的研究

文章报道了采用液相外延方法,在碲锌镉衬底上进行碲锌镉薄膜缓冲层生长的情况,并且采用X光双晶衍射仪、X光形貌仪、红外傅里叶光谱仪、二次离子质谱仪等手段对碲锌镉薄膜进行了表征,碲锌镉薄膜具有较好地组分及均匀性,晶体结构质量也较好.采用碲锌镉缓冲结构生长了碲镉汞液相外延片,其碲锌镉与碲镉汞薄膜界面附近的杂质得到了有效的控制.     

碲锌镉晶片中位错与Te沉淀的透射电子显微分析

采用透射电子显微镜对碲锌镉晶体材料的缺陷特性进行了分析，观察并研究了碲锌镉晶体中Te沉淀相形貌和Te沉淀周围的棱柱位错环. 认为棱柱位错的形成是由Te沉淀相的析出引起的，而沉淀相在基体中的析出与基体形成错配应力，又造成位错的增殖. Te沉淀与棱柱位错两种缺陷是相互依存的.     

Surface Structure of Molecular Beam Epitaxy (211)B HgCdTe

The as-grown molecular beam epitaxy (MBE) (211)B HgCdTe surface has variable surface topography, which is primarily dependent on substrate temperature and substrate/epilayer mismatch. Nano-ripple formation and cross-hatch patterning are the predominant structural features observed. Nano-ripples preferentially form parallel to the \( [\bar {1}11] \) and are from 0 Å to 100 Å in height with a wavelength between 0.1 μm and 0.8 μm. Cross-hatch patterns result from slip dislocations in the three {111} planes intersecting the (211) growth surface. The cross-hatch step height is 4 ± 1 Å (limited data set). This indicates that only a bi-layer slip (Hg/Cd + Te) in the {111} slip plane occurs. For the deposition of MBE (211)B HgCdTe/CdTe/Si, the reorientation of multiple nano-ripples coalesced into “packets” forms cross-hatch patterns. The as-grown MBE (211)B CdTe/Si surface is highly variable but displays nano-ripples and no cross-hatch pattern. Three types of defects were observed by atomic force microscopy (AFM): needle, void/hillock, and voids.