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1.
Lee J.-L. Wei L. Tanigawa S. Nakagawa T. Ohta K. Lee J.Y. 《Electron Devices, IEEE Transactions on》1992,39(1):176-183
The effects of point defects on the electrical activation of Si-implanted GaAs during rapid thermal annealing were investigated using slow positron beam, cross-sectional transmission electron microscopy, and Hall measurements. The increase of the Ga vacancy concentration in the GaAs substrate induced by the SiO2 cap layer on the substrate during annealing was observed to decrease the activation efficiency and the number of extrinsic stacking faults via the recombination of interstitials with vacancies. It was found that the efficiency of the carrier creation is not dependent upon the Ga vacancy concentration during the rapid thermal annealing of Si-implanted GaAs. Hence, it is proposed that the electrical activation of Si-implanted GaAs is not due to implantation-induced vacancies but to the self-exchange of interstitial Si atoms with the host Ga substitutional atoms 相似文献
2.
N. I. Katsavets G. M. Laws I. Harrison E. C. Larkins T. M. Benson T. S. Cheng C. T. Foxon 《Semiconductors》1998,32(10):1048-1053
A detailed study of the effect of rapid thermal annealing in a N2 or Ar atmosphere on the properties of thin GaN layers grown by molecular-beam epitaxy on sapphire substrates was performed.
After rapid thermal annealing, an enhancement of the crystal quality of such films was observed. Low-temperature photoluminescence
measurements revealed a substantial increase in impurity recombination near the fundamental absorption edge after a rapid
high-temperature anneal in a nitrogen atmosphere. A significant decrease in the impurity photoluminescence of the GaN films
with protective SiO2 coatings was observed following the anneals.
Fiz. Tekh. Poluprovodn. 32, 1175–1180 (October 1998) 相似文献
3.
Kazior T.E. Brierley S.K. Piekarski F.J. 《Semiconductor Manufacturing, IEEE Transactions on》1991,4(1):21-25
The results of experiments performed to evaluate the use of a commercially available rapid thermal annealer (RTA) with a graphite susceptor for capless rapid thermal annealing to activate implants in GaAs are reported. The interior of the susceptor was easily charged with As by annealing a sacrificial GaAs wafer. Wafers annealed face up in the charged susceptor showed no evidence of surface degradation (due to preferential loss of As) and no decrease in implant activation (peak doping) when compared to dielectric (SiO2) capped anneals. Over 50 wafers have been annealed without recharging the susceptor. In addition, slip on 3-in wafers was almost completely eliminated due to the reduction of radial temperature gradients. It is concluded that capless RTA in a commercially available graphite susceptor appears to be a viable annealing technique for activating implants in GaAs and related III-V materials and is suitable for a production environment 相似文献
4.
《Electron Device Letters, IEEE》1986,7(1):13-15
Be-implanted GaAs are annealed by rapid thermal annealing (RTA) using halogen lamps. Electrical properties of the annealed GaAs are investigated, emphasizing those at 77K for application to the p+-layer of Be-implanted WSix -gate self-aligned two-dimensional hole gas (2- DHG) FET. An electrical activation of 90 percent (for 2.0 × 1013cm-2) or 80 percent (for 2.2 × 1014cm-2) is obtained. An annealing temperature dependence of carrier freezing at 77K is observed for higher dose samples. The phenomenon is attributed to the redistribution of impurity atoms near the high-concentration peak. 相似文献
5.
《Electron Devices, IEEE Transactions on》1987,34(3):548-553
Rapid thermal annealing is used to form cobalt silicide directly on unimplanted as well as B-, As-, and P-implanted wafers. The films are characterized by sheet resistance, X-ray diffraction, SEM, TEM, SIMS, and contact resistance measurements. The direct silicidation of Co on Si by rapid thermal annealing yields smooth low-resistivity films with minimal dopant redistribution. 相似文献
6.
N. A. Sobolev A. M. Emel’yanov V. I. Sakharov I. T. Serenkov E. I. Shek D. I. Tetel’baum 《Semiconductors》2007,41(5):537-539
Implantation of silicon ions with an energy of 100 keV at a dose of 1 × 1017 cm?2 into n-type floatzone Si does not lead to the formation of an amorphous layer. Subsequent annealing in a chlorine-containing atmosphere at 1100°C gives rise to dislocation-related luminescence. The intensity of the dominant D1 line peaked at a wavelength of ~1.54 μm grows as the annealing time is increased from 15 to 60 min. 相似文献
7.
Close contact rapid thermal annealing of semi-insulating GaAs:Cr implanted with Si, Si + Al, and Si + P has been studied using
variable temperature Hall effect measurements and low temperature (4.2K) photoluminescence (PL) spectroscopy. Isochronal (10
sec) and isothermal (1000° C) anneals indicate that As is lost from the surface during close contact annealing at high anneal
temperatures and long anneal times. Samples which were implanted with Si alone show maximum activation at an annealing temperature
of 900° C, above which activation efficiency decreases. Low temperature Hall and PL measurements indicate that this reduced
activation is due to increasing auto-compensation of Si donors by Si acceptors at higher anneal temperatures. However, co-implantation
of column V elements can increase the activation of Si implants by reducing Si occupancy of As sites and increasing Si occupancy
of Ga sites, and therebyoffset the effects of As loss from the surface. For samples implanted with Si + P, activation increases continuously up to a maximum at an anneal temperature
of 1050° C, and both low temperature Hall and PL measurements indicate that autocompensation does not increase in this case
as the anneal temperature increases. In contrast, samples implanted with Si + Al show very low activation and very high compensation
at all anneal temperatures, as expected. The use of column V co-implants in conjunction with close contact RTA can produce
excellent donor activation of Si implanted GaAs. 相似文献
8.
We report the use of tungsten-halogen lamps for rapid (−10 s) thermal annealing of ion-implanted (100) GaAs under AsH3/Ar and N2 atmospheres. Annealing under flowing AsH3/Ar was carried out without wafer encapsulation. Rapid capless annealing activated implants in GaAs with good mobility and
surface morphology. Typical mobilities were 3700–4500 cm2/V-s for n-layers with about 2×1017cm−3 carrier concentration and 50–150 cm2/v-s for 0.1–5xl019 cm−3 doped p-layers. Rapid thermal annealing was performed in a vertical quartz tube where different gases (N2, AsH3/H2, AsH3/Ar) can be introduced. Samples were encapsulated with SiO when N2 was used. Tungsten-halogen lamps of 600 or 1000 W were utilized for annealing GaAs wafers ranging from 1 to 10 cm2 in area and 0.025 to 0.040 cm in thickness. The transient temperature at the wafer position was monitored using a fine thermocouple.
We carried out experiments for energies of 30 to 200 keV, doses of 2×1012 to 1×1015 cm−2, and peak temperatures ranging from 600 to 1000‡C. Most results quoted are in the 700 to 870‡C temperature range. Data on
implant conditions, optimum anneal conditions, electrical characteristics, carrier concentration profiles, and atomic profiles
of the implanted layers are described.
Presented at the 25th Electronic Materials Conference, Burlington, VT, June 22, 1983. 相似文献
9.
Quemerais A. Jezequel G. L'Haridon H. Favennec P.N. Salvi M. 《Electronics letters》1990,26(15):1119-1122
The crystalline order and stoichiometry of the near surface of GaAs and InP substrates after rapid thermal annealing using a silicon wafer as a protecting cap have been deduced from angle resolved X-ray photo-emission measurements. A monolayer of As or P appears to be enough to prevent further material decomposition. For implanted samples (up to 10/sup 14//cm/sup 2/ Si), the crystalline order is restored after the rapid anneal (without any important stoichiometry modification).<> 相似文献
10.
Post-growth annealing is shown to improve the laser diode quality of GaAs/AlGaAs graded-index separate confinement heterostructure
quantum well laser diode structures grown at a nonoptimal substrate temperature lower than 680°C by molecular beam epitaxy.
Reduction by a factor of up to three in the threshold current was accompanied by a reduction in the interface trap density.
The reduced threshold current is still higher than that of laser diodes grown at the optimal temperatures which are between
680 and 695°C. The improvement in laser diode performance is ascribed to the reduction of interface nonradiative recombination
centers. 相似文献
11.
Hsieh T.Y. Jung K.H. Kwong D.L. Hitzman C.J. Brennan R. 《Electron Devices, IEEE Transactions on》1992,39(1):203-205
The authors have demonstrated that epitaxial growth temperatures can be lowered by dopant incorporation using rapid thermal processing chemical vapor deposition. Heavily As- and B-doped epitaxial layers with very abrupt dopant transition profiles and relatively uniform carrier distributions have been grown at 800°C. The film quality and defect formation were strongly dependent on the electrically active dopant concentration. The defect density as a function of electron concentration shows a sharp transition at 3×1018 cm-3 for As-doped epitaxy. For B-doped epitaxy, the film quality was monocrystalline with smooth surface morphology for hole concentrations above 5×1019 cm-3 相似文献
12.
H. Kanber M. Feng V. K. Eu R. C. Rush W. B. Henderson 《Journal of Electronic Materials》1982,11(6):1083-1114
We compare the chemical profiles of Cr, Mn, Si and Se with the electron concentration profiles in Si, Se and S implanted semi-insulating
Cr-O doped bulk GaAs substrates and undoped VPE buffer layers annealed with and without a SiO2 encapsulant in a H2-As4 atmosphere. A higher activation efficiency in the net electron concentration and the gateless saturated channel current is
measured for SiO2 encapsulated wafers annealed under arsine overpressure than for capless annealed ones using Cr-O doped bulk GaAs substrates.
On the other hand, the net donor concentration peak is higher for implanted buffer epi layers capless annealed under arsine
overpressure than for SiO2 encapsulated ones. Secondary ion mass spectrometry (SIMS) studies of the Cr decoration of the implant damage indicate that
the damage from the 100 keV Si implant anneals out at 840°C while a temperature of 900°C is required to anneal out the 260
keV Se implant damage. An explanation of these differences is provided using an impurity redistribution model and charge neutrality
considerations. Excellent Hall electron mobilities at liquid nitrogen temperature of 5400–9200 cm2/V-sec are measured for Si-implanted buffer epi substrates. 相似文献
13.
《Electron Device Letters, IEEE》1987,8(5):185-187
The suitability of MBE-grown GaAs layers on Si substrates has been studied for ion-implanted GaAs MESFET technology. The undoped as-grown GaAs layers had a carrier concentration below 1014cm-3. Uniform Si ion implants into 4-µm-thick GaAs layers on Si were annealed at 900°C for 10 s, using a rapid-thermal-annealing (RTA) system. Both the activation and the doping profile were similar to those obtained in bulk semi-insulating GaAs under similar conditions. The SIMS profiles of Si and As atoms near the GaAs/Si heterointerface were identical before and after the RTA process, indicating negigible interdiffusion during the implant activation. Dual implants of a shallow n+ layer and an n-channel layer were used to fabricate GaAs MESFET's with a recess-gate technology. Selective oxygen ion implantation was used for device isolation. The maximum transconductance obtained was 135 mS/ mm compared to typical values of 150-180 mS/mm obtained in our laboratory on GaAs substrates in similar device structures. 相似文献
14.
Aluminum nitride films were deposited, at 200 °C, on silicon substrates by RF sputtering. Effects of rapid thermal annealing on these films, at temperatures ranging from 400 to 1000 °C, have been studied. Fourier transform infrared spectroscopy (FTIR) revealed that the characteristic absorption band of Al–N, around 684 cm−1, became prominent with increased annealing temperature. X-ray diffraction (XRD) patterns exhibited a better, c-axis, (0 0 2) oriented AlN films at 800 °C. Significant rise in surface roughness, from 2.1 to 3.68 nm, was observed as annealing temperatures increased. Apart from these observations, micro-cracks were observed at 1000 °C. Insulator charge density increased from 2×1011 to 7.7×1011 cm−2 at higher temperatures, whereas, the interface charge density was found minimum, 3.2×1011 eV−1cm−2, at 600 °C. 相似文献
15.
By using halogen lamps, we have annealed implanted Si wafers and recrystallised deposited poly-Si. A transient anneal was accomplished with a good uniformity on 4 in Si wafers with no redistribution of the dopant profile. By using a shaped spot, we obtained ?100? single-crystal Si, over an area 2 mm by several centimetres, on a SiO2 layer grown on a Si substrate, without seeding. 相似文献
16.
In this study, we describe the effects of rapid thermal annealing on the electrical and optical properties of modulation-doped
quantum wells (MDQWs). The sheet carrier concentration in MDQW structures which have been annealed in contact with a piece
of GaAs tends to decrease with increasing annealing time due to Si auto-compensation in the doped AlGaAs regions. The high
energy cut-off point of 4.2 K PL spectra, which occurs at the Fermi energy, and the 77 K PL linewidth are accurate measures
of sheet carrier density. These two parameters track variations in carrier density produced by annealing. Photoluminescence
spectra also provide additional insight into annealing-induced changes such as Si migration, which causes a degradation in
the mobility of the two-dimensional electron gas. 相似文献
17.
《Electron Device Letters, IEEE》1987,8(5):205-207
Rapid thermal annealing (RTA) of Mg-implanted GaAS/ GaAlAs to contact the base layer of heterojunction bipolar transistors (HBT's) is reported. Annealing cycles with time durations of a few seconds and temperature in the range of 850-950°C have been tested. Electrical properties of the annealed samples have been investigated using an electrochemical measurement technique. It was found that hole concentrations as high as 4 × 1019cm-3and electrical activities up to 70 percent can be obtained when high doses of Mg are implanted. This high doping level is very important since the final objective is to realize a contact region to the p-type base layer of HBT's through a highly doped n+ GaAs contact layer. 相似文献
18.
This paper describes the Si-doping of GaAs that was grown using the AsCl3:H2:GaAs, Ga Chemical vapor deposition process. The doping sources were AsCl3:SiCl4 liquid solutions which proved to be highly reproducible for Si doping within the range, 1×1O16 to 2×1019 cm?3. Incorporation of Si into the GaAs apparently occurs under near equilibrium conditions. This point is considered in detail and the consequences experimentally utilized to grow n, n+ bilayers using a single AsCl3:SiCl4 doping solution. Si impurity profiles based upon differential capacitance and SIMS data are presented. These can be very abrupt for n, n+ structures with order of magnitude changes occurring within 500 Å. For the 1×1016 to 8×l018 cm?3 doped samples the mobilities at 78 and 298°K are comparable to the higher values reported for GaAs thin films grown by CVD. Power FET devices made from this material have demonstrated an output density of 0.86 watts/mm at 10 GHz. 相似文献
19.
Belyaev A. E. Boltovets N. S. Ivanov V. N. Konakova R. V. Kladko V. P. Kudryk Ya. Ya. Lebedev A. A. Milenin V. V. Sheremet V. N. 《Semiconductors》2009,43(8):1086-1091
Semiconductors - The effect of rapid thermal annealing on the structural and physical properties of Au-(Ti, Zr)B x -GaN(SiC) contacts and diode structures on their basis is investigated. The... 相似文献
20.
《Electron Devices, IEEE Transactions on》1992,39(1):50-55
The device-related effects of rapid thermal annealing (RTA) on the electrical and optical properties of planar-doped AlGaAs/InGaAs/GaAs high-electron-mobility transistor structures grown by molecular beam epitaxy were investigated. Specifically, electrical and optical characterization techniques such as capacitance versus voltage, current versus voltage, Hall effect, and photoluminescence have been applied to study the effects that typical III-V compound semiconductor rapid thermal processes (RTPs) have on the properties of pseudomorphic AlGaAs/InGaAs/GaAs structures for two different values of In mole fraction content. The effect and stability of the indium mole fraction on both heterostructure and device integrity with respect to RTA schedule has been investigated in detail 相似文献