一种开关电容带隙基准电压源

设计了一款高精度、低线性调整率的开关电容带隙基准电压源。分析了NMOS开关高温漏电流对基准输出电压精度的影响,提出了一种高温漏电补偿电路。偏置电路采用多个共源共栅结构的电流镜,增大了从电源到输出的阻抗,降低了基准电压的线性调整率。利用虚拟管抵消了开关关断时带来的沟道电荷注入效应和时钟馈通效应,提高了基准输出电压的精度。该电路基于0.35μm CMOS工艺设计,仿真结果表明,基准源能稳定输出1.1 V电压,建立时间为5.9μs;在-55～125℃,温度系数为1.38×10^-5/℃;27℃下,在2.7～5 V电源电压范围内,线性调整率为0.9 mV/V;电路总静态电流为35.1μA。     

一种输出可调的高精度开关电容基准电压源

设计了一种输出可调的高精度开关电容基准电压源,与现有基准电压源相比,该电路可在圆片阶段利用熔丝修调校正技术对基准电压进行修正,降低芯片制造成本。电路采用开关电容结构降低运放输入失调电压对电路的影响,具有高精度的特点。将该基准电压源应用于一款语音编解码芯片,测试结果表明,其在25℃下输出基准电压为2.355V,在-40～80℃范围内温度系数为19.46×10^-6/℃。     

一种具有大电流驱动能力的低温漂带隙基准电压源

基于XFAB 0.6 μm CMOS工艺,设计了一种具有大电流驱动能力的低温度系数带隙基准电压源。通过设置不同温度系数的电阻的比值,实现带隙基准的2阶曲率补偿。采用新的电路结构,使基准源具有驱动10 mA以上负载电流的能力。经过Hspice仿真验证,常温基准输出电压为2.496 V,-55 ℃~125 ℃温度范围内的温度系数是3.1×10-6/℃;低频时,电源电压抑制比为-77.6 dB;供电电压在4~6 V范围内,基准输出电压的线性调整率为0.005%/V;负载电流在0~10 mA范围内,基准输出电压波动为219 μV,电流源负载调整率为0.022 mV/mA。     

一种高精确度低功耗无片外电容LDO设计

设计了一种片上集成的高精确度、低功耗、无片外电容的低压差线性稳压器(LDO)。采用一种新型高精确度、带隙基准电压源电路降低输出电压温漂系数;采用零功耗启动电路和支路较少的摆率增强模块降低功耗,该电路采用CSMC 0.5 μm CMOS工艺。经过Cadence Spectre仿真验证,输出电压为3.3 V,在3.5~5.5 V范围内变化时,线性调整率小于0.3 mV/V,负载调整率小于0.09 mV/mA,输出电压在-40~+150 ℃范围内温漂系数达10 ppm/℃,整个LDO消耗17.7 μA的电流。     

连续输出全集成开关电容带隙基准电路

本文提出了一种新型的开关电容带隙基准电路。电路采用双通道开关电容求和电路,能够连续输出基准电压,同时采用输出缓冲电路降低电压过冲,无需片外滤波电容。本设计采用NEC 0.35μm CMOS工艺,使用Hspice仿真软件对电路进行仿真。仿真结果表明:在典型参数情况下,该电路能够连续输出过冲为50μV的基准电压,在-20℃～80℃范围内,其输出电压的温度系数为15.4ppm/℃。     

一种带2阶温度补偿的负反馈箝位CMOS基准电压源

根据带隙基准电压源工作原理,设计了一种带2阶温度补偿的负反馈箝位CMOS基准电压源。不同于带放大电路的带隙基准电压源,该基准电压源不会受到失调的影响,采用的负反馈箝位技术使电路输出更稳定。加入了高阶补偿电路,改善了带隙基准电压源的温漂特性。电路输出阻抗的增大有效提高了电源抑制比。基于0.18 μm CMOS 工艺,采用Cadence Spectre软件对该电路进行了仿真,电源电压为2 V,在-40 ℃~110 ℃温度范围内温度系数为4.199 ×10-6/℃,输出基准电压为1.308 V,低频下电源抑制比为78.66 dB,功耗为120 μW,总输出噪声为0.12 mV/Hz。     

一种高精度二阶温度补偿带隙基准电路设计

基于通过负温度系数电压控制工作于亚阈值区MOS管栅压产生随温度变化的补偿电流原理,采用中芯国际0.18μm CMOS工艺,设计了一款高精度二阶温度补偿带隙基准电压源。测试结果表明,当电源电压大于1.6V时,电路能够产生稳定的1.21V输出电压;在电源电压为1.6~3.4V,-20~135℃温度范围内,最小温度系数为2×10-6/℃,最大温度系数为3.2×10-6/℃;当电源电压在1.6~3.4V之间变化时,输出电压偏差为0.6mV,电源调整率为0.34mV/V;在1.8V电源电压下,电源抑制比为69dB,因此能够适应于高精度基准源。     

一种低电压低功耗高PSRR CMOS基准电路

设计了一种工作在亚阈值区的高精度、低电压、低功耗CMOS基准电路。电路采用0.18 μm CMOS工艺实现,在1.2 V电源电压下,输出202 mV的基准电压,在-40 ℃~130 ℃范围内的温度系数为6.5×10-5/℃,消耗2.46 μA电流。电源电压从1.1 V变化到3.6 V时,输出基准电压仅变化0.336 mV。该基准电路的电源电压抑制比(PSRR)在直流处达到-93 dB,10 MHz处达到-63 dB。设计了一种多路快速启动电路,只需13 μs即可完成启动。利用高阈值电压晶体管与普通阈值电压晶体管的V_th之差作为负温度系数电压源,使输出基准电压对工艺角不敏感。     

一种高性能的亚阈值CMOS电压基准

基于0.18 μm CMOS工艺设计了一种高性能的亚阈值CMOS电压基准。提出了一个电压减法电路,将两个具有不同阈值电压且工作在亚阈值区晶体管的栅源电压差作为电压基准输出。所提出的电压减法电路还可以很好地消除电源电压变化对输出基准的影响。后仿仿真结果表明,所设计的电压基准在0.55~1.8 V电源电压范围内,线性灵敏度为0.053%/V~0.121%/V;在-20 ℃~80 ℃范围内,温度系数为9.5×10-6/℃~3.49×10-5/℃;在tt工艺角、0.55 V电源电压下,电源抑制比为-65 dB@100 Hz,功耗为3.7 nW。芯片面积为0.008 2 mm²。该电路适用于能量采集、无线传感器等低功耗应用。     

一种新型的CMOS亚阈值低功耗基准电压源

利用工作于亚阈值的NMOS器件,产生两个负温度系数的电压源,然后将两个电压源作差,产生稳定的基准电压输出.整体电路采用HJTCl80 nrn标准CM（）S工艺实现.仿真结果表明,基准源输出电压为220 mV,在一25℃到100℃的温度范围内的温度系数为68×10^-6/ C.电路的最小供电电压可低至O.7 V,在供电电压O.7～4V范围内的线性调整率为1.5 mV/V.无滤波电容时,1 kHz的电源抑制比为-56 dB室温下,1.O V电压供电时,电路总体功耗为3.7μW.版图设计后的芯片核心面积为O.02 mm².本文设计的电压源适用于低电压低功耗的条件.     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.     

An improved parallel thinning algorithm with two subiterations

The parallel thinning algorithm with two subiterations is improved in this paper. By analyzing the notions of connected components and passes, a conclusion is drawn that the number of passes and the number of eight-connected components are equal. Then the expression of the number of eight-connected components is obtained which replaces the old one in the algorithm. And a reserving condition is proposed by experiments, which alleviates the excess deletion where a diagonal line and a beeline intersect. The experimental results demonstrate that the thinned curve is almost located in the middle of the original curve connectivelv with single pixel width and the processing speed is high.     

Theoretical analysis of the relationship between the Brillouin gain coefficient and the strain in the optical-fiber sensors

The relation between the power of the Brillouin signal and the strain is one of the bases of the distributed fiber sensors of temperature and strain. The coefficient of the Bfillouin gain can be changed by the temperature and the strain that will affect the power of the Brillouin scattering. The relation between the change of the Brillouin gain coefficient and the strain is thought to be linear by many researchers. However, it is not always linear based on the theoretical analysis and numerical simulation. Therefore, errors will be caused if the relation between the change of the Brillouin gain coefficient and the strain is regarded as to be linear approximately for measuring the temperature and the strain. For this reason, the influence of the parameters on the Brillouin gain coefficient is proposed through theoretical analysis and numerical simulation.     

Novel fiber-optical interferometer with miniaturized probe for in-hole measurements

Today, micro-system technology and the development of new MEMS （Micro-Electro-Mechanical Systems） are emerging rapidly. In order for this development to become a success in the long run, measurement systems have to ensure product quality. Most often, MEMS have to be tested by means of functionality or destructive tests. One reason for this is that there are no suitable systems or sensing probes available which can be used for the measurement of quasi inaccessible features like small holes or cavities. We present a measurement system that could be used for these kinds of measurements. The system combines a fiber optical, miniaturized sensing probe with low-coherence interferometry, so that absolute distance measurements with nanometer accuracy are possible.     

Development of the readout system for waveguide multilayer optical card

Waveguide multilayer optical card （WMOC） is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling ＆ processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic （VB） language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.     

Study of waveguide coupling efficiency in hybrid silicon lasers

This paper presents a new method to increase the waveguide coupling efficiency in hybrid silicon lasers. We find that the propagation constant of the InGaAsP emitting layer can be equal to that of the Si resonant layer through improving the design size of the InP waveguide. The coupling power achieves 42% of the total power in the hybrid lasers when the thickness of the bonding layer is 100 nm. Our result is very close to 50% of the total power reported by Intel when the thickness of the thin bonding layer is less than 5 nm. Therefore, our invariable coupling power technique is simpler than Intel＇s.     

A method for calculating the center position of collimated light

It is a key problem to accurately calculate beam spots＇ center of measuring the warp by using a collimated laser. A new method, named double geometrical center method （DGCM）, is put forward for the first time. In this method, a plane wave perpendicularly irradiates an aperture stop, and a charge couple device （CCD） is employed to receive the diffraction-beam spots, then the geometrical centers of the fast and the second diffraction-beam spots are calculated respectively, and their mean value is regarded as the center of datum beam. In face of such adverse instances as laser intension distributing defectively, part of the image being saturated, this method can still work well. What＇s more, this method can detect whether an unacceptable error exits in the courses of image receiving, processing and calculating. The experimental results indicate the precision of this method is high.     

Collinear phase-matching study of terahertz-wave generation via difference frequency mixed in GaAs and Inp

The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.     

Effects of the alloy compositions on the phonon-polaritons in ternary mixed crystals

Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.