A 10–35 GHz Low Power Bulk-DrivenMixer Using 0.13 $mu$m CMOS Process

10-35 GHz doubly balanced mixer using a 0.13-mum CMOS foundry process is presented in this letter. Using the bulk-driven topology, the number of transistors of the doubly balanced mixer is reduced; thus the mixer can achieve a low supply voltage and low power consumption. This bulk-driven mixer exhibits a measured conversion gain of -1 plusmn 2 dB from 10 to 35 GHz of radio frequency (RF) with a fixed intermediate frequency (IF) of 100 MHz. The measured local oscillation (LO) to IF and RF-IF isolations are better than 30 dB. The chip area of the mixer is 0.6 times 0.4 mm². The total power consumption included output buffer is only 6 mW.     

宽中频CMOS下变频器单片

该文介绍了一种工作于毫米波频段的宽中频(IF)下变频器。该下变频器基于无源双平衡的设计架构,片上集成了射频(RF)和本振(LO)巴伦。为了优化无源下变频器的增益、带宽和隔离度性能,电路设计中引入了栅极感性化技术。测试结果表明,该下变频器的中频带宽覆盖0.5～12 GHz。在频率为30 GHz、幅度为4 dBm的LO信号驱动下,电路的变频增益为–8.5～–5.5 dB。当固定IF为0.5 GHz、LO幅度为4 dBm时,变频增益随25～45 GHz的RF信号在–7.9～–5.9 dB范围内变化,波动幅度为2 dB。LO-IF, LO-RF, RF-IF的隔离度测试结果分别优于42, 50, 43 dB。该下变频器芯片采用TSMC 90 nm CMOS工艺设计,芯片面积为0.4 mm2。     

35–65-GHz CMOS Broadband Modulator and Demodulator With Sub-Harmonic Pumping for MMW Wireless Gigabit Applications

Sub-harmonic modulator and demodulator are presented in this paper using 0.13-mum standard CMOS technology for millimeter-wave (MMW) wireless gigabit direct-conversion systems. To overcome the main problem of local oscillator (LO) leakage in direct-conversion systems, the sub-harmonically pumped scheme is selected in this mixer design. An embedded four-way quadrature divider is utilized in the sub-harmonic Gilbert-cell design to generate quadrature-phases LO signals at MMW frequency. For broadband applications, a broadband matching design formula is provided in this paper to extend the operational frequency range from 35 to 65 GHz. To improve the flatness of conversion loss at high frequency, high-impedance compensation lines are incorporated between the transconductance stage and LO switching quad of the Gilbert-cell mixer to compensate the parasitic capacitance. The sub-harmonic modulator and demodulator exhibit 6 plusmn1.5 dB and 7.5 plusmn1.5 dB measured conversion loss, respectively, from 35 to 65 GHz. For MMW wireless gigabit applications, the gigabit modulation signal test is successfully performed through the direct-conversion system in this paper. To our knowledge, this is the first demonstration of the MMW CMOS sub-harmonic modulator and demodulator that feature broadband and gigabit applications.     

Novel Miniature and Broadband Millimeter-Wave Monolithic Star Mixers

In this paper, three monolithic star mixers using a new miniature dual balun are proposed. The first one is a double spiral transformer mixer, and the second one is a trifilar transformer mixer. Both of these are fabricated using a commercial GaAs pseudomorphic HEMT process. The third is a 3-D transformer mixer, which is fabricated using a commercial CMOS process. These mixers exhibit bandwidths over 25-45 GHz (57%) with local oscillator isolations better than 20 dB. These star mixers are smaller than (lambda/6timeslambda/6) for the mixer core area. Compared with traditional star mixers, these mixers demonstrate 80% size reduction, and achieve good performance with the smallest chip size among all star mixers using monolithic microwave integrated circuit processes.     

A K-band down-conversion mixer with 1.4-GHz bandwidth in 0.13-/spl mu/m CMOS technology

A low power and low voltage down conversion mixer working at K-band is designed and fabricated in a 0.13/spl mu/m CMOS logic process. The mixer down converts RF signals from 19GHz to 2.7GHz intermediate frequency. The mixer achieves a conversion gain of 1dB, a very low single side band noise figure of 9dB and third order intermodulation point of -2dBm, while consuming 6.9mW power from a 1.2V supply. The 3-dB conversion gain bandwidth is 1.4GHz, which is almost 50% of the IF. This mixer with small frequency re-tuning can be used for ultra-wide band radars operating in the 22-29GHz band.     

A K-Band High-Gain Down-Conversion Mixer in 0.18 $mu$m CMOS Technology

A high gain CMOS down conversion mixer with a gain enhancement technique is presented. This technique includes negative resistance generation, parasitic capacitance cancellation and current-injection. These are implemented with an additional circuitry. This mixer has a conversion gain of 9.12 dB, input 1 dB compression point of -11 dBm at 24 GHz, while consuming 16.2 mW from 1.8 V supply. Between 22 and 26 GHz, the LO-to-RF and RF-to-LO isolations are better than 35 dB and 26 dB, respectively.     

InAlAs/InGaAs HBT X-band double-balanced upconverter

We report on an InAlAs/InGaAs HBT Gilbert cell double-balanced mixer which upconverts a 3 GHz IF signal to an RF frequency of 5-12 GHz. The mixer cell achieves a conversion loss of between 0.8 dB and 2.6 dB from 5 to 12 GHz. The LO-RF and IF-RF isolations are better than 30 dB at an LO drive of +5 dBm across the RF band. A pre-distortion circuit is used to increase the linear input power range of the LO port to above +5 dBm. Discrete amplifiers designed for the IF and RF frequency ports make up the complete upconverter architecture which achieves a conversion gain of 40 dB for an RF output bandwidth of 10 GHz. The upconverter chip set fabricated with InAlAs/InGaAs HBT's demonstrates the widest gain-bandwidth performance of a Gilbert cell based upconverter compared to previous GaAs and InP HBT or Si-bipolar IC's     

A 0.3-25-GHz ultra-wideband mixer using commercial 0.18-/spl mu/m CMOS technology

An ultra-wideband mixer using standard complementary metal oxide semiconductor (CMOS) technology was first proposed in this paper. This broadband mixer achieves measured conversion gain of 11 /spl plusmn/ 1.5 dB with a bandwidth of 0.3 to 25 GHz. The mixer was fabricated in a commercial 0.18-/spl mu/m CMOS technology and demonstrated the highest frequency and bandwidth of operation. It also presented better gain-bandwidth-product performance compared with that of GaAs-based HBT technologies. The chip area is 0.8 /spl times/ 1 mm/sup 2/.     

K-Band CMOS Sub-Harmonic Resistive Mixer With a Miniature Marchand Balun on Lossy Silicon Substrate

A K-band sub-harmonically pumped resistive mixer is demonstrated using standard 0.13 mum CMOS technology. A miniature Marchand Balun is integrated with the resistive mixer to generate equal amplitude and out-of-phase signals for mixer's local oscillation (LO) port directly on the lossy silicon substrate. The sub-harmonic resistive mixer with the integrated Marchand balun has conversion loss of 11-12 dB at f_IF = 100 MHz and P_LO = 7 dBm for RF frequencies from 18 to 26 GHz. The LO-RF and LO-IF isolations are approximately 30 and 33 dB, respectively.     

26-34 GHz CMOS mixer

A 26-34 GHz fully integrated CMOS down mixer is presented. At 30 GHz RF frequency and 2.5 GHz IF frequency, 50 /spl Omega/ terminations, 5 dBm LO and 1.2 V/spl times/17 mA supply power, the circuit yields a conversion loss of 2.6 dB, an SSB NF of 13.5 dB and an IIP3 of 0.5 dBm.     

A 10–40 GHz Broadband Subharmonic Monolithic Mixer in 0.18 $mu$ m CMOS Technology

A 10–40 GHz broadband subharmonic monolithic passive mixer using the standard 0.18 $mu$ m CMOS process is demonstrated. The proposed mixer is composed of a two-stage Wilkinson power combiner, a short stub and a low-pass filter. Likewise, the mixer utilizes a pair of anti-parallel gate-drain-connected diodes to achieve subharmonic mixing mechanism. The two-stage Wilkinson power combiner is used to excite a radio frequency (RF) and local oscillation (LO) signals into diodes and to perform broadband operation. The low-pass filter supports an IF frequency range from dc to 2.5 GHz. This proposed configuration leads to a die size of less than 1.1$,times,$ 0.67 mm$^{2}$ . The measured results demonstrate a conversion loss of 15.6–17.6 dB, an LO-to-RF isolation better than 12 dB, a high 2LO-to-RF isolation of 51–59 dB over 10–40 GHz RF bandwidth, and a 1 dB compression power of 8 dBm.      

60 GHz double-balanced up-conversion mixer on 130 nm CMOS technology

A millimetre-wave Gilbert-cell up-conversion mixer using standard 130 nm CMOS technology is presented. This mixer has a power conversion gain of better than 2 dB and has the highest reported OP 1 dB of -5.6 dBm when driven with a LO power of 0 dBm. The LO to RF isolation are better than 37 dB for LO from 57 to 65 GHz. Microstrip lines were employed for the matching network design at the mixer output. This is believed to be the first CMOS Gilbert-cell up-conversion mixer operating in the 60 GHz frequency band using fundamental LO.     

A 71–80 GHz Amplifier Using 0.13- μm CMOS Technology

A 71-80 GHz amplifier using 0.13-mum standard mixed signal/radio frequency complementary metal-oxide-semiconductor (CMOS) technology is presented in this letter. This four-stage cascade thin-film microstrip amplifier achieves the peak gain of 7.0 dB at 75 GHz. The 3-dB frequency bandwidth range is from 71 to 80 GHz. The amplifier demonstrates the highest amplification frequency and smallest chip size among previous published millimeter-wave (MMW) 0.13-mum CMOS amplifiers.     

A 0.5–7.5 GHz Ultra Low-Voltage Low-Power Mixer Using Bulk-Injection Method by 0.18- μm CMOS Technology

A fully differential low-voltage low-power downconversion mixer using a TSMC 0.18-mum CMOS logic process is presented in this letter. The mixer was designed with a four-terminal MOS transistor, the radio-frequency (RF) and local-oscillator signals apply to the gate and bulk of the device, respectively while the intermediate frequency (IF) signals output was from the drain. The mixer features a maximum conversion gain of 5.7dB at 2.4 GHz, an ultra low dc power consumption of 0.48 mW, a noise figure of 15 dB, and an input IP of 5.7 dBm. Moreover, the chip area of the mixer core is only 0.18 times 0.2 mm². The measured 3-dB RF frequency bandwidth is from 0.5 to 7.5 GHz with an IF of 100 MHz, and it is greatly suitable for low-power in wireless communication.     

A 0.6-V 1.6-mW transformer-based 2.5-GHz downconversion mixer with +5.4-dB gain and -2.8-dBm IIP3 in 0.13-/spl mu/m CMOS

On-chip transformers are best suited to lower the supply voltage in RF integrated circuits. A design method to achieve a high current gain with an on-chip transformer operating in resonance is presented. The proposed method will be proven analytically and has been applied to a downconversion mixer. Thereby part of the overall gain of the mixer has been shifted from the RF input stage to the transformer. Thus, the power consumption has been reduced and, in spite of the low supply voltage, moderate linearity has been achieved. Although the transformer has a bandpass behavior, a 3-dB bandwidth of 900 MHz at a center frequency of 2.5 GHz has been achieved. The downconversion mixer has been realized in 0.13-mum CMOS. It consumes 1.6 mW from a 0.6-V supply. A gain of +5.4 dB, a third-order intercept point of -2.8 dBm, an input 1-dB compression point of -9.2 dBm, and a single-sideband noise figure of 14.8 dB have been achieved     

Low-Loss and Broadband Asymmetric Broadside-Coupled Balun for Mixer Design in 0.18-$mu{hbox {m}}$ CMOS Technology

This study presents an asymmetric broadside coupled balun with low-loss broadband characteristics for mixer designs. The correlation between balun impedance and a 3D multilayer CMOS structure are discussed and analyzed. Two asymmetric multilayer meander coupled lines are adopted to implement the baluns. Three balanced mixers that comprise three miniature asymmetric broadside coupled Marchand baluns are implemented to demonstrate the applicability to MOS technology. Both a single and dual balun occupy an area of only 0.06 mm². The balun achieves a measured bandwidth of over 120%, an insertion loss of better than 4.1 dB (3 dB for an ideal balun) at the center frequency, an amplitude imbalance of less than 1 dB, and a phase imbalance of less than 5deg from 10 to 60 GHz. The first demonstrated circuit is a Ku-band mixer, which is implemented with a miniaturized balun to reduce the chip area by 80%. This 17-GHz mixer yields a conversion loss of better than 6.8 dB with a chip size of 0.24 mm². The second circuit is a 15-60-GHz broadband single-balanced mixer, which achieves a conversion loss of better than 15 dB and occupies a chip area of 0.24 mm². A three-conductor miniaturized dual balun is then developed for use in the third mixer. This star mixer incorporates two miniature dual baluns to achieve a conversion loss of better than 15 dB from 27 to 54 GHz, and occupies a chip area of 0.34 mm².     

30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology

In this paper, a passive down mixer is proposed, which is well suited for short-channel field-effect transistor technologies. The authors believe that this is the first drain-pumped transconductance mixer that requires no dc supply power. The monolithic microwave integrated circuit (MMIC) is fabricated using digital 90-nm silicon-on-insulator CMOS technology. All impedance matching, bias, and filter elements are implemented on the chip, which has a compact size of 0.5 mm/spl times/0.47 mm. The circuit covers a radio frequency range from 30 to 40 GHz. At a RF frequency of 35 GHz, an intermediate frequency of 2.5 GHz and a local-oscillator (LO) power of 7.5 dBm, a conversion loss of 4.6 dB, a single-sideband (SSB) noise figure (NF) of 7.9 dB, an 1-dB input compression point of -6 dBm, and a third-order intercept point at the input of 2 dBm were measured. At lower LO power of 0 dBm, a conversion loss of 6.3 dBm and an SSB NF of 9.7 dB were measured, making the mixer an excellent candidate for low power-consuming wireless local-area networks. All results include the pad parasitics. To the knowledge of the authors, this is the first CMOS mixer operating at millimeter-wave frequencies. The achieved conversion loss is even lower than for passive MMIC mixers using leading edge III/V technologies, showing the excellent suitability of digital CMOS technology for analog circuits at millimeter-wave frequencies.     

一款集成驱动放大器的低变频损耗混频器设计

采用0.5μm GaAs工艺设计并制造了一款单片集成驱动放大器的低变频损耗混频器.电路主要包括混频部分、巴伦和驱动放大器3个模块.混频器的射频(RF)、本振(LO)频率为4～7 GHz,中频(IF)带宽为DC～2.5 GHz,芯片变频损耗小于7 dB,本振到射频隔离度大于35 dB,本振到中频隔离度大于27 dB.1 dB压缩点输入功率大于11 dBm,输入三阶交调点大于20 dBm.该混频器单片集成一款驱动放大器,解决了无源混频器要求大本振功率的问题,变频功能由串联二极管环实现,巴伦采用螺旋式结构,在实现超低变频损耗和良好隔离度的同时,保持了较小的芯片面积.整体芯片面积为1.1 mm×1.2 mm.     

A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-/spl mu/m CMOS technology

A frequency synthesizer incorporating one single-sideband (SSB) mixer generates seven bands of clock distributed from 3 to 8GHz with 1-ns switching time. An efficient frequency synthesizing technique producing balanced bands around one center frequency is employed, and the SSB mixer uses double degeneration topology to increase the linearity. Fabricated in 0.18-/spl mu/m CMOS technology, this circuit achieves a sideband rejection of 37 dB while consuming 48 mW from a 2.2-V supply.     

Design of a High Performance 2-GHz Direct-Conversion Front-End With a Single-Ended RF Input in 0.13 $mu$m CMOS

A 2.1 GHz CMOS front-end with a single-ended low-noise amplifier (LNA) and a double balanced, current-driven passive mixer is presented. The LNA drives an on-chip transformer load that performs single-ended to differential conversion. A detailed comparison in gain, noise, and second and third order linearity performance is presented to motivate the choice of a current-driven passive mixer over an active mixer. The front-end prototype was implemented on a 0.13 $mu$m CMOS process and occupies an active chip area of 1.1 mm $^{2}$. It achieves 30 dB conversion gain, a low noise figure of 3.1 dB (integrated from 40 KHz to 1.92 MHz), an in-band IIP3 of ${-}$12 dBm, and IIP2 better than 39 dBm, while consuming only 12 mW from a 1.5 V power supply.