0.34 THz相对论返波振荡器实验

利用相对论返波管(RBWO)产生纳秒脉宽、千瓦量级功率的太赫兹脉冲辐射对太赫兹技术的应用具有积极意义。本文对0.34 THz-RBWO进行了粒子模拟与设计,通过微精密加工得到了平均直径6.8 mm,波纹深度0.1 mm,周期0.26 mm的正弦周期慢波结构,并对0.34 THz-RBWO进行了初步的实验。文中对0.34 THz脉冲信号脉宽、频率、功率参数的测量原理进行了研究。通过初步实验测试,0.34 THz-RBWO辐射波脉冲宽度2.1 ns,频率范围0.32 THz~0.36 THz,功率为375 kW。     

0.14 THz 10 Gbps无线通信系统

太赫兹通信由于其固有的宽带特性,在Gbps以上的高速无线通信领域受到广泛关注。本文描述了一种工作在0.14 THz频段的无线通信系统,传输速率达10 Gbps。该系统基于超外差结构,中频采用数字信号处理技术进行16QAM高阶数字信号调制解调,依靠肖特基二极管次谐波混频技术实现从中频到太赫兹信号的频谱搬移。目前该系统已经通过了500 m 10 Gbps距离无线传输实验验证,通信频段为133.8 GHz～137.4 GHz,带宽3.6 GHz,发射功率0 dBm,传输误码率低于10-6。     

一种0.34 THz站开式三维成像安检仪

介绍了一种太赫兹站开式大视角三维成像雷达系统。系统可用于人体隐藏危险品的成像检测,采用二维非均匀逐点扫描的工作方式,视场范围达到0.6 m×1 m,成像速度达到2 s。系统工作于0.34 THz,采用直径450 mm椭球镜聚焦,在5.8 m的成像距离实现了2 cm的方位分辨力。为了改善回波动态范围,采用相位噪声相消的系统结构。系统采用调频连续波(FMCW)雷达线性调频信号作为工作波形,工作带宽达到12 GHz。成像结果显示,系统校正后的距离分辨力可达到2 cm,能够实现隐藏危险品的有效检测。     

基于802.11协议的0.34 THz无线局域网实验系统

描述了一套由基于固态半导体电子学技术的0.34 THz无线通信收发前端和基于802.11协议的无线局域网设备实现的0.34 THz无线局域网实验系统。0.34 THz收发前端采用基于肖特基二极管的倍频及混频技术以及基于精密机加工艺的太赫兹无源器件实现,主要由0.34 THz腔体滤波器、0.34 THz谐波混频器、0.17 THz本振倍频链和馈电偏置电路组成。实测结果表明：研制的由3节点组成的0.34 THz无线局域网实验系统可在1.15 m的距离上实现节点间大于800 KB/s的组网通信。     

太赫兹高速无线通信：体制、技术与验证系统

对太赫兹高速无线通信的国内外现状和发展趋势进行了全面的综述与分析。首先介绍了太赫兹通信的特点、频段和调制体制。在此基础上详细讨论了太赫兹无线通信的关键技术,包括太赫兹产生和功率放大技术、太赫兹接收检测技术、太赫兹调制解调技术、太赫兹传输技术、太赫兹高速通信数据流和网络协议技术、太赫兹集成微系统技术;然后重点介绍了日本、德国、美国和中国的几个典型的太赫兹通信验证系统;最后对太赫兹高速无线通信的应用和发展进行了展望。     

0.22 THz折叠波导返波管设计

作为折叠波导家族的重要成员之一,折叠波导返波管无需种子微波源,具有可观的振荡功率输出,可在较宽频带内方便地进行电压调谐,在THz波段的紧凑型电真空器件中占有重要地位。介绍了中物院应用电子学研究所0.22 THz折叠波导的研究情况,并阐述整管设计的原理和理念。通过一维模型分析和三维宏粒子模拟校验,完成了调谐频宽10 GHz,带宽内输出功率为瓦级的折叠波导返波管的理论设计。     

太赫兹与硅光子技术融合应用展望

本文讨论了硅光子技术的发展现状,尤其对于其中进行光电,电光转换的主要模块的性能指标进行了介绍,详细阐述了全芯片集成的硅光子技术的优缺点,对其在光控相控阵雷达领域的潜在应用进行了探讨。提出了将硅光子技术应用于太赫兹雷达系统的初步设想。     

太赫兹与硅光子技术融合应用展望

本文讨论了硅光子技术的发展现状,尤其对于其中进行光电,电光转换的主要模块的性能指标进行了介绍, 详细 阐述了全芯片集成的硅光子技术的优缺点, 对其在光控相控阵雷达领域的潜在应用进行了探讨。提出了将硅光子技术应 用于太赫兹雷达系统的初步设想。     

0.67 THz宽带谐波混频器设计

为研制太赫兹多频段高灵敏度探测仪,依靠太赫兹砷化镓平面肖特基二极管的非线性特性,结合石英薄膜工艺,设计了宽带0.67 THz谐波混频器,并分析了砷化镓平面肖特基二极管性能表征参数指标对太赫兹混频器性能的影响。0.67 THz谐波混频器采用整体综合的设计方法,结合电气仿真软件ADS和电磁仿真软件HFSS,优化电路中不连续性微带与波导之间的电磁空间耦合效率,以混频器的变频损耗为优化目标,最终实现0.67 THz谐波混频器仿真设计。0.62~ 0.72 THz射频范围内,混频器单边带最低变频损耗小于8 dB,本振功率小于4 mW,本振端口与中频端口、射频端口与中频端口之间隔离度大于-30 dB。     

硅基太赫兹集成电路研究进展北大核心CSCD

太赫兹波处在亚毫米波与远红外光之间,应用于无线通信具有比微波通信更大的传输带宽和传输速率,在大数据无线通信等方面具有巨大的应用潜力。特征频率逐渐达到太赫兹频段的硅基集成电路工艺,为高集成度低成本太赫兹通讯电路的实现提供了可能。本文综述了近年来硅基太赫兹集成电路的研究进展,论述了硅基太赫兹集成电路设计在有源器件模型、互连结构、电路设计方法等方面面临的挑战,并对硅基太赫兹集成电路的发展趋势进行了讨论。     

一个全集成的CMOS脉冲超宽带发射机

本文给出了一个低功耗、全集成的CMOS脉冲式超宽带发射机电路的设计和流片测试结果,其集成了亚纳秒脉冲发生器、脉冲位置调制(PPM)器和天线驱动电路等,可支持多种调制方式并产生最高达1Gp/s的超宽带脉冲序列.设计采用数字驱动信号上升沿触发的新型反馈结构脉冲发生器,可产生稳定的脉冲信号.通过可调的脉冲宽度和PPM调制步长,设计提供了工艺参数和温度变化的补偿手段.     

A high-speed transmission method for wireless personal communications

The next-generation wireless personal communications systems are expected to support a wide range of high-quality services that require high data rates. Communicating at high transmission rates over the harsh wireless environment, however, creates many difficult and challenging problems. In this paper, we describe a technique for the high-speed transmission of data in wireless personal communications which we denote as multicode modulation. In this technique, the high-rate bit transmitted data is serial to parallel converted into low-rate bit streams in a similar fashion to multicarrier or multitone modulation. However, in contrast to the multicarrier method, here we propose to modulate each low-rate bit stream using direct-sequence spread-spectrum on a single carrier. It is demonstrated that by selecting the processing gain properly the total required bandwidth will be of the same order as the original high-rate data stream; thereby, gaining the inherent benefit of multipath rejection without expanding the bandwidth of the original high-rate stream. To demonstrate the potential and merits of the proposed method as an alternative technique for high-speed transmission for wireless personal communications, various simulation results over a multipath Rayleigh fading link are presented.Supported in part by the Hong Kong Research Grant Council, Project No. HKUST562/94E and the Hong Kong Telecom Institute of Information Technology, Project No. HKTIIT94/95.EG03.     

A low-voltage low-power CMOS transmitter front-end using current mode approach for 2.4 GHz wireless communications

This paper presents a low-voltage low-power transmitter front-end using current mode approach for 2.4 GHz wireless communication applications, which is fabricated in a chartered 0.18 μm CMOS technology. The direct up-conversion is implemented with a current mode mixer employing a novel input driver stage, which can significantly improve the linearity and consume a small amount of DC current. The driver amplifier utilizes a transimpedance amplifier as the first stage and employs an inter-stage capacitive cross-coupling technique, which enhances the power conversion gain as well as high linearity. The measured results show that at 2.4 GHz, the transmitter front-end provides 15.5 dB of power conversion gain, output P?1 dB of 3 dBm, and the output-referred third-order intercept point (OIP3) of 13.8 dBm, while drawing only 6 mA from the transmitter front-end under a supply voltage of 1.2 V. The chip area including the testing pads is only 0.9 mm×1.1 mm.     

A fully integrated differential impulse radio transmitter

This paper presents a fully integrated differential impulse radio transmitter for ultra-wideband (UWB) applications. The design features low power dissipation, simple hardware, and a precise differential pulse shape. The transmitter employing the time hopping pulse position modulation (TH-PPM) scheme supports eight simultaneous users’ access with 2.5-ns hopping time allocated in a frame time of 20 ns. A differential 5th-derivative Gaussian pulse generator (PG) is designed for the first time to regulate the pulse shape so as to automatically satisfy the Federal Communications Commission (FCC) spectrum mask. The transmitter in a 1.8-V 0.18-μm CMOS process is realized in an IC area of 629 μm × 797 μm for its all digital circuit design. The measured digital pulse width of the TH-PPM pulse train is 2.5 ns and the measured 5th-derivative Gaussian pulse has a peak-to-peak amplitude of 154 mV and a pulse width of 820 ps. The power dissipation of the transmitter is 23 mW.     

A fully integrated CMOS direct-conversion transmitter front-end for WiMAX

A naturally commutated six-pulse cycloconverter working in the inverting mode is used to feed power to a single phase AC motor at 400 Hz. The motor is connected at the input side of the cycloconverter while the three-phase mains is connected at its output. Three-phase mains feeds power to the input side of the cycloconverter which is arranged as a tuned load at 400 Hz. The effect of the single-phase induction motor on system performance is discussed. The principle of voltage and frequency control for proper operation of the induction motor is presented. The results are experimentally verified.     

A fully integrated VCO at 2 GHz

A fully integrated voltage-controlled oscillator at a frequency of 2 GHz with low phase noise has been implemented in a standard bipolar process with a f_t of 25 GHz. The design is based on an LC-resonator with vertical-coupled inductors. Only two metal layers have been used. The supply voltage of the oscillator is 2.7 V. The phase noise is only -136 dB/Hz at 4.7 MHz frequency offset. A tuning range of 150 MHz is achieved with integrated tuning diodes     

Performance studies for high-speed indoor wireless communications

A major difficulty in achieving high-bit-rate wireless transmission is the large delay spread which severely limits the maximum data rate. In this paper, techniques are presented for overcoming these transmissionrate limits. Specifically, the performances of multicarrier modems and a single-carrier modem with equalization are characterized in terms of the efficiency (or achievable bit rate) versus outage, under a wide range of conditions and parameters.For the multicarrier approach, the extensive set of performance results indicate the following: for QPSK, in a typical office-building environment (rms delay spreads of 50–100 ns), if the subchannel symbol rate is limited to 1 Mbaud,and provided there is sufficient power, an efficiency of 1–1.2 b/s/Hz can be achieved with 99% availability (1% outage) with either the multitone or the Orthogonal Frequency Division Multiplexing realizations. With 16 subchannels this corresponds to at least 16 Mb/s. To achieve higher data rates (for example, 155 Mb/s), or where there are larger delay spreads (for example, in outdoor microcells), more subchannels can be used, if practical. Otherwise, equalization can be combined with wider subchannels and/or sophisticated antenna techniques.Link-budget calculations, also presented here, show how transmitted power can be a limiting factor in transmission bit rate. In particular, for 20 MHz of bandwidth and a frequency of 5 GHz or less, a transmitted power of 100 mW to 1 W should be sufficient to accommodate 30–50 m cells with good performance (for example, bit error probability of 10^–8 and 1% outage). However, for larger bandwidths (for example, 100–200 MHz), the frequency must be higher (for example, 20 GHz) and the distance will be severely limited, possibly to a single room.     

120 GHz millimetre-wave antenna for integrated photonic transmitter

A planar slot antenna on an Si substrate for a photonic millimetre-wave transmitter that operates at a frequency of 120 GHz has been designed and characterised. By integrating a uni-travelling-carrier photodiode with the antenna, emission of millimetre-wave signals with a power of 250 μW has been demonstrated experimentally     

A fully integrated 24-GHz phased-array transmitter in CMOS

This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip CMOS power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up to 14.5 dBm of output power at 24 GHz. The heterodyne transmitter has a two-step quadrature up-conversion architecture with local oscillator (LO) frequencies of 4.8 and 19.2 GHz, which are generated by an on-chip frequency synthesizer. Four-bit LO path phase shifting is implemented in each element at 19.2 GHz, and the transmitter achieves a peak-to- ratio of 23 dB with raw beam-steering resolution of 7/spl deg/ for radiation normal to the array. The transmitter can support data rates of 500 Mb/s on each channel (with BPSK modulation) and occupies 6.8 mm /spl times/ 2.1 mm of die area.     

A fully integrated low power PAM multi-channel UWB transmitter

A new transmitter for ultra-wideband (UWB) impulse radio is described in this paper. The new UWB transmitter implements a low power Gaussian shaping filter to reduce the side-lobe in the frequency domain. A simple pulse amplitude modulation (PAM) circuit is used to keep the power consumption low. The proposed architecture features the simple design, low-power operation, and enables the pulse-shape generation for a multi-channel UWB. The core layout size is only 0.2 mm². The simulation results show that the generated signals satisfy the FCC spectrum mask, and the average power consumption is <1.97 mW for the 1.8 V supply voltage. Pulses are transmitted at a PRF (pulse repetition frequency) of 40.5 MHz in 500 MHz bandwidth channels equally spaced within the 3.1–10.6 GHz UWB. This transmitter is designed and fabricated in a 0.18-μm CMOS process.