HARD: A hypercube embedding algorithm for state assignment of finite state machines

To minimize the area of the combinational circuit, required to realize a finite state machine (FSM), an efficient assignment of states of the FSM to a set of binary codes is required. As to find an optimal state assignment is NP-hard, therefore heuristic approaches have been taken. One approach generates an adjacency graph from the FSM model and then tries to embed the adjacency graph onto a hypercube with an objective to minimize the cost of mapping. However, hypercube embedding itself is an NP-complete problem. In this paper we present a solution to the hypercube embedding problem by designing a new technique, designated as HARD, that is a hybrid combination of non-linear programming method and a local search. We have transformed our problem from discrete space to continuous space and have applied logarithmic barrier function method, that in turn uses gradient projection approach to minimize the objective function. Each iteration of the gradient projection method produces a valid solution. Local search is performed around solution to improve its quality by using a Kernighan-Lin style algorithm. Two distributed algorithms for the HARD, have also been designed and implemented on network of workstations under message passing interface, to speed up the search. We have carried out a large number of experiments to determine the efficiency of the HARD in terms of solution quality over many other techniques, and have obtained very promising results.     

Synthesis of finite state machines for improved state verification

Finite State Machines (FSMs) are used in diverse areas to model hardware and software systems. Verification of FSMs is essential to ensure reliability of systems. To verify that a machine is in an expected state in testing, Unique Input/Output (UIO) sequences are used. The aforementioned testing methodology requires that each state in the FSM has an UIO. However, it is possible for a given machine that few or even none of its states have an UIO sequence. This paper presents a guided heuristic algorithm for synthesizing FSMs such that each state has an UIO sequence. The states of an FSM with identical I/O labels on transitions are grouped in order to identify the states which do not possess UIO sequence. The transitions are then augmented by adding extra output terminals incrementally so that new UIO sequences are created for the states. A greedy approach is used to optimize the number of added outputs. Initially, the transitions which lead to state convergence (i.e., transitions with identical input/output labels taking a set of states to the same next state) and constrained self-loop (i.e., transitions taking a set of states either to itself or leads to state convergence) are identified since a state with only these transitions will never have a UIO sequence. Extra output terminals are added to the FSM which are used only while testing and the augmented output labels make sure that the states are neither convergent nor has constrained self-loop, thereby ensuring UIO sequence. The proposed algorithm, referred to as AUGP, was tested with a large number of FSMs including the Microelectronics Center of North Carolina (MCNC) FSM benchmarks. The augmented state transition table was used as input to a UIO computation algorithm (developed by the same authors [Ahmad I, et al. IEE Proc Comput Digital Tech 2004;151(2):131]) to check the performance of the augmentation algorithm and the tested FSMs were found to possess UIO sequence for all states.     

Canonical finite state machines for distributed systems

There has been much interest in testing from finite state machines (FSMs) as a result of their suitability for modelling or specifying state-based systems. Where there are multiple ports/interfaces a multi-port FSM is used and in testing, a tester is placed at each port. If the testers cannot communicate with one another directly and there is no global clock then we are testing in the distributed test architecture. It is known that the use of the distributed test architecture can affect the power of testing and recent work has characterised this in terms of local s-equivalence: in the distributed test architecture we can distinguish two FSMs, such as an implementation and a specification, if and only if they are not locally s-equivalent. However, there may be many FSMs that are locally s-equivalent to a given FSM and the nature of these FSMs has not been explored. This paper examines the set of FSMs that are locally s-equivalent to a given FSM M. It shows that there is a unique smallest FSM χ_min(M) and a unique largest FSM χ_max(M) that are locally s-equivalent to M. Here smallest and largest refer to the set of traces defined by an FSM and thus to its semantics. We also show that for a given FSM M the set of FSMs that are locally s-equivalent to M defines a bounded lattice. Finally, we define an FSM that, amongst all FSMs locally s-equivalent to M, has fewest states. We thus give three alternative canonical FSMs that are locally s-equivalent to an FSM M: one that defines the smallest set of traces, one that defines the largest set of traces, and one with fewest states. All three provide valuable information and the first two can be produced in time that is polynomial in terms of the number of states of M. We prove that the problem of finding an s-equivalent FSM with fewest states is NP-hard in general but can be solved in polynomial time for the special case where there are two ports.     

Active learning for extended finite state machines

We present a black-box active learning algorithm for inferring extended finite state machines (EFSM)s by dynamic black-box analysis. EFSMs can be used to model both data flow and control behavior of software and hardware components. Different dialects of EFSMs are widely used in tools for model-based software development, verification, and testing. Our algorithm infers a class of EFSMs called register automata. Register automata have a finite control structure, extended with variables (registers), assignments, and guards. Our algorithm is parameterized on a particular theory, i.e., a set of operations and tests on the data domain that can be used in guards.Key to our learning technique is a novel learning model based on so-called tree queries. The learning algorithm uses tree queries to infer symbolic data constraints on parameters, e.g., sequence numbers, time stamps, identifiers, or even simple arithmetic. We describe sufficient conditions for the properties that the symbolic constraints provided by a tree query in general must have to be usable in our learning model. We also show that, under these conditions, our framework induces a generalization of the classical Nerode equivalence and canonical automata construction to the symbolic setting. We have evaluated our algorithm in a black-box scenario, where tree queries are realized through (black-box) testing. Our case studies include connection establishment in TCP and a priority queue from the Java Class Library.     

Incremental testing of finite state machines

The automatic generation of test suites for systems modelled as finite state machines (FSMs) is an important problem that impacts several critical applications. Known methods that automatically generate tests for FSMs, specially the W‐method and some derivations, strongly assume that the number of system states is small. If the overall number of states in the FSM specification is relatively large, such methods become difficult to use. However, often in practice, a system is defined as a combination of several subsystems, with the latter already independently designed, developed and tested. In this paper, we define the concept of combined FSMs and introduce a new method to test modular compositions of FSMs. This method allows for a new incremental testing strategy that turns the testing of new systems into a much more scalable process. As an example, we present an infinite family of naturally occurring FSM models for which our method produces exponentially more compact test suites than the W‐method. Copyright © 2012 John Wiley & Sons, Ltd.     

On adaptive experiments for nondeterministic finite state machines

Adaptive experiments are well defined in the context of finite state machine (FSM) based analysis, in particular, in FSM based testing where homing and distinguishing experiments with FSMs are used for test derivation. In this paper, we define and propose algorithms for deriving adaptive homing and distinguishing experiments for non-initialized nondeterministic finite state machines (NFSMs). For NFSMs, the construction of adaptive experiments is rather complex as the partition over produced outputs does not define a partition over the set of states but a collection of intersecting subsets, and thus, the refinement of such set system is more difficult than the refinement of a partition. Given a complete non-initialized possibly non-observable NFSM, we establish necessary and sufficient conditions for having adaptive homing and distinguishing experiments and evaluate the height of these experiments.     

Hierarchical finite state machines for autonomous mobile systems

This paper proposes a system architecture, related design approaches for autonomous mobile systems and guidelines for self-sufficient autonomy. Development of a tiered layout for a hybrid-state control in a series of stages as well as the integration of such a controller in the overall autonomy structure are proposed and demonstrated as part of multiple examples, including The Ohio State University participation in DARPA Urban Challenge 2007. The hierarchical layout and the iterative design methodology enable a certain level of design flexibility for the overall system and preparation for various contingencies, as illustrated on specific development cycles.     

扰动模糊有限转换状态机

引入了扰动模糊有限转换状态机和扰动模糊有限状态机的（强）同态的概念,研究了它们的相关性质。给出了[Σ]的元素构成所有长度有限的词集上的两种同余关系,讨论商结构问题,证明了相应的所有等价类构成具有单位元的有限半群,并且这两个有限半群是同态的。给出了[Q]上容许关系及强同态的核的概念,研究了它们的相关性质。     

Modified ant colony algorithm for constructing finite state machines from execution scenarios and temporal formulas

We solve the problem of constructing extended finite state machines with execution scenarios and temporal formulas. We propose a new algorithm pstMuACO that combines a scenario filtering procedure, an exact algorithm efsmSAT for constructing finite state machines from execution scenarios based on a reduction to the Boolean satisfiability problem, and a parallel ant colony algorithm pMuACO. Experiments show that constructing several initial solutions for the ant colony algorithm with reduced sets of scenarios significantly reduces the total time needed to find optimal solutions. The proposed algorithm can be used for automated construction of reliable control systems.     

On state reduction of incompletely specified finite state machines

State reduction of incompletely specified finite state machines (ISFSMs) is an important task in optimization of sequential circuit design and known as an NP-complete problem. Removal of redundant states reduces the logic, because of this, chip area decreases. In addition, test generation is easier when the sequential circuit is irredundant. In this paper, we present a heuristic for state reduction of ISFSMs. The proposed heuristic is based on a branch-and-bound search technique and identification of sets of compatible states of a given ISFSM specification. We have obtained results as good as the best exact method in the literature but with significantly better run-times.     

Structural transformations of probabilistic finite state machines

Probabilistic finite state machines have recently emerged as a viable tool for modelling and analysis of complex non-linear dynamical systems. This paper rigorously establishes such models as finite encodings of probability measure spaces defined over symbol strings. The well known Nerode equivalence relation is generalized in the probabilistic setting and pertinent results on existence and uniqueness of minimal representations of probabilistic finite state machines are presented. The binary operations of probabilistic synchronous composition and projective composition, which have applications in symbolic model-based supervisory control and in symbolic pattern recognition problems, are introduced. The results are elucidated with numerical examples and are validated on experimental data for statistical pattern classification in a laboratory environment.     

Fragment shaders for agent animation using finite state machines

In a previous paper we generated animated agents and their behavior using a combination of XML and images. The behavior of agents was specified as a finite state machine (FSM) in XML. We used images to determine properties of the world that agents react to. While this approach is very flexible, it can be made much faster by using the power available in modern GPUs. In this paper we implement FSMs as fragment shaders using three kinds of images: world space images, agent space images and FSM table images. We show a simple example and compare performance of CPU and GPU implementations. Then we examine a more complex example involving more maps and two types of agents (predator–prey). Furthermore we explore how to render agents in 3D more efficiently by using a variation on pseudoinstancing.     

Synthesis of distinguishing test cases for timed finite state machines

This paper is devoted to the generation of distinguishing experiments with completely specified timed finite state machines. It is shown, in particular, that two completely specified nondeterministic finite state machines can be distinguished by a multiple preset experiment if and only if these finite state machines are not equivalent. Two finite state machines can be distinguished by a simple adaptive experiment if and only if they are r-distinguishable, i.e., have no common completely specified reduction. The corresponding adaptive experiment is described by a special timed finite state machine. The procedure for constructing such an r-distinguishing timed finite state machine is proposed.     

Formal testing from timed finite state machines

In this paper we present a formal methodology to test both the functional and temporal behaviors in systems where temporal aspects are critical. We extend the classical finite state machines model with features to represent timed systems. Our formalism allows three different ways to express the timing requirements of systems. Specifically, we consider that time requirements can be expressed either by means of fix time values, by using random variables, or by considering time intervals. Different implementation relations, depending on both the interpretation of time and on the non-determinism appearing in systems, are presented and related. We also study how test cases are defined and applied to implementations. Test derivation algorithms, producing sound and complete test suites, are also presented. That is, by deriving these test suites we relate the different notions of passing tests and the different implementation relations. In other words, for a given correctness criterion, a system represents an appropriate implementation of a given model if and only if the system successfully passes all the test belonging to the derived test suite.     

2-adic有限状态自动机的新实现方法

对2-adic有限状态自动机（2-adic FSM）的构造进行了研究,利用多输入的Galois 进位反馈移位寄存器(FCSR)模块代替以往方法中单输入的Galois进位反馈移位寄存器模块,给出一种实现2-adic有限状态自动机的新方法。该方法可将一般的2-adic有限状态自动机等价变换为整数矩阵的2-adic有限状态自动机,且当输入矩阵或状态转移矩阵某行中存在分母不互素的元素时,所得的整数矩阵2-aidc有限状态自动机长度更短,从而节省了寄存器的使用数量。     

Heuristics for fault diagnosis when testing from finite state machines

When testing from finite state machines, a failure observed in the implementation under test (IUT) is called a symptom. A symptom could have been caused by an earlier state transfer failure. Transitions that may be used to explain the observed symptoms are called diagnosing candidates. Finding strategies to generate an optimal set of diagnosing candidates that could effectively identify faults in the IUT is of great value in reducing the cost of system development and testing. This paper investigates fault diagnosis when testing from finite state machines and proposes heuristics for fault isolation and identification. The proposed heuristics attempt to lead to a symptom being observed in some shorter test sequences, which helps to reduce the cost of fault isolation and identification. The complexity of the proposed method is analysed. A case study is presented, which shows how the proposed approach assists in fault diagnosis. Copyright © 2006 John Wiley & Sons, Ltd.     

On the structure of free finite state machines

The finite state machine U_{m, n}(M) freely generated by a set consisting of m states and n inputs subjects to the relations holding in the finite state machine M was considered by Birkhoff and Lipson in [1, 2]. In this paper, necessary and sufficient conditions for U_{m, n}(M) to consist of m disjoint copies of U_{1, n}(M) are established. The relationship between U_{1, n}(M) and the transition monoid of M, and a representation of U_{1, n}(M) as a transition monoid machine are described. The characterization of machines of type U_{1, n}(M) is in this way reduced to the characterization of finite monoids possessing a ‘universal presentation’. Some general results concerning finite semigroups and groups with a universal presentation, and precise characterizations of finite semilattices and Abelian groups admitting a universal presentation are described.     

Quotient structures of intuitionistic fuzzy finite state machines

Quotient structures of intuitionistic fuzzy finite state machines are discussed. We give congruence relations which can be naturally introduced in such a way that each associates a semigroup with an intuitionistic fuzzy finite state machine. We also introduce the notion of intuitionistic admissible relation, and give its characterization. An isomorphism between an intuitionistic fuzzy finite state machine and the quotient structure of another intuitionistic fuzzy finite state machine is established.     

Minimization of mealy finite-state machines by internal states gluing

A problem of minimization of Mealy finite-state machines that is common in synthesizing digital devices on programmable logic devices is considered. The proposed approach uses an operation of gluing two states and represents the finite-state machine as a list of transitions. Cases when gluing two states generates wait states are described. Algorithms that minimize the number of internal states, the number of transitions and input variables of Mealy finite-state machines are given. The experimental results showed that when used to implement finite-state machines on programmable logic devices, the proposed method helps decrease the implementation cost 1.31 times on average and 3 times at best. Topical directions for further study of finite-state machines minimization methods are given.