Thermal characterization of power devices by scanning thermal microscopy techniques

The scanning thermal microscope (SThM) is used for investigating chip temperatures of power devices under operating conditions enabling the localization of failure-induced hot spots. In this paper, we present the measurement of the temperature distribution on the surface of a free-wheeling diode of an IGBT. A new modulation technique implemented into the SThM for the determination of local quantitative thermal conductivities, the so-called 3ω technique, is also used for further analyses of defective power devices. With this technique, a non-uniformity of the thermal conductivity in the micrometer range could be found at the anode side of a GTO.     

Trends in power semiconductor devices

This paper reviews recent trends in power semiconductor device technology that are leading to improvements in power losses for power electronic systems. In the case of low voltage (<100 V) power rectifiers, the silicon P-i-N rectifier has been displaced by the silicon Schottky rectifier, and it is projected that the silicon TMBS rectifier will be the preferred choice in the future. In the case of high voltage (>100 V) power rectifiers, the silicon P-i-N rectifier continues to dominate but significant improvements are expected by the introduction of the silicon MPS rectifier followed by the GaAs and SiC based Schottky rectifiers. Equally important developments are occurring in power switch technology. The silicon bipolar power transistor has been displaced by silicon power MOSFETs in low voltage (<100 V) systems and by the silicon IGBTs in high voltage (>100 V) systems. The process technology for these MOS-gated devices has shifted from V-MOS in the early 1970s to DMOS in the 1980s, with more recent introduction of the UMOS technology in the 1990s. For the very high power systems, the thyristor and GTO continue to dominate, but significant effort is underway to develop MOS-gated thyristors (MCTs, ESTs, DG-BRTs) to replace them before the turn of the century. Beyond that time frame, it is projected that silicon carbide based switches will begin to displace these silicon devices     

Short-timescale thermal mapping of semiconductor devices

We report spatial mapping of temperature fields in semiconductor devices with sub-microsecond temporal resolution. The measurements are performed at a facility that integrates scanning laser-reflectance thermometry with electrical stressing capability. Data for SOI LDMOS transistors investigate transient heat diffusion within the buried silicon dioxide and capture large temperature gradients in the drift region, which result from the spatially-varying impurity concentration. The new thermometry facility is promising for the study of transistor and interconnect thermal failure due to electrostatic discharge (ESD)     

Thermal feedback in power semiconductor devices

Thermal feedback (TF) is an important aspect for the thermal management of semiconductor devices and high-power density integrated circuits. Different features of positive and negative TF in transistors are reviewed and summarized for the macroscopic domain. The thermal feedback mechanism is applied to the microscopic domain of noise fluctuations in semiconductor devices. It is argued that TF may be responsible for a major part of 1/fflicker or excess noise. Some experimental evidence is presented which supports this thermal feedback 1/f-noise theory for bipolar and MOS field effect transistors. Device and circuit design rules for the minimization of transmitter noise are given.     

A power cycling degradation inspector of power semiconductor devices

We have proposed a failure analysis based on a real-time monitoring of power devices under acceleration test. The real-time monitoring enables to visualize the mechanism that leads to a failure by obtaining the change of structure inside the device in time domain with high spatial resolution. In this paper, we presented a new analytical instrument based on the proposed failure analysis concept. The essential functions of this instrument are (1) power stress control, (2) non-destructive inspection and (3) water circulation. An original design power-stress control system and a customized scanning acoustic microscopy system enable us a non-destructive inspection inside the device under power cycling test. This instrument exhibits a great advantage especially to monitor failure mechanisms without having to open the module.     

功率半导体器件的发展和市场

功率半导体器件的全球销售额每年以约１５％的速率增长,而传统器件如ＳＣＲ和ＧＴＲ等的年增长率远小于新型器件。以Ｓｍａｒｔ Ｐｏｗｅｒ为代表的新型功率器件集功率、控制和信息于一体,是今后发展的重点。     

Electrostatic discharge thermal failure in semiconductor devices

The problem of calculating for electrostatic discharge (ESD) thermal failure is considered by the thermal convolution integral technique. It is shown that the common assumption that threshold failure occurs after five time constants is unjustified and that the simple average power method for assessing threshold parameters is, consequently, invalid. New expressions for the threshold parameters are presented which retain the simplicity of the average power method, yet represent only a small sacrifice of the accuracy (typically 5%) of more complex methods. In addition, the relaxation of the constraints of a pure Wunsch-Bell damage profile and of an exponentially decaying current pulse is considered     

Novel heatsink for power semiconductor module using high thermal conductivity graphite

The thermal properties and reliability of novel heatsinks that use high thermal conductivity graphite were investigated. Graphite plates with different high-thermal-conductivity directions were laminated together using an Ag-based brazing material, with thin Cu plates on their outer surfaces. The heatsinks were bonded to Si heater chips using Sn-3Ag-0.5Cu solder. Samples with conventional Cu or Cu-65Mo heatsinks were also fabricated as references. The samples were attached to an active cooling plate subjected to a constant water flow, and thermal and reliability measurements were conducted. The experimental results were also compared with the results of a finite element analysis. The novel laminated heatsinks exhibited a lower thermal resistance than the Cu or Cu-65Mo heatsinks, and the experimental results were in reasonable agreement with those of the finite element analysis. The graphite-based heatsinks had better power cycle reliability than Cu-based heatsinks. Therefore, these novel graphite heatsinks have potential for application to power semiconductor modules, it seems to be useful for applications with high heat flux of power semiconductor devices.     

Studies of turn-off effects in power semiconductor devices

An analytical model has been developed for analyzing current and voltage transients during high power diode recovery. Using the charge control approach and approximating the excess charge distribution by simple geometrical curves a fast and convenient method for computer analysis is obtained. The model is thoroughly physical and makes use of the proper diode design parameters and the differential equations of the electrical network. There is no need for any experimental fitting parameter. All relevant complicating effects as emitter recombination, nonabrupt pn-junction and reverse current influence on the space-charge layer are considered. Comparisons between calculated and measured recovery behavior under several different conditions show good agreement and prove that the model may serve as a useful tool in device and circuit development including RC-snubber design. Furthermore, the calculated charge distribution varies during the recovery in a physically reasonable manner. Starting from measured recovery transients this model may also be used as a new method for determining the excess charge content in the diode at the beginning of the recovery phase.     

Two-dimensional dopant profiling in semiconductor devices by electron holography and chemical etching delineation techniques with the same specimen

The electron holography and chemical etching delineation techniques were successfully employed to assess two-dimensional (2D) dopant profiles in semiconductor devices. The results obtained from both techniques with the same specimen were precisely compared and discussed in order to evaluate the performance limits of these techniques. It was demonstrated that both techniques are very effective in obtaining reliable 2D dopant profiles in nanodevice.     

Single-shot thermal energy mapping of semiconductor devices with the nanosecond resolution using holographic interferometry

A novel two-dimensional backside optical imaging method for thermal energy mapping inside semiconductor devices is presented. The method is based on holographic interferometry from the device backside and uses the thermo-optical effect. An image of the local thermal energy is obtained with 5-ns time resolution using a single stress pulse. The technique allows a unique recording of the internal device behavior. The method is demonstrated analyzing the nonrepetitive thermal and current flow dynamics in smart power electrostatic discharge (ESD) protection devices. A spreading of the current during the stress pulse is observed and explained by the effect of the negative temperature dependence of the impact ionization coefficient.     

Quantifying optical feedback into semiconductor lasers via thermal profiling

We show that thermal profiling can be used to monitor optical feedback into semiconductor lasers in photonic integrated circuits, where direct optical access is impractical. The optical output power of a laser, both free-running and when exposed to optical feedback, can be quantitatively determined from thermal measurements alone, without recourse to direct optical measurements. Furthermore, the shift in threshold current resulting from optical feedback can be determined from the thermal measurements, enabling quantitative determination of the feedback coupling efficiency into the laser.     

Secondary breakdown thermal characterization and improvement of semiconductor devices

This paper indicates that the energy dependence of semiconductor devices with respect to secondary breakdown can be explained on the basis of transient thermal resistance. The procedure for determining the transient thermal resistance is described. Results indicate that the thermal time constants of transistors is much shorter than heretofore recognized. Similar results are presented for voltage regulator diodes. In addition, a simple technique is described which significantly increases the thermal time constant of these devices. Similar changes are proposed for other semiconductor devices.     

Annealing effects of NTD silicon for semiconductor power devices

The use of neutron transmutation doped (NTD) Si has become very important for processing high-voltage power devices. A simple annealing process is usually required to anneal the lattice defects caused by neutron irradiation. This is usually performed by the silicon supplier by annealing the silicon crystal at a low temperature (approximately 700°C). High-voltage power devices, however, require much higher processing diffusion temperature. In situ annealing of silicon, therefore, can occur during device processing. Furthermore, we demonstrate here that higher yield can be obtained using the in situ annealing. This improvement is due to the effectiveness and uniformity of annealing of thin wafers. The uniformity and blocking voltage distribution of high-voltage rectifiers and thyristors using crystal annealed and in situ wafer annealed NTD silicon are presented.