首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到20条相似文献,搜索用时 913 毫秒
1.
集成低功耗CMOS压控振荡器及其二分频器   总被引:1,自引:0,他引:1  
实现了应用于无线局域网收发机的集成低功耗CMOS压控振荡器及其二分频器.压控振荡器是由在片对称螺旋型电感和差分容抗管组成的LC负阻型振荡器,而二分频器采用了ILFD结构.由于采用了差分LC元件和ILFD技术,整个电路的功耗很低.该电路已经用0.18μm CMOS工艺实现.测试结果表明该电路能产生低相位噪声的3.6/1.8GHz双带本振信号,并具有很宽的可控频率范围.当电源电压为1.5V时,该电路消耗了5mA的电流.芯片面积为1.0mm×1.0mm.  相似文献   

2.
集成低功耗CMOS压控振荡器及其二分频器   总被引:3,自引:3,他引:0  
池保勇  石秉学 《半导体学报》2002,23(12):1262-1266
实现了应用于无线局域网收发机的集成低功耗CMOS压控振荡器及其二分频器.压控振荡器是由在片对称螺旋型电感和差分容抗管组成的LC负阻型振荡器,而二分频器采用了ILFD结构.由于采用了差分LC元件和ILFD技术,整个电路的功耗很低.该电路已经用0.18μm CMOS工艺实现.测试结果表明该电路能产生低相位噪声的3.6/1.8GHz双带本振信号,并具有很宽的可控频率范围.当电源电压为1.5V时,该电路消耗了5mA的电流.芯片面积为1.0mm×1.0mm.  相似文献   

3.
This letter describes circuit techniques for obtaining divide-by-four (divide4) frequency dividers (FDs) from CMOS ring-oscillator based injection locked frequency dividers (ILFDs). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. At the supply voltage of 1.8V and at the incident power of 0dBm, for a dual-band ILFD, the divide4 ILFD can provide a locking range of 6.3% from 5.39 to 6.12GHz at low band and 5.9% from 8.84 to 9.38GHz at high band when the dc bias of MOS switches Vinj changes from 0.7 to 1.1V  相似文献   

4.
This letter proposes a new wideband Colpitts injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit consists of a differential CMOS LC-tank oscillator and a direct injection topology. The divide-by-two ILFD can provide wide locking range, and the measurement results show that at the supply voltage of 2.4 V, the tuning range of the free running ILFD is from 4.46 to 5.6 GHz, about 1.14 GHz, and the locking range of the ILFD is from 8.03 to 11.63 GHz, about 3.6 GHz, at the injection signal power of 0 dBm. The ILFD dissipates 19.92 mW at a supply voltage of 2.4 V and was fabricated in 1P6M 0.18 mum CMOS process. At the tuning voltage of 1.2 V, the measured phase noise of the free running ILFD is -110.8 dBc/Hz at 1 MHz offset frequency from 4.94 GHz and the phase noise of the locked ILFD is -135.4 dBc/Hz, while the input signal power is -4 dBm.  相似文献   

5.
《Electronics letters》2008,44(17):999-1000
A feedback topology, improving the performance of injection locked frequency dividers (ILFDs) in terms of locking range and supply rejection, is presented. The locking range is improved by 60% compared with conventional designs. The proposed ILFD can work robustly with supply rejection since the self-resonant frequency of the proposed ILFDs is independent of the input DC voltage. Fabricated in a standard 0.18 mm CMOS technology, the proposed ILFD is able to work from 4 to 8.2 GHz with a maximum power consumption of 2.84 mW from a 1.8 V supply.  相似文献   

6.
A new divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD consists of a 7.6 GHz voltage controlled oscillator (VCO) and two transformers, which are in series with the crosscoupled transistors in the VCO for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.13 μm CMOS technology. At the supply voltage of 0.8 V, the core power consumption is 1.25 mW, and the free-running frequency of the ILFD is tunable from 7.2 to 7.87 GHz. At the input power of 0 dBm, the total divide-by-3 locking range is from 21.56 to 23.63 GHz as the tuning voltage is varied from 0.0 to 0.8 V. The phase noise of the locked ILFD output is lower than that of the free-running ILFD in the divide-by-3 mode.  相似文献   

7.
This paper describes a divide-by-two injection-locked frequency divider (ILFD) for frequency synthesizers as used in multiband orthogonal frequency division multiplexing (OFDM) ultra-wideband (UWB) systems. By means of dual-injection technique and other conventional tuning techniques, such as DCCA and varactor tuning, the divider demonstrates a wide locking range while consuming much less power. The chip was fabricated in the Jazz 0.18 μm RF CMOS process. The measurement results show that the divider achieves a locking range of 4.85 GHz (6.23 to 11.08 GHz) at an input power of 8 dBm. The core circuit without the test buffer consumes only 3.7 mA from a 1.8 V power supply and has a die area of 0.38 × 0.28 mm2. The wide locking range combined with low power consumption makes the ILFD suitable for its application in UWB systems.  相似文献   

8.
This letter proposes a new CMOS injection locked frequency divider (ILFD) fabricated in a 0.35 mum CMOS process. The ILFD circuit is realized with a cross-coupled CMOS LC-tank oscillator, and the injecticon is carried out through the bodies of cross- coupled transistors. The self-oscillating ILFD is injection-locked by second-(third-) harmonic input to obtain the division order of two (three). Measurement results show that at the supply voltage of 1.5 V and at the incident power of 10 dBm, the locking range is from the incident frequency 6.94 to 8.41 GHz in the divide-by-3 mode and the operation range is from the incident frequency 4.56 to 5.59 GHz in the divide-by-2 mode.  相似文献   

9.
This letter proposes a new wide band CMOS injection locked frequency divider (ILFD). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. A tuning circuit composed of inductors in series with a metal oxide semiconductor field effect transistor is used to extend the locking range. The divide-by-two ILFD can provide wide locking range and the measured results show that at the supply voltage of 1.8 V, the free-running frequency of the ILFD is operating from 0.92 to 3.6 GHz while the Vtune is tuned from 0 to 1.8 V. At the incident power of 0 dBm, this ILFD has a wide locking range from 1.15 to 7.4 GHz  相似文献   

10.
This letter proposes a wideband injection-locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a differential CMOS LC-tank oscillator and is based on the direct injection topology. The wideband function is obtained by tuning the switch across the tank inductors. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8 V, the dual-band divider free-running frequencies are from 1.77 to 2.17 GHz for the low-band mode, and from 2.59 to 3.2 GHz for the high-band mode. At the incident power of 0 dBm, the locking range is about 1.7 GHz from the incident frequency 3.31 to 5.01 GHz at low band and 4.06 GHz from 3.94 to 8.0 GHz at high-band mode. The circuit can be used as a single wideband ILFD.  相似文献   

11.
This paper, for the first time, investigates hot carrier effect on a divide-by-2 injection-locked frequency divider (ILFD). The ILFD was implemented in the TSMC 0.18 μm 1P6M CMOS process. The ILFD uses direct injection MOSFETs for coupling external signal to the series-resonant resonator. It is shown that the locking range decreases and the oscillation frequency increases with stress time, and the phase noise in both the free-running and locked state increases with stress time. The measured operation range after RF stress also shows degradation from the fresh circuit condition.  相似文献   

12.
This paper proposes a top-series-injection-locked frequency divider (ILFD) with a tunable active inductor with variable division ratio and studies the effect of injection methods on the property of ILFD. With only the differential injection method the ILFD has the modulus of 1, 2, 3, 4, and 5. The ILFD was fabricated in the 0.18 μm 1P6M CMOS technology, and at the supply voltage of 1.5 V, the free-running divider is tunable from 0.13 GHz to 2.93 GHz. The ILFD has wide-operation locking ranges in both divide-by-2 and divide-by-3 mode.  相似文献   

13.
An injection-locked frequency divider (ILFD) with multiple highly nonlinear injection stages is discussed. Implemented in a standard 0.18-mum CMOS technology, measurement shows that multiple division ratios from 6 to 18 are achieved while the locking ranges are all above 1.7 GHz without the need for additional tuning. The ILFD can be locked at the maximum injection frequency of 11 GHz with the power consumption no more than 7.2 mW from a 1.8-V power supply  相似文献   

14.
This letter proposes a wide locking range injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit is made of a dual band two-stage differential complementery metal–oxide–semiconductor (CMOS) ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. The divide-by-two ILFD can provide wide locking range and the measurement results show that at the supply voltage of 1.8-V, the divider free-running frequencies are 1.36GHz and 2.3GHz, and at the incident power of 0dBm, the locking range is about 1.75GHz from the incident frequency 1.9GHz to 3.65GHz at low band and 2.55GHz from 2.95GHz to 5.5GHz at high band.  相似文献   

15.
Numerous circuit topologies have been proposed for divide-by-ρ injection-locked frequency dividers (ILFDs), most of which have been optimized for division by even numbers, especially divide-by-2. It has been more difficult to realize division by odd numbers, such as divide-by-3. In this paper we present simulations of an RF CMOS ILFD that can operate equally well in both divide-by-2 and divide-by-3 modes. The ILFD is based on a cross-coupled CMOS LC oscillator with direct injection and an auxiliary injection path. The paper presents two variants of the circuit architecture and Cadence simulations in the multi-GHz frequency range using a standard TSMC 65 nm CMOS process design kit.  相似文献   

16.
A phase-locked loop (PLL)-based frequency synthesizer at 5 GHz is designed and fabricated in 0.18-${rm mu}hbox{m}$ CMOS technology. The power consumption of the synthesizer is significantly reduced by using an injection-locked frequency divider (ILFD) as the first frequency divider in the PLL feedback loop. The synthesizer chip consumes 18 mW of power, of which only 3.93 mW is consumed by the voltage-controlled oscillator (VCO) and the ILFD at 1.8-V supply voltage. The VCO has the phase noise of $-$ 104 dBc/Hz at 1-MHz offset and an output tuning range of 740 MHz. The chip size is 1.1 mm $times$ 0.95 mm.   相似文献   

17.
A CMOS injection-locked frequency divider (ILFD) with high division ratios and high frequency operation is presented. It consists of a ring oscillator and injection capacitors. An input signal is directly injected through the capacitors into the feedback nodes of the ring oscillator. The proposed ILFD is fabricated in a $0.18~mu{rm m}$ CMOS process and has a chip core size of $68~mu{rm m}times 70~mu{rm m}$. It shows multiple division ratios of 3, 6, and 9. The operation frequency is from 2.2 to 30.95 GHz. At the maximum operation frequency, the ILFD has a locking range of 260 MHz with an input power of less than 0.25 dBm, a division ratio of 9, and a power consumption of 12.5 mW. The locking range increases up to 3.2 GHz as the division ratio and the operation frequency decrease.   相似文献   

18.
A fully integrated 5-GHz phase-locked loop (PLL) based frequency synthesizer is designed in a 0.24 μm CMOS technology. The power consumption of the synthesizer is significantly reduced by using a tracking injection-locked frequency divider (ILFD) as the first frequency divider in the PLL feedback loop. On-chip spiral inductors with patterned ground shields are also optimized to reduce the VCO and ILFD power consumption and to maximize the locking range of the ILFD. The synthesizer consumes 25 mW of power of which only 3.8 mW is consumed by the VCO and the ILFD combined. The PLL has a bandwidth of 280 kHz and a phase noise of -101 dBc/Hz at 1 MHz offset frequency. The spurious sidebands at the center of adjacent channels are less than -54 dBc  相似文献   

19.
A new wide locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ILFD uses two concurrent injection mechanisms with two independent push–push circuits to extend the locking range. It is realized with a cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 11.496 mW. The divider’s free-running oscillation frequency is tunable from 4.32 to 3.78 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 3 GHz (25 %), from the incident frequency 10.5 to 13.5 GHz. The operation range is 3.6 GHz (30.76 %), from 9.9 to 13.5 GHz.  相似文献   

20.
A new wide locking range injection-locked frequency divider (ILFD) using a standard 0.18-$mu$ m CMOS process is presented. The ILFD is based on a differential voltage controlled oscillator (VCO) with two embedded injection metal oxide semiconductor field effect transistors (MOSFETs) for coupling external signal to the resonators. The new VCO is composed of two single-ended VCOs coupled with cross-coupled MOSFETs and a transformer. Measurement results show that at the supply voltage of 1.5 V, the divider's free-running frequency is tunable from 5.85 to 6.17 GHz, and at the incident power of 0 dBm the locking range is about 7.1 GHz (65.4%), from the incident frequency 7.3 to 14.4 GHz. The ILFD has a record locking range percentage among published divide-by-2 $LC$-tank ILFDs.   相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号