Advances in magneto optical static event detector technology

Magneto-optical static event detectors, introduced at the 1998 EOS/ESD Symposium, have been demonstrated as a useful tool to detect low-level transients that damage magnetoresistive (MR) and giant magnetoresistive (GMR) recording heads. Improvements in magneto-optic film characteristics, device design, and wafer fabrication methods will result in enhanced sensitivity to those transients. Improvements in packaging and performance repeatability are described     

Field failure mechanism and improvement of EOS failure of integrated IGBT inverter modules

In this paper, we have proved that the soft damage from human body ESD can actually cause EOS damage, while integrated IGBT inverter modules (or intelligent power modules) are operating. Failure mechanism was defined as a latchup phenomenon by ESD damage leakage. Failure modes of each failed IGBT inside two integrated IGBT inverter modules were soft and hard burnout, respectively. To determine the failure mechanism, we have done fault tree analysis. From this analysis, we could conclude the main factor as the ESD event between device ESD immunity and PCB assembly line. In addition, from the PCB assembly line, we have identified damage samples due to an ESD event. Based on this result, we have implied ESD on IGBT and intentionally caused a leakage, then applied the device to the system. After an aging test, we could reproduce soft burnout and hard burnout.     

A micron-sized GMR sensor with a CoCrPt hard bias

A GMR (giant magneto-resistive) spin valve sensor for magnetic recording has been designed in an attempt to solve the Barkhausen noise problem in small-sized GMR sensors. In this study, the GMR ratio of the top-pinned spin valve is optimized to a value of 13.2%. The free layer is magnetized perpendicular to the pinned layer by a CoCrPt permanent magnetic bias so that a linear magnetic field response can be obtained. An obvious improvement on performance is observed when the permanent magnetic bias is magnetized, while the GMR sensor has a steadier MR-H loop and a smaller coercive field.     

具有CoCrPt硬磁偏置的微尺寸巨磁阻传感器

本文介绍了一种基于GMR自旋阀的磁场传感器,它用于读取磁记录信息,并且通过硬磁偏置层解决了小尺寸GMR中存在的巴克豪森噪声问题. 传感器采用顶钉扎的自旋阀结构的GMR,磁电阻经过优化达到13.2%. 自旋阀的自由层被CoCrPt永磁体磁化到和被钉扎层的磁化方向相互垂直,这样可以使磁传感器得到线性的磁场探测性能. 对磁场传感器经过测试发现,硬磁偏置层在磁化后相较于磁化前,磁传感器的MR-H曲线得到明显改善,且矫顽力降低.     

Possible new mechanism of chip latent damage due to ESD

This paper introduces a possible new, to-date not recognized mechanism of microelectronic chip damage due to ESD as well as numerical simulation of some corresponding damage scenarios for an ESD protection device.The model presented herein recognizes the effects of thermo-mechanical coupling that can produce excessive mechanical stresses, elastic shock waves and mechanical damage in a chip during an ESD event. This mechanism can get activated at temperatures well below melting point and thus may be an early contributor to latent and “hard” ESD failures.     

GMR生物传感器的原理及研究现状

GMR生物传感器包括三个部分,即免疫磁性微球、高灵敏度GMR传感器以及相关读出电路。与其他生物传感器相比,它具有灵敏度高、分辨力强、价格低、市场普及潜力大、设备小型化及测量过程自动化等优点。综述了GMR生物传感器的研究现状,对相关技术的工作原理进行了分析,提出了GMR生物传感器的应用前景和有待解决的问题。     

GMR生物传感器的原理及研究现状

GMR生物传感器包括三个部分，即免疫磁性微球、高灵敏度GMR传感器以及相关读出电路。与其他生物传感器相比，它具有灵敏度高、分辨力强、价格低、市场普及潜力大、设备小型化及测量过程自动化等优点。综述了GMR生物传感器的研究现状，对相关技术的工作原理进行了分析，提出了GMR生物传感器的应用前景和有待解决的问题。     

基于巨磁致电阻电流检测机理的电流驱动同步整流器

本文将一种基于巨磁致电阻(Giant Magneto Resistive--GMR)的电流检测技术应用于同步整流技术中.该技术可以克服传统电流驱动同步整流器中电流检测器件损耗较大、不能测直流、漏感大、不能工作于高频等缺点.本文内容包括GMR电流检测技术原理和性能分析,GMR电流检测电流驱动同步整流正激变换器的实验研究.研究结果表明,该变换器工作性能理想,在轻载情况下效率有较大幅度的提高,说明GMR是一种可以实际应用的电流检测技术.     

基于GMR生物传感器的甲胎蛋白检测

采用磁控溅射、光刻、离子束刻蚀和剥离工艺等工艺和方法,制备了多层膜结构的巨磁阻(GMR)生物传感器件,并利用此种传感器来检测甲胎蛋白。在传感器表面通过生物处理固定甲胎蛋白单克隆抗体(McAb1)作为探针,以捕获目标抗原———甲胎蛋白。用直径1μm的超顺磁磁珠标记目标抗原。当传感器表面抗体将目标抗原捕获后,磁珠标记即被固定在GMR传感器的表面。垂直于传感器表面施加230 Oe(1 Am-1=4π×10-3 Oe)的磁场,即可检测到由磁珠产生的信号。本实验对质量浓度为1 ng/mL的甲胎蛋白进行了检测,得到了信号为0.29～0.34Ω的电阻变化值。此种检测方法可用于诊断原发性肝癌。     

巨磁阻生物传感器阵列及专用锁相放大器设计

EW_GⅠ是基于GMR(巨磁阻)传感器,用于检测血样中特种病毒的正在研发的生物芯片系统。叙述了其巨磁阻传感器阵列以及后端锁相放大IC电路的设计及实现。该阵列包含32个GMR传感器单元和2个传感器参考单元,形成多路的半桥式惠斯通电桥,用于感应绑定磁球的附加磁场。每个单元(100μm×100μm)由长1mm、宽7μm的巨磁电阻蜿蜒而成,该电阻采用[Ag(2nm)/NiFe(6nm)/Cu(2.2nm)/CoFe(4nm)]20结构,采用Ag作为镜面层,其饱和磁场小于等于30mT,GMR值约6%,单个传感器电阻约为780Ω。配套的锁相放大芯片包括了信号通道、参考通道、前置低噪声放大器、带通滤波器、可控增益放大器、相敏检测电路、正交移相电路、差分直流放大电路八个部分,整个设计功耗小于50mW@Vcc=3V。     

Monolithic integration of Giant Magnetoresistance (GMR) devices onto standard processed CMOS dies

Giant Magnetoresistance (GMR) based technology is nowadays the preferred option for low magnetic fields sensing in disciplines such as biotechnology or microelectronics. Their compatibility with standard CMOS processes is currently investigated as a key point for the development of novel applications, requiring compact electronic readout. In this paper, such compatibility has been experimentally studied with two particular non-dedicated CMOS standards: 0.35 μm from AMS (Austria MicroSystems) and 2.5 μm from CNM (Centre Nacional de Microelectrònica, Barcelona) as representative examples. GMR test devices have been designed and fabricated onto processed chips from both technologies. In order to evaluate so obtained devices, an extended characterization has been carried out including DC magnetic measurements and noise analysis. Moreover, a 2D-FEM (Finite Element Method) model, including the dependence of the GMR device resistance with the magnetic field, has been also developed and simulated. Its potential use as electric current sensors at the integrated circuit level has also been demonstrated.     

低矫顽力GMR磁传感器及其单畴模型的研究

在硅片上制备结构为Ta/NiFeCr/NiFe/CoFe/Cu/CoFe/IrMn/Ta的IrMn顶钉扎自旋阀薄膜,并最终制成了一组基于此自旋阀结构的GMR磁传感器芯片。利用弱磁场下的退火工艺,改变薄膜易磁化轴的方向,当退火温度为150℃、外加磁场为120Oe时,GMR芯片的矫顽力可以降至0.2Oe以下。同时建立了一种自旋阀自由层的单畴模型,用以解释这一退火效应。利用Mat-lab计算GMR芯片的Meff-H曲线,所得到的计算结果与实验结果一致。所以,自旋阀自由层易磁化轴的方向与GMR磁传感器的性能有着密切的关系。     

一种自旋阀GMR隔离放大器设计

为了解决传统光电隔离、电容隔离和变压器隔离存在的线性度及频率特性等问题,设计了一种自旋阀巨磁阻（GMR）隔离放大器,具有灵敏度高、线性度好及结构简单等特点,且可以与硅等半导体电路集成。基于CSMC 0.5μm混合信号工艺,采用Tanner软件对电路进行编辑、仿真与验证。隔离器前端电路可将0～5 V的输入电压转换为1.4～10 mA电流,后端接收电路在增益为1时的共模抑制比为73 dB,增益可调节范围为1～200,工作带宽大于100 kHz,能满足恶劣环境条件下应用的各项指标要求。     

Au/Fe磁性多层膜在离子束混合过程中的巨磁电阻效应在线研究

在离子束混合条件下,在线研究了Au/Fe磁性多层膜转变为纳米颗粒膜过程中的巨磁电阻效应,发现了不同磁场强度下的离子束混合对巨磁电阻效应影响的初步规律,测量了不同注入剂量和磁场强度下的巨磁电阻,并对结果进行了讨论。     

光电隔离开关抗静电放电试验失效原因分析

在抗静电放电（ESD）试验后通常会使用I-V特性扫描对器件是否失效进行判断。但对有些特殊电路而言,使用这种I-V特性扫描可能对电路造成电应力损伤,导致对电路是否满足ESD试验能力做出错误的判断。文章主要以光电隔离开关为例,分析了造成这种现象的原因,并提出在进行该类光电器件的ESD试验过程中不进行端口I-V特性扫描,以避免由此带来的额外损伤。     

Floating gate EEPROM as EOS indicators during wafer-level GMRprocessing

Potentially damaging charging currents and voltages in wafer-level giant magnetoresistance (GMR) plasma processing tools have been measured using floating gate EEPROM (FG-EEPROM) monitor wafers. Although FG-EEPROM monitors have been used as semiconductor process monitors, this report demonstrates their use in electrostatic discharge (ESD)-sensitive GMR head production. Use of FG-EEPROM monitors allows quantification of plasma-induced EOS voltages and currents, and can be used in optimizing process tool EOS performance, as is demonstrated in a case study on an ion mill     

硬盘磁头生产中的ESD防护技术

基于ESD在硬盘磁头生产过程中的产生机理,文章分析了ESD在磁头生产中的几种典型损坏模型,阐述了硬盘磁头生产中如何进行ESD防护,提出了对工作人员、生产机器、生产方法、物料和生产环境等有效的ESD防护技术,从而有效减少在硬盘磁头生产中ESD对磁头的损坏。     

Wafer charging in process equipment and its relationship to GMRheads charging damage

Significant know-how and understanding of device charging damage in processing equipment exists in complementary metal oxide semiconductor (CMOS) integrated circuit (IC) manufacturing. This paper introduces the basic charging mechanisms responsible for gate oxide damage in CMOS ICs, illustrates these mechanisms with examples of measurements obtained in contemporary IC processing equipment, and shows how this knowledge could be applied to the control of charging damage in GMR heads wafer processing. A wafer charging characterization method successfully used by integrated circuit and equipment manufacturers to quantify wafer charging in process equipment is also described     

电子设备中的ESD保护设计

介绍了静电放电(ESD)的工作机理以及静电放电给电子元器件所带来的损伤。通过对比压敏电阻与瞬变电压抑制二极管(TVS管)的特点,给出了如何选择ESD保护器件的一些建议。在分析了TVS管的工作原理及关键参数基础上,对TVS管选型标准进行了简要介绍。针对使用TVS管的保护电路,以IEC61000-4-2最高严酷度级别4的环境对电路中的寄生参数进行了分析,提出了优化ESD保护器件性能及PCB保护电路设计时需要注意的事项。以MAX3490E为例指出了集成片上ESD系统芯片的优点。     

Hot-electron reliability and ESD latent damage

The impact of noncatastrophic electrostatic discharge (ESD) stress on hot-electron reliability as well as the effect of hot-electron (HE) injection on the ESD protection threshold are discussed. It is found that there is a factor-of-two-to-four deterioration in hot-electron reliability after low-level ESD stress. These two effects can be viewed as similar although HE is a low-current long-time process and ESD is a high-current short-time process. Therefore, techniques for characterizing hot-electron degradation were applied to measure quantitatively the damage due to ESD stress. This technique showed electrical evidence of current filaments during an ESD discharge