适合音频应用的开关放大器

为适宜便携式设备应用,音频应用中越来越多地使用D类开关放大器。具有6个以上大功率音频的家庭影院系统,需要将所有的电路组装在很小的盒体中,这是很大的挑战。本文仔细探究了D类放大器解决方案,并解释了为什么认真选择元件是成功实现D类放大器的关键。     

新闻

ADI推出两款低功耗D类音频放大器SSM2301/04 ADI日前推出两款D类音频放大器SSM2301/SSM2304,以满足便携式电子设备低功耗、小尺寸以及不断增长的高保真音质的设计需求。ADI公司作为家庭和专业应用创新音频处理解决方案的领先公司,凭借其D类放大器的专家经验,不断致力于满足手机、便携式游戏机、MP3播放     

为便携式电子设备设计D类音频放大器

大多数便携式电子产品需要使用失真低、效率高、体积小、成本低的高性能音频放大器,只有设计优良的D类音频放大器才能同时满足所有这些需求.本文将探讨如何解决在为便携式电子产品设计D类音频放大器时经常遇到的一些问题,包括效率、电磁干扰(EMI)、失真和噪声等.     

应用于无滤波器D类放大器的改进PWM调制方案

D类放大器的高效特性,使其成为便携式和大功率应用的理想选择。传统的D类放大器需戋一个外部低通滤波器,以从脉宽调制信号（PWM）输出波形中提取音频信号。文章阐述了一种应用于无滤波器D类放大器的改进PWM调制方案,分析了其工作原理、优缺点和引起失真的主要原因。利用这种方法实现的D类功率放大器具有高效率高性能的特点,省掉外部滤波器不仅降低了电路板的空间要求,同时也大幅降低了很多便携式应用的成本。     

D类音频功放

D类音频功率放大器的效率比B类、AB类高得多，可达85％左右，现已开发出无需输出滤波器的器件，使电路更为简单。这些特点使之更适用于由电池供电的便携式应用。近年来，这种原用于大功率的D类放大器逐步应用到小功率的便携式产品中。它们的特点是工作电压低、输出功率小、功耗小、器件封装小。本文介绍一组适用于便携式应用的D类音频功率放大器。     

D类音频功率放大器的研究与实现

介绍了采用D类放大器来完成音频信号变换与放大的电路设计。D类放大器采用了改进的方案,即用FPGA作为逻辑控制器实现对PWM H全桥功率放大电路的控制。设计的D类放大器可对数字音源输出的音频信号进行直接放大,为数字音源和功率放大的整合提供了完整的解决方案。他具有比其他类型放大器更高的效率和更低的转换失真,正越来越多地应用在便携式器件中,因此设计课题具有很好的现实意义。     

TPA2050D4：音频子系统

TI宣布推出一款模拟输入音频子系统，该系统在小型封装中集成了TI业经验证的立体声D类功率放大器与立体声DirectPoth耳机放大器。该音频子系统具有高灵活性，使客户能够选择不同的输入至输出配置，并对设计参数进行编程，从而优化音频性能。将所有放大器通道集成到统一的集成电路上，可减少材料清单并降低成本，同时使无线手持终端、便携式DVD播放器、便携式游戏机以及便携式媒体播放器等众多产品的最终设计更加时尚美观。     

TI推出具DRC与扬声器保护功能的立体声D类放大器

对D类音频放大器来说,如何在保证良好信噪比的同时最大化声音响度是一个设计挑战。为了提供足够大的声音输出,使用升压电路和动态范围压缩(DRC)是两种常用的方法。TI中国区高性能模拟产品业务开发经理张洪为指出,对于市场上针对便携式应用的D类音频放大器,不仅要保护喇叭,还要改善便携式产品的实际使用状况,需要动态范围压缩的产品。TPA2016D2就是TI新推出的一款具有扬声器保护与动态范围压缩性能的D类放大器。     

高集成度音频子系统提升无线终端出色音质

德州仪器(TI)近日推出一款模拟输入音频子系统TPA2050D4,该系统在小型封装中集成了TI业经验证的立体声D类功率放大器与立体声DirectPath耳机放大器,具有高灵活性,使客户能够选择不同的输入至输出配置,并对设计参数进行编程,从而优化音频性能。TPA2050D4将所有放大器通道集成到统一的集成电路上,可减少材料清单并降低成本,同时使无线手持终端、便携式DVD播放器、便携式游戏机以及便携式媒体播放器等众多产品的最终设计更加时尚美观。     

D类音频功放电路MAX9759

MAX9759是采用BiCMOS工艺制作的3.2W无滤波器D类音频功率放大器芯片，内含4219个晶体管。MAX9759提供92％的高效率和AB类放大器优异的音频性能。MAX9759是为应用于蜂窝电话、PDA、笔记本PC、便携式DVD播放机、平板PC监视器、LCD-TV和LCD投影机而专门设计的。     

高效D类音频功率放大器的设计

D类功率放大器适应便携设备高效节能的客观需求,从而在音频模拟集成领域具有优势,随着设计技术的不断进步,D类功率放大器的性能指标也逐渐接近AB类放大器。通过分析基于CMOS工艺的D类音频功率放大器构成、驱动实现、性噪比、失真度等方面的特性来简要描述此类电路的设计思路。同时具体讨论了D类音频放大器各模块的工作原理和设计要点,针对设计要求比较高的驱动部分、抗干扰和噪声抑制部分以及抗EMS的设计都做了较详细的分析和论述。     

A high efficiency PWM CMOS class-D audio power amplifier

Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.     

A THD-reduction high-efficiency audio amplifier using inverter-based OTAs with filter-output feedback

This paper presents an integrated low-voltage THD-reduction high-efficiency class-D audio amplifier using inverter-based operational transconductance amplifiers (OTAs). We propose a negative feedback loop which can compensate for external perturbations and improving output precision. The compensator increases the audio-frequency loop gain, and leads to a better rejection of audio-frequency disturbances. The use of inverter-based OTA and comparator provides low-voltage operation and low-power dissipation. The audio amplifier operates with a 1.5 V supply voltage with maximum power efficiency of 90%. The proposed class-D amplifier was implemented using a TSMC 0.18-μm 1P6M CMOS process, and the active chip area is 1.87 mm².     

Performance comparison of integrated fully-differential filterless class-D amplifiers with different feedback techniques

Two integrated stereo fully differential filterless class-D amplifiers are presented in this paper. The object is to develop a modulation of a class-D audio amplifier with high power efficiency in this paper. The traditional H-bridge class-D audio amplifier has a shortcoming of large signal distortion which is worse than realized. However, the proposed circuit improves the drawback and provides high power efficiency at the same time. The circuit implements a modified scheme of pulse-width modulation. In this paper, we presented two class-D amplifiers, compared their differences and explained why the efficiency and distortion performance can be modified. The increase in total harmonic distortion (THD) is due to non-linearity in the triangle wave. To overcome this problem, a negative feedback from the output of the switching power stage is adopted to reduce the THD. When a 0.7-V_PP and 1 kHz sine wave is used as an input signal, the minimum THD is 0.029 % and the maximum power efficiency is 83 %. The fully differential class-D audio amplifier is implemented with a TSMC 0.35-μm 2P4M CMOS process, and the chip area is 2.57 × 2.57 mm² (with PADs).     

A 280 mW, 0.07% THD+N class-D audio amplifier using a frequency-domain quantizer

Pulse density modulation (PDM) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in pulse width modulation based amplifiers. However, their low-voltage analog implementations also require a linear loop filter and a quantizer. A PDM based class-D audio amplifier using a frequency-domain quantization is presented. The digital intensive frequency-domain approach achieves high linearity under low supply regimes. An analog comparator and a single-bit quantizer are replaced with a current controlled oscillator (ICO) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, single-bit, class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18???m CMOS process with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-?? loudspeaker load. The amplifier can deliver the output power of 280 mW.     

Effect of dead time on harmonic distortion in class-D audio poweramplifiers

A model is described for predicting the harmonic levels introduced by the use of dead time in class-D, PWM-driven audio power output stages. The model demonstrates that the harmonic levels are a function of load impedance, modulation depth, dead time and switching frequency. In addition, measurements show that, for audio applications, dead time is the dominant cause of power stage nonlinearity     

A design methodology for high-order class-D audio amplifiers

This paper presents a design methodology for high-order class-D amplifiers, based on their similarity with sigma–delta ( $\Upsigma\Updelta$ ) modulators, for which established theory and toolboxes are available. The proposed methodology, which covers the entire design flow, from specifications to component sizing, is validated with three design examples, namely a second-order, a third-order, and a fourth-order class-D amplifier. Moreover, the third-order class-D amplifier has been integrated on silicon and characterized, further confirming the validity of the whole design flow. The achieved results demonstrate that high-order class-D amplifiers can achieve total-harmonic-distortion (THD) performance compatible with the specifications of high-end audio applications (THD  ≈ 90 dB), which would be unfeasible with conventional first-order class-D amplifiers.     

Integrated overcurrent protection system for class-D audio power amplifiers

A fully integrated overcurrent protection system is presented suitable for application in integrated class-D audio power amplifiers. Accurate overcurrent detection is used based on parallel measurement of the voltage drop across the DMOS power transistors. A logic circuit enables continuous current limiting during overload situations. Actual short circuits can be distinguished from load impedance minima using a simple short-circuit discrimination method.     

数字音频D类功放电源误差校正方法研究

为了实时校正供电电源噪声引起的数字音频D类功放输出误差,提出一种基于FPGA的电源误差校正方法。使用高精度ADC芯片将电源纹波信号转化为数字量后送入FPGA,校正模块根据电源纹波的大小对数字音频D类功放Sigma-Delta调制器输入值进行预校正处理,从而实现在功放输出端有效的抑制电源噪声。经过实际电路测试,该方法可以有效的抑制电源噪声对数字音频D类功放的影响,电源抑制比达到36.78 dB。