Investigation of strontium tantalate thin films for high-k gate dielectric applications

Strontium tantalate (STO) films were grown by liquid-delivery (LD) metalorganic chemical vapor deposition (MOCVD) using Sr[Ta(OEt)₅(OC₂H₄OMe)]₂ as precursor. The deposition of the films was investigated in dependence on process conditions, such as substrate temperature, pressure, and concentration of the precursor. The growth rate varied from 4 to 300 nm/h and the highest rates were observed at the higher process temperature, pressure, and concentration of the precursor. The films were annealed at temperatures ranging from 600 to 1000 °C. Transmission electron microscopy (TEM), X-ray diffraction (XRD), and ellipsometry indicated that the as-deposited and the annealed films were uniform and amorphous and a thin (>2 nm) SiO₂ interlayer was found. Crystallization took place at temperatures of about 1000 °C. Annealing at moderate temperatures was found to improve the electrical characteristics despite different film thickness (effective dielectric constant up to 40, the leakage current up to 6×10⁻⁸ A/cm², and lowest midgap density value of 8×10¹⁰ eV⁻¹ cm⁻²) and did not change the uniformity of the STO films, while annealing at higher temperatures (1000 °C) created voids in the film and enhanced the SiO₂ interlayer thickness, which made the electrical properties worse. Thus, annealing temperatures of about 800 °C resulted in an optimum of the electrical properties of the STO films for gate dielectric applications.     

Effects of oxygen partial pressure on structural and electrical characteristics of HfAlO high-k gate dielectric grown on strained SiGe by pulsed-laser deposition

Dependence of oxygen partial pressures on structural and electrical characteristics of HfAlO (Hf:Al=1:1) high-k gate dielectric ultra-thin films grown on the compressively strained Si₈₃Ge₁₇ by pulsed-laser deposition were investigated. The microstructure and the interfacial structure of the HfAlO thin films grown under different oxygen partial pressures were studied by transmission electron microscopy, and the their electrical properties were characterized by capacitance–voltage (C−V) and conductance–voltage measurements. Dependence of interfacial layer thickness and C–V characteristics of the HfAlO films on the growth of oxygen pressure was revealed. With an optimized oxygen partial pressure, an HfAlO film with an effective dielectric constant of 16 and a low interface state density of 2.1×10¹⁰ cm⁻² eV⁻¹ was obtained.     

Electrical properties of oxidized polycrystalline silicon as a gate insulator for n-type 4H-SiC MOS devices

MOS capacitors were produced on n-type 4H-SiC using oxidized polycrystalline silicon (polyoxide). The polyoxide samples grown by dry oxidation without an anneal had a high interface state density (D_it) of 1.8 × 10¹² cm⁻² eV⁻¹ and the polyoxide samples grown by wet oxidation had a lower D_it of 1.2 × 10¹² cm⁻² eV⁻¹ (both at 0.5 eV below the conduction band). After 1 h Ar annealing, the D_it of wet polyoxide was reduced significantly to 2.6 × 10¹¹ cm⁻² eV⁻¹ (at 0.5 eV below the conduction band). Dry polyoxide exhibits higher breakdown electric fields than wet polyoxide. The interface quality and breakdown characteristics of polyoxide are comparable to published results of low-temperature CVD deposited oxides.     

Low-temperature conductance measurements of surface states in HfO2–Si structures with different gate materials

Metal-oxide-semiconductor capacitors based on HfO₂ gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator–semiconductor interface.C–V and G–ω measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180–300 K. From the maximum of the plot G/ω vs. ln(ω) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge.The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2×10¹¹ cm⁻²eV⁻¹ for Al and up to (3.5–5.5)×10¹² cm⁻² eV⁻¹ for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8×10⁻¹⁷ cm² at 200 K for Al–HfO₂–Si structure.     

Germanium FETs and capacitors with rare earth CeO2/HfO2 gates

Long channel Ge FETs and capacitors with CeO₂/HfO₂/TiN gates were fabricated by photolithography and gate wet etch. Rare earth CeO₂ in direct contact with Ge was used as a passivating layer producing lowest D_it values in the mid 10¹¹ eV⁻¹ cm⁻² range. HfO₂ cap reduces leakage and improves equivalent oxide thickness scaling of the whole gate stack. The p-FETs show exceptionally high I_ON/I_OFF ratio 10⁶, mainly due to low OFF current, and peak channel mobility around 80 cm²/V s. The n-FETs, although functional, show inferior performance producing ON currents an order of magnitude lower compared to p-FETs.     

Charge trapping and interface states in hydrogen annealed HfO2–Si structures

Metal–oxide–semiconductor (MOS) capacitors based on HfO₂ gate stacks with Al and TiN gates are compared to study the effect of the gate electrode material to the properties of insulator–semiconductor interface. The structures under study were shown to contain interface trap densities of around 2 × 10¹¹ cm⁻² eV⁻¹ for Al gate and up to 5.5 × 10¹² cm⁻² eV⁻¹ for TiN gate. The peak in the surface state distribution was found at 0.19 eV above the valence band edge for Al electrode. The respective capture cross-section is 6 × 10⁻¹⁷ cm² at 200 K.The charge injection experiments have revealed the presence of hole traps inside the dielectric layer. The Al-gate structure contains traps with effective capture cross-section of 1 × 10⁻²⁰ cm², and there are two types of traps in the TiN-gate structure with cross-sections of 3.5 × 10⁻¹⁹ and 1 × 10⁻²⁰ cm². Trap concentration in the structure with Al electrode was considerably lower than in the structure with TiN electrode.     

ICP-induced defects in GaN characterized by capacitance analysis

The defects induced by inductively coupled plasma reactive ion etching (ICP-RIE) on a Si-doped gallium nitride (GaN:Si) surface have been analyzed. According to the capacitance analysis, the interfacial states density after the ICP-etching process may be higher than 5.4 × 10¹² eV⁻¹ cm⁻², compared to around 1.5 × 10¹¹ eV⁻¹ cm⁻² of non-ICP-treated samples. After the ICP-etching process, three kinds of interfacial states density are observed and characterized at different annealing parameters. After the annealing process, the ICP-induced defects could be reduced more than one order of magnitude in both N₂ and H₂ ambient. The H₂ ambient shows a better behavior in removing ICP-induced defects at a temperature around 500 °C, and the interfacial states density around 2.2 × 10¹¹ eV⁻¹ cm⁻²can be achieved. At a temperature higher than 600 °C, the N₂ ambient provides a much more stable interfacial states behavior than the H₂ ambient.     

High temperature characterization of high-κ dielectrics on SiC

We have fabricated thin catalytic metal–insulator–silicon carbide based structure with palladium (Pd) gates using TiO₂ as the dielectric. The temperature stability of the capacitor is of critical importance for use in the fabrication of electronics for deployment in extreme environments. We have evaluated the response to temperatures in excess of 450 °C in air and observed that the characteristics are stable. Results of high temperature characterization are presented here with extraction of interface state density up to 650 °C. The results show that at temperatures below 400 °C the capacitors are stable, with a density of interface traps of approximately 6×10¹¹ cm² eV⁻¹. Above this temperature the C–V and G–V characteristics show the influence of a second set of traps, with a density around 1×10¹³ cm² eV⁻¹, which is close to that observed for slow states near the conduction band edge. The study of breakdown field as a function of temperature shows two distinct regions, below 300 °C where the breakdown voltage has a strong temperature dependence and above 300, where it is weaker. We hypothesize that the oxide layer dominates the breakdown voltage at low temperature and the TiO₂ layer above 300 °C. These results at high temperatures confirms the suitability of the Pd/TiO₂/SiO₂/SiC capacitor structure for stable operation in high temperature environments.     

Correlation between infrared transmission spectra and the interface trap density of SiO2 films

This work is an attempt to estimate the electrical properties of SiO₂ thin films by recording and analyzing their infrared transmission spectra. In order to study a big variety of films having different infrared and electrical properties, we studied SiO₂ films prepared by low pressure chemical vapor deposition (LPCVD) from SiH₄ + O₂ mixtures at 425 °C and annealed at 750 °C and 950 °C for 30 min. In addition thermally grown gate quality SiO₂ films of similar thickness were studied in order to compare their infrared and electrical properties with the LPCVD oxides. It was found that all studied SiO₂ films have two groups of Si–O–Si bridges. The first group corresponds to bridges located in the bulk of the film and far away from the interfaces, the grain boundaries and defects and the second group corresponds to all other bridges located near the interfaces, the grain boundaries and defects. The relative population of the bulk over the boundary bridges was found equal to 0.60 for the LPCVD film after deposition and increased to 4.0 for the LPCVD films after annealing at 950 °C. Thermally grown SiO₂ films at 950 °C were found to have a relative population of Si–O–Si bridges equal to 3.9. The interface trap density of the LPCVD film after deposition was found equal to 5.47 × 10¹² eV⁻¹ cm⁻² and decreases to 6.50 × 10¹⁰ eV⁻¹ cm⁻² after annealing at 950 °C for 30 min. The interface trap density of the thermally grown film was found equal to 1.27 × 10¹¹ eV⁻¹ cm⁻² showing that films with similar Si–O–Si bridge populations calculated from the FTIR analysis have similar interface trap densities.     

Extraction of interface states at emitter–base heterojunctions in AlGaAs/GaAs heterostructure bipolar transistors using sub-bandgap photonic excitation

Distribution of interface states at the emitter–base heterojunctions in heterostructure bipolar transistors (HBTs) is characterized by using current–voltage characteristics using sub-bandgap photonic excitation. Sub-bandgap photonic source with a photon energy E_ph which is less than the energy bandgap E_g (E_g,GaAs = 1.42, E_g,AlGaAs = 1.76 eV) of emitter, base, and collector of HBTs, is employed for exclusive excitation of carriers only from the interface states in the photo-responsive energy range at emitter–base heterointerface. The proposed method is applied to an Al_0.3Ga_0.7As/GaAs HBT (A_E = W_E × L_E = 250 × 100 μm²) with E_ph = 0.943 eV and P_opt = 3 mW. Extracted interface trap density D_it was observed to be D_it,max  4.2 × 10¹² eV⁻¹ cm⁻² at emitter–base heterointerface.     

Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Electrical properties of SiO2/TiO2 high-k gate dielectric stack

The trapping/detrapping behavior of charge carriers in ultrathin SiO₂/TiO₂ stacked gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Titanium tetrakis iso-propoxides (TTIP) was used as the organometallic source for the deposition of ultra-thin TiO₂ films at low temperature (<200 °C) on strained-Si/relaxed-Si_0.8Ge_0.2 heterolayers by plasma-enhanced chemical vapor deposition (PECVD) in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. Stress-induced leakage current (SILC) through SiO₂/TiO₂ stacked gate dielectric is modeled by taking into account the inelastic trap-assisted tunneling (ITAT) mechanism via traps located below the conduction band of TiO₂ layer. The increase in the gate current density observed during CVS from room temperature up to 125 ^oC has been analyzed and modeled considering both the buildup of charges in the layer as well as the SILC contribution. Trap generation rate and trap cross-section are extracted. A capture cross-section in the range of 10⁻¹⁹ cm² as compared to 10⁻¹⁶ cm² in SiO₂ has been observed. A temperature-dependent trap generation rate and defects have also been investigated using time-dependent current density variation during CVS. The time dependence of defect density variation is calculated within the dispersive transport model, assuming that these defects are produced during random hopping transport of positively charge species in the insulating high-k stacked layers. SILC generation kinetics, i.e. defect generation probability under different injected fluences for various high-constant stress voltages in both polarities have been studied. An empirical relation between trap generation probability and applied stress voltage for various injected fluences has been developed.     

Electrically active defects induced by hydrogen and helium implantations in Ge

Results of a study of electrically active defects induced in Sb-doped Ge crystals by implantations of hydrogen and helium ions (protons and alpha particles) with energies in the range from 500 keV to 1 MeV and doses in the range 1×10¹⁰–1×10¹⁴ cm⁻² are presented in this work. Transformations of the defects upon post-implantation isochronal anneals in the temperature range 50–350 °C have also been studied. The results have been obtained by means of capacitance–voltage (C–V) measurements and deep-level transient spectroscopy (DLTS).It was found from an analysis of DLTS spectra that low doses (<5×10¹⁰ cm⁻²) of H and He ion implantations resulted in the introduction of damage similar to that observed after MeV electron irradiation. The Sb–vacancy complex was the dominant deep-level defect in the lightly implanted samples. After implantations with doses higher than 5×10¹⁰ cm⁻² peaks due to more complex defects were observed in the DLTS spectra. Implantations with heavy (5×10¹³ cm⁻²) doses of both H and He ions caused the formation of a sub-surface layer with a high (up to 1×10¹⁷ cm⁻³) concentration of donors. These donors were eliminated by anneals at temperatures in the range 100–200 °C. Heat treatments of the heavy proton-implanted Ge samples in the temperature range 250–300 °C resulted in the formation of shallow hydrogen-related donors, the concentration of which was the highest in a region close to the projected depth of implanted protons. The maximum peak concentration of the H-related donors was higher than 1×10¹⁵ cm⁻³ for a proton implantation dose of 1×10¹⁴ cm⁻².     

Determination of the electronic parameters of nanostructure SnO2/p-Si diode

The current–voltage and capacitance–voltage characteristics of the nanostructure SnO₂/p-Si diode have been investigated. The optical band gap and microstructure properties of the SnO₂ film were analyzed by optical absorption method and scanning electron microscopy, respectively. The optical band of the film was found to be 3.58 eV with a direct optical transition. The scanning electron microcopy results show that the SnO₂ film has the nanostructure. The ideality factor, barrier height and series resistance values of the nanostructure SnO₂/p-Si diode were found to be 2.1, 0.87 eV and 36.35 kΩ, respectively. The barrier height obtained from C–V measurement is higher than obtained from I–V measurement and this discrepancy can be explained by introducing a spatial distribution of barrier heights due to barrier height inhomogeneities, which are available at the nanostructure SnO₂/p-Si interface. The interface state density of the diode was determined by conductance technique and was found to be 8.41 × 10¹⁰ eV⁻¹ cm⁻².It is evaluated that the nanostructure of the SnO₂ film has an important effect on the ideality factor, barrier height and interface state density parameters of SnO₂/p-Si diode.     

Fabrication and characterization of air-stable, ambipolar heterojunction-based organic light-emitting field-effect transistors

We present our first application of the neutral cluster beam deposition (NCBD) method to fabricate bilayer heterojunction-based organic light-emitting field-effect transistors (OLEFETs) by superimposing two layers of α,ω-dihexylsexithiophene (DH6T) and N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13) successively. Based upon well-balanced ambipolarity (hole and electron field-effect mobilities of 2.22 × 10⁻² and 2.78 × 10⁻² cm²/Vs), the air-stable OLEFETs have demonstrated good field-effect characteristics, stress-free operational stability and electroluminescence under ambient condition.     

The properties of high-k gate dielectric films deposited on HRSOI

In this paper, HfO₂ dielectric films with blocking layers (BL) of Al₂O₃ were deposited on high resistivity silicon-on-insulator (HRSOI), and the interfacial and electrical properties are reported. High-resolution transmission electron microscopy (HRTEM) indicated that BL could thin the interfacial layer, keep the interface smooth, and retain HfO₂ amorphous after annealing. Energy dispersive X-ray spectroscopy (EDS) and X-ray photoelectron spectroscopy (XPS) confirmed that BL weaken Si diffusion and suppressed the further growth of HfSiO. Electrical measurements indicated that there was no hysteresis was observed in capacitance–voltage curves, and Flatband shift and interface state density is 0.05 V and −1.3 × 10¹² cm⁻², respectively.     

Control of Ga doping level in β-FeSi2 using Sn–Ga solvent

We have grown n- and p-type β-FeSi₂ single crystals by the temperature gradient solution growth method using Sn–Ga solvent. The conduction type and the carrier density of the crystals were controlled by the Ga composition in the Sn–Ga solvent. The conduction type was changed from n- to p-type between the Ga composition of 10.2 and 18.5 at% in the solvent. Depending on the Ga composition in the solvent, the carrier density of n- and p-type crystals was changed from 1.5×10¹⁷ to 3×10¹⁷ cm⁻³ and 4×10¹⁷ to 2×10¹⁹ cm⁻³, respectively. The activation energies of n-type crystals were 0.09–0.11 eV while that of p-type crystals were 0.02–0.03 eV.     

New dielectric material system of Nd(Mg1/2Ti1/2)O3–CaTiO3 at microwave frequency

The microwave dielectric properties of (1 − x)CaTiO₃–xNd(Mg_1/2Ti_1/2)O₃ (0.1  x  1.0) ceramics prepared by the conventional solid state method have been investigated. The system forms a solid solution throughout the entire compositional range. The dielectric constant decreases from 152 to 27 as x varies from 0.1 to 1.0. In the (1 − x)CaTiO₃–xNd(Mg_1/2Ti_1/2)O₃ system, the microwave dielectric properties can be effectively controlled by varying the x value. At 1400 °C, 0.1CaTiO₃–0.9Nd(Mg_1/2Ti_1/2)O₃ has a dielectric constant (ε_r) of 42, a Q × f value of 35 000 GHz and a temperature coefficient of resonant frequency (τ_f) of −10 ppm/°C. As the content of Nd(Mg_1/2Ti_1/2)O₃ increases, the highest Q × f value of 43 000 GHz for x = 0.9 is achieved at the sintering temperature 1500 °C.     

High breakdown voltage Schottky rectifier fabricated on bulk n-GaN substrate

Vertical Schottky rectifiers have been fabricated on a free-standing n-GaN substrate. Circular Pt Schottky contacts with different diameters (50 μm, 150 μm and 300 μm) were prepared on the Ga-face and full backside ohmic contact was prepared on the N-face by using Ti/Al. The electron concentration of the substrate was as low as 7 × 10¹⁵ cm⁻³. Without epitaxial layer and edge termination scheme, the reverse breakdown voltages (V_B) as high as 630 V and 600 V were achieved for 50 μm and 150 μm diameter rectifiers, respectively. For larger diameter (300 μm) rectifiers, V_B dropped to 260 V. The forward turn-on voltage (V_F) for the 50 μm diameter rectifiers was 1.2 V at the current density of 100 A/cm², and the on-state resistance (R_on) was 2.2 mΩ cm², producing a figure-of-merit (V_B)²/R_on of 180 MW cm⁻². At 10 V bias, forward currents of 0.5 A and 0.8 A were obtained for 150 μm and 300 μm diameter rectifiers, respectively. The devices exhibited an ultrafast reverse recovery characteristics, with the reverse recovery time shorter than 20 ns.     

Spectroscopic and electrical characteristics of highly efficient tetraphenylsilane-carbazole organic compound as host material for blue organic light emitting diodes

Thermal, electrical and spectroscopic properties have been studied for bis(3,5-di(9H-carbazol-9-yl) phenyl)diphenylsilane (SimCP2) which has exhibited high external quantum efficiency of 17.7% and power efficiency of 24.2 lm/W when it is used as host material for iridium bis(4,6-difluorophenypyridinato)picolate (FIrpic) blue emitter. They are compared with 1,3-bis (9-carbazolyl) benzene (mCP) and 3,5-bis (9-carbazolyl) tetraphenylsilane (SimCP) which have been also used as host for blue emitters. SimCP2 exhibits a highest glass transition temperature (148 °C) and is morphologically more stable. The electron and hole mobilities are higher (4.8 × 10⁻⁴ and 2.7 × 10⁻⁴ cm² V⁻¹ s⁻¹, respectively, at electric field of 9 × 10⁴ V cm⁻¹) than those of mCP and SimCP. The zero-phonon S₁ emission band is observed at 344 nm, while the T₁ emission band at 412 nm, i.e., this material preserves the characteristics of wide band-gap of 3.56 eV and high T₁ triplet energy of 3.01 eV. From the intensity ratio of the T₁ emission to the S₁ emission, it is suggested that the intersystem crossing rate is smaller for SimCP2 than for mCP and SimCP. From these results, we clarify the reasons why SimCP2 is superior to mCP and SimCP as the host material for blue phosphorescence emitter in organic light emitting diodes.