A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIs

We propose a pixel-level automatic calibration circuit scheme that initializes a capacitive fingerprint sensor LSI to eliminate the influence of the surface condition, which is degraded by dirt during long-time use. The scheme consists of an automatic calibration circuit for each pixel and a calibration control circuit for the pixel array. The calibration is executed by adjusting variable capacitance in each pixel to make the sensor signals of all pixels the same. The calibration control circuit selects the pixels in parallel, and calibrates all pixels in a short time. The scheme was applied to a fingerprint sensor LSI using the 0.5-/spl mu/m CMOS process/sensor process, and clear fingerprint images were obtained even for a degraded surface condition. This confirms that the scheme is effective for capturing consistent clear images during long-time use.     

A low-power and high-performance CMOS fingerprint sensing andencoding architecture

A CMOS fingerprint sensor architecture with embedded cellular logic for image processing is presented. The system senses a fingerprint image with a capacitive technique and performs several image-processing algorithms, including thinning the ridges of the fingerprint structure and encoding it to its characteristic features. Image processing is achieved by application of hexagonal local operators implemented in pixel-parallel mixed neuron-MOS/CMOS logic circuits. The massive parallelism of the architecture leads to a very low power dissipation. Results of simulations and measurements on a demonstrator chip in 0.65-μm double-poly standard CMOS technology are shown. The approach is well suited for person-identification applications, especially in small and low-cost portable systems, such as smart cards     

新型四次谐波混频电路

本文介绍了一种适用于高次谐波混频的电路原理图,基于空闲频率相位抵消理论,该混频电路结构可以避免复杂的空闲频率回收电路设计,同时能获得很高的端口隔离度。基于该结构,设计了新型的Ka波段四次谐波混频器,该混频器在38.4 GHz测得最小变频损耗 8.3 dB,在34-39 GHz 变频损耗小于10.3dB, LO-IF、RF-LO、 RF-IF 端口隔离度分别优于30.7 dB、 22.9dB、46.5dB。     

A novel PWM scheme for single-phase three-levelpower-factor-correction circuit

This paper presents a control scheme for a single-phase AC-to-DC power converter with three-level pulsewidth modulation. A single-phase power-factor-correction circuit is proposed to improve the power quality. The hysteresis current control technique for a diode bridge, with two power switches is adopted to achieve a high power factor and low harmonic distortion. A control scheme is presented where the line current is driven to follow the reference sinusoidal current which is derived from the DC-link voltage regulator, the capacitor voltage balance compensator and the output power estimator. The blocking voltage of each power device is clamped to half of the DC-link voltage. The high power factor and low current total harmonic distortion are verified by computer simulations and hardware tests     

A capacitive fingerprint sensor chip using low-temperature poly-Si TFTs on a glass substrate and a novel and unique sensing method

We have developed a capacitive fingerprint sensor chip using low-temperature poly-Si thin film transistors (TFTs). We have obtained good fingerprint images which have sufficient contrast for fingerprint certification. The sensor chip comprises sensor circuits, drive circuits, and a signal processing circuit. The new sensor cell employs only one transistor and one sensor plate within one cell. There is no leakage current to other cells by using a new and unique sensing method. The output of this sensor chip is an analog wave and the designed maximum output level is almost equal to the TFT's threshold voltage, which is 2-3 V for low-temperature poly-Si TFTs. We used a glass substrate and only two metal layers to lower the cost. The size of the trial chip is 30 mm/spl times/20 mm/spl times/1.2 mm and the sensor area is 19.2 mm/spl times/15 mm. The size of the prototype cell is now 60 /spl mu/m/spl times/60 /spl mu/m at 423 dpi, but it will be easy to increase the resolution up to more than 500 dpi. The drive frequency is now 500 kHz and the power consumption is 1.2 mW with a 5-V supply voltage. This new fingerprint sensor is most suitable for mobile use because the sensor chip is low cost and in a thin package with low power consumption.     

A compensation scheme for non-ideal circuit effects in biomedical impedance sensor

The accuracy of an I/Q based biomedical impedance sensing sensor (IQBIS) suffers significantly from the PVT effects of the analog front-end, such as the amplitude errors of the stimulation signals, gain mismatches, amplitude and phase imbalances of in-phase (I) and quadrature (Q) signals, etc. These practical effects will severely impede the system performance if handled improperly. In this paper, the degradations of sensing performance by such imperfections are mathematically analyzed and quantified. Following theoretical studies, a digitally controlled correction approach is proposed to finely alleviate these impairments. The performance of the proposed scheme had been verified using Simulink and MATLAB. With the proposed error correction scheme, the accuracy is improved by at least 17 times compared to that of the typical IQBIS, for both real and imaginary values of impedance. Thus, the proposed method is very useful for IQBIS, in resisting degradation in sensing accuracies due to the process-voltage-temperature (PVT) effects.     

A novel spectrum sensing scheme with sensing time optimization for energy-efficient CRSNs

Wireless Networks - The cognitive radio technology enables secondary users (SUs) to occupy licensed bands when primary users (PUs) are not occupy them. Spectrum sensing is a key technology for SUs...     

Transmissive quasidistributed optical fibre sensing scheme for two-state sensors

A coherence multiplexed sensing scheme for two-state sensors is demonstrated. The system uses conventional white light interferometry to resolve polarisation mode cross coupling sites along a highly birefringent bus fibre. The limitations of such a system, based on a multi-longitudinal mode laser diode source, are identified.<>     

A coverage-preserving scheme for wireless sensor network with irregular sensing range

Coverage is an important issue related to WSN quality of service. Several centralized/decentralized solutions based on geometry information and under the assumption of disk sensing range have been introduced in the literature. However, disk sensing range assumption is too strong in the real world and cannot be held in scenarios requiring high accuracy, such as the emergency preparedness class of applications. This paper proposes a new intersection point method (IPM) that extends the disk sensing range assumption to an irregular simple polygon assumption. A unit circle test method has also been devised in order to provide a controllable degree of accuracy in the determination of fully covered nodes. By adjusting the radius r_u of this unit circle test, the algorithm can be made tolerant to holes of a certain size which makes the solution flexible when the degree of accuracy must be controlled. IPM performance was evaluated through a set of simulation experiments implemented in the NS-2 simulator, which were compared to the results obtained using the central angle method (CAM) proposed by D. Tian and N.D. Georganas, and the association sponsors method (ASM) proposed by A. Boukerche, X. Fei and Regina B. Araujo. The results show that under the simple polygon sensing range assumption, our solution can efficiently identify fully covered sensors, discover holes (blind points) and archive better quality results than CAM and ASM. The performance and flexibility of IPM makes it a potential solution for applications that require a high rate of coverage with controllable hole tolerance.     

一个新型的大检测电容结构的MEMS惯性传感器研究

A novel MEMS inertial sensor with enhanced sensing capacitors is developed. The designed fabricated process of the sensor is a deep RIE process, which can increase the mass of the seismic to reduce the mechanical noise, and the designed capacitance sensing method is changing the capacitance area, which can reduce the air damping between the sensing capacitor plates and reduce the requirement for the DRIE process precision, and reduce the electronic noise by increasing the sensing voltage to improve the resolution. The design and simulation are also verified by using the FEM tool ANSYS. The simulated results show that the transverse sensitivity of the sensor is approximately equal to zero. Finally, the fabricated process based on silicon-glass bonding and the preliminary test results of the device for testing grid capacitors and the novel inertial sensor are presented. The testing quality factor of the testing device based on the slide-film damping effect is 514, which shows that the enhanced capacitors can reduce mechanical noise. The preliminary testing result of the sensitivity is 0.492pf/g.     

A novel MEMS inertial sensor with enhanced sensing capacitors

A novel MEMS inertial sensor with enhanced sensing capacitors is developed. The designed fabricated process of the sensor is a deep RIE process, which can increase the mass of the seismic to reduce the mechanical noise, and the designed capacitance sensing method is changing the capacitance area, which can reduce the air damping between the sensing capacitor plates and reduce the requirement for the DRIE process precision, and reduce the electronic noise by increasing the sensing voltage to improve the resolution. The design and simulation are also verified by using the FEM tool ANSYS. The simulated results show that the transverse sensitivity of the sensor is approximately equal to zero. Finally, the fabricated process based on silicon-glass bonding and the preliminary test results of the device for testing grid capacitors and the novel inertial sensor are presented. The testing quality factor of the testing device based on the slide-film damping effect is 514, which shows that the enhanced capacitors can reduce mechanical noise. The preliminary testing result of the sensitivity is 0.492 pf/g.     

A novel IP-routing lookup scheme and hardware architecture formultigigabit switching routers

One of the pertinent design issues for new generation IP routers is the route-lookup mechanism. For each incoming IP packet, the IP routing is required to perform a longest-prefix matching on the route lookup in order to determine the packet's next hop. This study presents a fast unicast route-lookup mechanism that only needs tiny SRAM and can be implemented using a hardware pipeline. The forwarding table, based on the proposed scheme, is small enough to fit into a faster SRAM with low cost. For example, a large routing table with 40000 routing entries can be compacted into a forwarding table of 450-470 kbytes costing less than US$30. Most route lookups need only one memory access; no lookup needs more than three memory accesses. When implemented using a hardware pipeline, the proposed mechanism can achieve one routing lookup every memory access. With current 10-ns SRAMs, this mechanism furnishes approximately 100×10⁶ routing lookups/s, which is much faster than any current commercially available routing-lookup scheme     

A dual-mode sensing scheme of capacitor-coupled EEPROM cell

A dual-mode sensing (DMS) scheme for a capacitor-coupled EEPROM cell is described. A memory cell structure and a sensing scheme are proposed and estimated. The memory cell combines an EEPROM cell with a DRAM cell. The DMS scheme utilizes the charge-mode sensing of the EEPROM cell. Using this DMS technique, the sensing speed can be enhanced by 36% at a cell current of 15 μA by virtue of the additional charge-mode sensing. Furthermore, the stress applied to the tunnel oxide of the memory transistor can be relieved by decreasing the programming voltage and shortening the programming time. Therefore, with this memory cell structure and sensing scheme, it is possible to realize high-speed sensing in low-voltage operation and high endurance     

A single-chip fingerprint sensor and identifier

A chip architecture that integrates a fingerprint sensor and an identifier in a single chip is proposed. The fingerprint identifier is formed by an array of pixels, and each pixel contains a sensing element and a processing element. The sensing element senses capacitances formed by a finger surface to capture a fingerprint image. An identification is performed by the pixel-parallel processing of the pixels. The sensing element is built above the processing element in each pixel. The chip architecture realizes a wide-area sensor without a large increase of chip size and ensures high sensor sensitivity while maintaining a high image density. The sensing element is covered with a hard film to prevent physical and chemical degradation and surrounded by a ground wall to shield it. The wall is also exposed on the chip surface to protect against damage by electrostatic discharges from the finger contacting the chip. A 15×15 mm² single-chip fingerprint sensor/identifier LSI was fabricated using 0.5-μm standard CMOS with the sensor process. The sensor area is 10.1×13.5 mm². The sensing and identification time is 102 ms with power consumption of 8.8 mW at 3.3 V. Five hundred tests confirmed a stranger-rejection rate of the chip of more than 99% and a user-rejection rate of less than 1%     

A novel scheme for protection of power semiconductor devicesagainst short circuit faults

Power semiconductor devices find wide application in modern power electronic converters. Protection of these devices against overload/short circuit conditions is of paramount importance. Present day protection topologies employing different circuits have invariably one main drawback in that the fault current reaches the set value before action is initiated to trip the system. This poses a severe stress on the device. Hence an adequate safety margin has to be necessarily provided to prevent excessive device stresses and care has to be taken to see that the device is operated well within its safe operating areas. The present paper proposes a method wherein the slope or rate of rise of the fault current is detected and once the slope exceeds the set reference, action is initiated to trip the system much before the fault current reaches dangerous levels. The method provides a fast means of detection of overload and short circuit currents and can be conveniently adopted for the protection of devices in power transistor/IGBT based inverters against short circuited load conditions or shoot through faults. The possible reduction of stresses in the power devices are also highlighted     

A novel cooperative spectrum sensing scheme based on virtual soft information fusion

In cognitive radio (CR), the performance of hard information fusion (HIF) strategy for cooperative sensing will deteriorate when cooperative CR user are not uniformly reliable. To deal with this problem, this paper proposed a novel virtual soft information fusion (VSIF) strategy which uses expectation for primary users (PU) presence probability to replace the local sensing decision of each user in the information fusion. Compared with the HIF-based scheme, VSIF-based sensing scheme keeps the advantages of low data transmission in HIF-based scheme, and modifies the way of information fusion at the fusion center to achieve better performance when the user sensing reliability is non-uniform. Simulation shows VSIF strategy has significant superiority on the missing detection probability over HIF in the scenarios of non-uniform user reliability.     

Efficient IEEE 802.11 handoff based on a novel geographical fingerprint scheme

The effective coverage distance of wireless LAN (WLAN) being small, users may leave the coverage area of the specific access point (AP) from time to time while roaming. However, the wireless network is a shared medium. The air is open for everyone. In general there is collision if a few users attempt to transmit with the same channel that is more rigorous during handoff period because of active scan mode. The active scan will perform requests for searching available AP. Unfortunately, this function consumes too much resource in wireless communication, and also affect total performance. We will propose an advanced active scan to improve it. In our proposal, we convert RF signal distribution to a simple classification problem, like as XOR classifier with artificial neural network (ANN). We combine ANN with active scan to achieve our goal. And the weight, which trained by ANN presents the connection character of geography. Moreover, the weight could be stored in AP for reusing and is called geographical fingerprint. The average enhancement of reducing the active scan area is about 62%. Copyright © 2006 John Wiley & Sons, Ltd.     

一种新的基于指纹与人脸特征级融合的模糊金库方案

针对基于生物特征的模糊金库易受相关攻击导致密钥和生物特征模板丢失以及基于单生物特征的模糊金库的认证性能不可靠的问题,提出了一种新的基于指纹与人脸特征级融合的模糊金库方案。该方案对指纹特征与人脸特征分别进行不可逆变换,并基于Diffie-Hellman算法在特征级变换后将指纹与人脸特征融合为一个模板。最后,将所得的融合模板用来构建模糊金库,通过更新随机矩阵使金库具备可撤销特性,有效抵御相关攻击,实现可靠的身份认证。实验结果表明,本文方案提高了系统的可靠性和多生物特征模板的安全性。     

新型压电式传感器前置放大电路的设计

在油气井出砂检测中,压电式传感器检测到的出砂信号弱、频率高,常用的电荷放大器不能满足要求。基于此问题,文中开展了针对出砂信号的前置放大电路的研究,该电路由电荷放大器、带通滤波器、过载指示等电路组成,其中电荷放大器电路选用高阻型的运放AD823实现,带通滤波器的带宽设计为100kHz～1MHz,并且利用EWB电路仿真软件对电荷放大器和滤波电路进行了仿真,仿真结果与设计指标一致,验证了参数选取的合理性。最后,给出了该电路在出砂检测系统中的试验情况,结果表明参数选择合理、性能稳定。