一种宽带光总线互连网络机群系统设计

介绍了一种宽带光总线互连网络机群系统。该系统利用宽带多层自由空间光学数据总线和VCSEL/MSMCMOS光电子集成器件实现4台计算机之间互连。专用通讯适配器实现高性能并行接口(high performance parallel interface,HIPPI)到外设部件互连(peripheral component interconnection,PCI)协议转换。该系统光互连网络传输容量可达60Gbit/s,可用于计算机之间的高速通讯。     

用半导体激光器和PIN光电探测器设计和实现的光互连链路

本文采用半导体激光器和ＰＩＮ光电探测器,设计和实现了用于计算机ＰＣＩ 一并行经连的光互连链路。在链路的网络接口卡上和实现了激光器的电流源驱动电路以及具有宽动脉的光电探测器放大整形电路,实现了激光器的自动功率保护。通过时分复用技术,实现了ＰＣＩ总线的并行数据在一根光纤中的虚拟并行传输。     

用于机群系统的高速光互连网络接口卡设计

本文在已设计完成的用于计算机点到虚拟并行互连的光互连链路基础上,用现场可编程门阵列（ＦＰＧＡ）器件实现了数据的寻址和转发,设计完成了具有硬件器由功能的光互连环网的网络接口卡。该网络接口卡的旁路数据转发延迟为２１０ｎｓ,目的结点的数据接收处理延迟为３５０ｎｓ。     

Optical interconnections for parallel and distributed computing

This paper reports the application of optical interconnections to a parallel an distributed computing system in the form of a calibration-free 64-Gbps/board parallel optical interconnection sub-system mounted directly on the four-CPU processor board of a newly developed parallel-processing machine, “RWC-1”. The sub-system is composed of eight parallel optical module/single-chip link large-scale integrated circuit pairs. The subsystem successfully transmitted parallel data for a variety of link lengths (between 1 m and 1 km), and with deskewing and synchronizing functions, phase-matching calibration for link lengths is automatic. Further, a method is described for the simplified merging of optical interconnections into electronic systems     

Parallel architectures for digital optical cellular imageprocessing

A parallel digital optical cellular image processor (DOCIP) functionally comprises an array of identical I-bit processing elements or cells, a fixed interconnection network, and a control unit. Four interconnection network topologies are described, and include two variants of a mesh-connected array and two variants of a cellular hypercube network. The instruction sets of these single-instruction multiple-data (SIMD) machines are based on a mathematical morphological theory, binary image algebra (BIA), which provide an inherently parallel programming structure for their control. Physically, a DOCIP architecture uses a holographic optical element in a 3D free-space optical system to implement off-chip interconnections, and an optoelectronic spatial light modulator to implement a 2D array of nonlinear processing elements and (optionally) local on-chip interconnections. Two examples are given. The first, an experimental implementation of a single 54-gate cell of the DOCIP, uses an optically recorded hologram for within-cell optical interconnections, and a spatial light modulator for a 2D array of optically accessible gates. The second, a design for an efficient and more manufacturable architecture, uses a computer-generated diffractive optical element for cell-to-cell interconnections, and a 20 smart-pixel array of DOCIP cells, each cell having electronic logic and optical input/output     

Routing in optical multistage interconnection networks: a neuralnetwork solution

There has been much interest in using optics to implement computer interconnection networks. However, there has been little discussion of any renting methodologies besides those already used in electronics. In this paper, a neural network routing methodology is proposed that can generate control bits for a broad range of optical multistage interconnection networks (OMIN's). Though we present no optical implementation of this methodology, we illustrate its control for an optical interconnection network. These OMIN's can be used as communication media for distributed computing systems. The routing methodology makes use of an artificial neural network (ANN) that functions as a parallel computer for generating the routes. The neural network routing scheme can be applied to electrical as well as optical interconnection networks. However, since the ANN can be implemented using optics, this routing approach is especially appealing for an optical computing environment. Although the ANN does not always generate the best solution, the parallel nature of the ANN computation may make this routing scheme faster than conventional routing approaches, especially for OMIN's that have an irregular structure. Furthermore, the ANN router is fault-tolerant. Results are shown for generating routes in a 16×16, 3-stage OMIN     

并行计算机系统的光WDM互连链路

光波分复用 (WDM)互连接是并行计算机系统克服“电子瓶颈”的可行方案 ,光纤传输的特性可使大容量、低时延、低误码率传输的并行计算机互连成为现实。探讨了并行计算机光WDM互连的一种结构 ,分析研究了其中的关键技术 ,并设计了一个实验系统。分析和实验表明采用光WDM互连可以实现超大容量的并行计算机系统     

基于VCSEL/MSM-CMOS技术的并行光互连设计

提出了一种基于VCSEL/MSMCMOS技术的并行光互连系统,详细介绍了系统整体设计,着重对光网络通信接口卡中的PCIHIPPI接口模块、HIPPIFIBER接口模块、光总线模块设计进行了阐述。     

Description and evaluation of the FAST-Net smart pixel-basedoptical interconnection prototype

The design, packaging approach, and experimental evaluation of the free-space accelerator for switching terabit networks (FAST-Net) smart-pixel-based optical interconnection prototype are described. FAST-Net is a high-throughput data-switching concept that uses a reflective optical system to globally interconnect a multichip array of smart pixel devices. The three-dimensional optical system links each chip directly to every other with a dedicated bidirectional parallel data path. in the experiments, several prototype smart-pixel devices were packaged on a common multichip module (MCM) with interchip registration accuracies of 5-10 μm. The smart-pixel arrays (SPAs) consist of clusters of oxide-confined vertical-cavity surface-emitting lasers and photodetectors that are solder bump-bonded to Si integrated circuits. The optoelectronic elements are arranged within each cluster on a checkerboard pattern with 125-μm pitch. The experimental global optical interconnection module consists of a mirror and lens array that are precisely aligned to achieve the required interchip parallel connections between up to 16 SPAs. Five prototype SPAs were placed on the MCM to allow the evaluation of a variety of interchip links. Measurements verified the global link pattern across several devices on the MCM with high optical resolution and registration. No crosstalk between adjacent channels was observed after alignment. The I/O density and efficiency results suggest that a multi-terabit switch module that incorporates global optical interconnection to overcome conventional interconnection bottlenecks is feasible     

有旋转连接的双层光互连网络设计与分析

设计一个具有旋转连接功能的双层并行光互连网络。顶层为数字路由结点(DRN)和光网络接口卡(ONIC)组成的星型网,吞吐率大于10Gbps;底层为ONIC连接而成的环形网,峰值传输速率1．056Gbps。光纤旋转连接器(FORJ)的引入增加了网络的灵活性和使用范围。该网络的最大吞吐速率为8．448Gbps;环网内平均延迟2195ns,环网间平均延迟4713ns,误码率小于10^-14;结点机之间的链路长度最大可达5．46km。     

直连网络中交换机制综述

由于具有并行处理以及良好的扩展性等特性,在构建大型并行计算系统中直连网络是一种较受欢迎的连接方式.目前直连网络已经广泛地应用于多处理器系统、多计算机系统,集群系统以及太比特路由器中.交换机制的选择直接影响了直连网络系统的性能.文中总结了直连网络交换机制的特点,对主要的几种交换机制进行了分析比较,并展望了其发展趋向.     

低功耗千兆光互连链路的研制

基于可编程门阵列(FPGA)器件实现了低功耗的高速光互连链路。采用电时分复用(ETDM)技术在1根光纤上实现了G,数据信号的虚拟并行传输,降低了系统成本。链路物理层带宽达1056Mbit／s,链路稳定传输带宽为545Mbit／s,在应用层可得到300Mbit／s的数据传输率。并通过合理的器件选择、动态功耗管理和低功耗编码等设计方法,使系统功耗降低50％。     

基于高速串行总线的可重构信号处理机

介绍了一种基于高速串行总线的机载火控雷达可重构信号处理机的设计与实现,以及高速串行总线的技术优势,分析了机载火控雷达可重构并行信号处理机系统互连的需求,讨论了处理机的系统架构、串行总线协议、串行总线端点和链路管理器的设计实现和总线错误监测及处理方法。该处理机不仅有效解决了数据传输的瓶颈问题,而且实现了数据传输拓扑结构的可重构,提高了信号处理系统的灵活性和可靠性。     

光计算中全排列无阻塞双Omega光互连网络的光学实现方法

本文分析了单个Ｏｍｅｇａ光互连网络的局限性，提出了一种全排列无阻塞双Ｏｍｅｇａ光互连网络的光学实现方法。光回路系统由Ａｒ＋３离子激光器、光束分束器、偏振组合棱镜和液晶空间光开关组成，能够实现输入信号列阵光束的并行传输和全排列无阻塞光互连。     

基于NiosⅡ的光纤光栅传感系统解调技术的研究

基于Altera公司的32位嵌入式软核处理器NiosⅡ, 设计了一种四通道分布式光纤光栅传感网络的并行波长解调系统, 对解调系统的光路和硬件电路进行设计。解调系统的硬件电路以现场可编程门阵列(FPGA)为核心, 对整形为矩形脉冲的光电转换信号电压进行采集和信号处理, 可与上位机实现通用非同步收发传输器(UART)和通用串行总线(USB)通信, 在上位机上实现光纤光栅波长解调的动态显示和光栅中心波长标定, 可高速、高精度并行解调上百个外界被测信号。与目前具有同样功能的其他波长解调系统相比, 具有灵活、稳定、易维护、高速、高精度等优点, 可被应用到大型多点安全监测工程。给出具体的波长解调和标定的实例, 精度可达到±2 pm。     

A 4-channel coil array interconnection by analog direct modulation optical link for 1.5-T MRI

Optical glass fiber shows great advantages over coaxial cables in terms of electromagnetic interference, thus, it should be considered a potential alternative for magnetic resonance imaging (MRI) receive coil interconnection, especially for a large number coil array at high field. In this paper, we propose a 4-channel analog direct modulation optical link for a 1.5-T MRI coil array interconnection. First, a general direct modulated optical link is compared to an external modulated optical link. And then the link performances of the proposed direct modulated optical link, including power gain, frequency response, and dynamic range, are analyzed and measured. Phantom and in vivo head images obtained using this optical link are demonstrated for comparison with those obtained by cable connections. The signal-to–noise (SNR) analysis shows that the optical link achieves 6%–8% SNR a improvement over coaxial cables by elimination of electrical interference between cables during MR signal transmission.      

Multiple channel architecture: a new optical interconnectionstrategy for massively parallel computers

A parallel processing architecture based on multiple channel optical communication is described and compared with existing interconnection strategies for parallel computers. The proposed multiple channel architecture (MCA) provides a large number of independent, selectable channels (or virtual buses) using a single optical fiber. Arbitrary interconnection patterns and machine partitions can be emulated via appropriate channel assignments. Hierarchies of parallel architectures and simultaneous execution of parallel tasks are also possible. The authors describe previous attempts in processor, memory, and input/output device interconnection, a basic overview of the proposed architecture, various channel allocation strategies that can be utilized by the MCA, and a summary of advantages of the MCA compared with traditional interconnection techniques     

Digital optical computing

This paper concerns binary digital computing systems in which the information-carrying medium consists entirely or primarily of photons. The paper begins with a review of analog, discrete, and binary methods of representing information in a computer, followed by a survey of many techniques for implementing binary combinatorial and sequential logic functions with individual optical devices and arrays of devices. Next is a discussion of communication, interconnection, and input-output problems of digital electronic and optical computers at the gate, chip, and processor level. A particular architecture for implementing general sequential optical logic systems including digital optical processors is described. This architecture avoids some of the interconnection problems of electronic integrated circuits and VLSI systems, and offers the potential of non von Neumann parallel digital processors. Finally, the current limitations and future needs of optical logic devices and digital optical computing systems are outlined.     

Chip-to-Chip Optical Link System Using an Optical Wiring Method

A practical optical link system was prepared with a transmitter (Tx) and receiver (Rx). The optical TRx module consisted of a metal optical bench, a module printed circuit board, a driver/receiver integrated circuit, a vertical-cavity surface-emitting laser/photodiode array, and an optical link block composed of plastic optical fiber (POF). For the optical interconnection between the light-sources and detectors, an optical wiring method has been proposed to enable easy assembly. The optical wiring link was constructed with POFs mounted on a v-grooved polymethylmethacrylate bench. The data transfer measurements were presented successfully.     

用MEMS光开关实现高性能光互连网络

建立了1Gbps传输结构的高性能光互连网络，来提高计算机群系统的网络性能。它利用微机电系统(MEMS)光开关和PCI总线全带宽网络接口卡构成光互连链路。全带宽PCI接口卡总线峰值传输速率为132Mbytes／s，光信号传输速率可达1Gbps以上。用MEMS制做的全光开关减少了光—电之间的转换，提供的开关方式与数据的波长、速率和信号格式无关。因而，利用这种网络结构，可以最大限度地减少网络延迟和网络通信开销，极大地提升了机群系统的总体性能。