Development and analysis of nitrogen-doped amorphous InGaZnO thin film transistors

The nitrogen-doped (N-doped) amorphous InGaZnO thin film transistors (a-IGZO TFTs) were investigated against the undoped and oxygen doped (O-doped) devices. The N-doped a-IGZO TFTs exhibited better electrical performance and bias stress stability, and especially more stable thermal properties. The X-ray photoemission spectroscopy (XPS) measurements were carried out at different temperatures (298 K and 393 K) to examine the physical essence of the thermal instability of undoped, O-doped, and N-doped a-IGZO TFTs. The XPS characterization results indicated that nitrogen doping caused lesser oxygen vacancy variation with the temperature (0.6%) compared with undoping (7.2%) and oxygen doping (11.8%). Hence, the a-IGZO TFTs with N-doped active layers had much better stability than those with undoped and O-doped active layers.     

Investigation into sand mura effects of a-IGZO TFT LCDs

The reliability of liquid crystal display (LCD) panels based on amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) is investigated. It is revealed that the a-IGZO TFT LCDs also have sand mura issue at high operation temperature. Analysis shows that the sand mura is caused by the positive V_th shift of the a-IGZO TFTs. To suppress the V_th shift, fabrication process of the a-IGZO TFTs is optimized with a-IGZO channel layer annealed at 300 °C and etch-stop layer deposited at 250 °C. The process optimization lessens the absorbed and non-bonded oxygen atoms in the a-IGZO channel layer and desorbed water molecules on the back channel surface. The results show that the V_th shift is significantly alleviated and the sand mura is thus effectively minimized with the optimized process.     

Trapping Time Characteristics of Carriers in a-InGaZnO Thin-Film Transistors Fabricated at Low Temperatures for Next-Generation Displays

The effect of low-temperature annealing treatment for various durations on the stability of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors was investigated. By this treatment, IGZO TFTs showed enhanced electrical characteristics and better stability under positive gate bias stress with increasing annealing time up to 18,000 s. For all V _G stresses at different annealing times, the experimentally measured threshold voltage shift (ΔV _th) as a function of stress time was precisely modeled with a stretched-exponential function. ΔV _th was generated by carrier trapping, not by defect creation. It was verified that the decrease of interface trap state density (N _it) and free carriers resulted in the decrease of ΔV _th with increasing annealing time. However, the characteristic trapping time of the carriers increased up to 5.3 × 10³ s with increasing annealing time to 7,200 s and then decreased, implying that the interface quality between active layer/insulator was deteriorated with further annealing. In this study, successful fabrication of IGZO TFTs by post treatment with optimized duration is demonstrated for flexible display applications.     

Device characteristics of amorphous indium gallium zinc oxide thin film transistors with ammonia incorporation

The effect of ammonia gas on amorphous indium gallium zinc oxide thin film transistors is investigated. The ammonia is incorporated into the sputtered a-IGZO film during the deposition process. The results indicate that the sub-threshold swing of the NH₃ incorporated TFTs is significantly improved from 2.8 to 1.0 V/decade, and the hysteresis phenomenon is also suppressed during the forward and reverse sweeping measurement. By X-ray photoelectron spectroscopy analyses, Zn-N and O-H bonds are observed in ammonia incorporated a-IGZO film. Therefore, the improvements in the electrical performance of TFTs are attributed to the passivation of dangling bonds and/or defects by ammonia.     

Electrical characteristics of a-IGZO transistors along the in-plane axis during outward bending

A highly flexible amorphous indium–gallium–zinc–oxide (a-IGZO) thin film transistor (TFT) was tested with respect to the in-plane axis location and device architecture in a bending system. Short channel a-IGZO TFTs were fabricated based on the conventional coplanar configuration and the islanded structure on a polyimide (PI) substrate and were then subjected to a cyclic bending of 1 × 10⁵ with varying radii smaller than a few mm. Embedding the devices at a neutral position in bending system allowed them to function well when exposed to the induced mechanical strain, regardless of the difference in the structural geometry. However, placement of the TFTs outside of the neutral surface resulted in a drastic suppression of the strain-induced electrical failure for the island configuration as the distance of the TFTs from the neutral surface increased. By contrast, the conventional structure, when placed outside the neutral surface, showed strongly accelerated device failure as the strain on the TFTs was increased. The electromechanical integrity was maintained for island-structured TFTs under a bending stress with a radius of 1 mm and a position margin of 50 μm away from the neutral surface. The brittle and rigid characteristics of TFT arrays with inorganic components are still considered problematic in terms of being put into practical use in flexible applications; nevertheless, the high flexibility achieved by this structural design and its geometrical characterization along the in-plane axis shows the great potential for a-IGZO TFTs to serve as the functional building blocks of new platform applications, such as rolling or folding displays, by suppressing the mechanical strain in the backplane.     

A subgap density of states modeling for the transient characteristics in oxide-based thin-film transistors

The modeling of the transient subgap density of states (DOS) for the investigation of trap densities in the oxide-based thin-film transistors is proposed. The study is based on both transient measurements and physical modeling. In history, the subgap DOS modeling of trap densities have been studied according to the static-state current–voltage characteristics or the capacitance–voltage curves. However, the subgap DOS modeling for the transient curves is seldom proposed. In this study, the transient model of subgap DOS is discussed for amorphous In–Ga–Zn–O (a-IGZO) thin films. This model suggests the subgap DOS exhibits a transient behavior with an exponential distribution on the band edge and a Gaussian distribution in the deep gap level. This study could be helpful to understand and optimize the transient electrical properties of a-IGZO TFTs.     

RF功率对非晶铟镓锌氧薄膜和器件电学特性的影响

The influence of radio frequency(RF) power on the properties of magnetron sputtered amorphous indium gallium zinc oxide(a-IGZO) thin films and the related thin-film transistor(TFT) devices is investigated comprehensively.A series of a-IGZO thin films prepared with magnetron sputtering at various RF powers are examined.The results prove that the deposition rate sensitively depends on RF power.In addition,the carrier concentration increases from 0.91 x 1019 to 2.15 x 1019 cm-3 with the RF power rising from 40 to 80 W,which may account for the corresponding decrease in the resistivity of the a-IGZO thin films.No evident impacts of RF power are observed on the surface roughness,crystalline nature and stoichiometry of the a-IGZO samples.On the other hand,optical transmittance is apparently influenced by RF power where the extracted optical band-gap value increases from 3.48 to 3.56 eV with RF power varying from 40 to 80 W,as is supposed to result from the carrierinduced band-filling effect.The rise in RF power can also affect the performance of a-IGZO TFTs,in particular by increasing the field-effect mobility clearly,which is assumed to be due to the alteration of the extended states in a-IGZO thin films.     

Effects of oxygen on crystallization of amorphous silicon films and polysilicon TFT characteristics

Oxygen ions were implanted into the amorphous silicon film deposited at 540°C in order to study the effects of oxygen on the solid phase crystallization of silicon films. The resulting films were investigated using transmission electron microscopy, x-ray diffraction (XRD), and also by measuring the electrical characteristics of polycrystalline silicon thin film transistors (TFTs) fabricated in the crystallized films. The development of {111} texture as a function of annealing time is similar to films implanted with Si, with higher oxygen samples showing more texture. Transmission electron microscopy shows that the grain size of completely crystallized films varies little with oxygen concentration. The electrical performances of TFTs are found to degrade with increasing oxygen dose. The trap state density increases from 5.6 × 10¹²/cm² to 9.5 × 10¹²/cm² with increasing oxygen dose. It is concluded that for a high performance TFT, oxygen incorporation in the Si film should be kept to 10¹⁹/cm³ or less.     

Device characteristics of amorphous indium-gallium-zinc-oxide channel capped with silicon oxide passivation layers

It was investigated how the amorphous indium-gallium-zinc-oxide (a-IGZO) channel of a back-gate of thin film transistor (TFT) is affected by the deposition of silicon oxide layers on their top surfaces by radio frequency magnetron sputtering. Preliminary investigations showed that the deposition of silicon oxide layer caused damages to the surfaces of pristine silicon wafers resulting in substantial roughening. However, bombardments by the energetic particles involved in the sputtering process seem to have played beneficial roles in that the a-IGZO channel TFTs showed improved performances in respect of the carrier density, field effect mobility, and on-off current ratio. Such improvements are attributed to the modification of the a-IGZO channel to decrease the concentration of oxygen vacancy sites and/or to average the oxygen vacancy sites thereby increasing the carrier concentrations and decreasing the density of trap sites, as revealed in the negative shift of the threshold voltage. On the other hand, such channel modification by the passivation process resulted in the slight increase in the subthreshold swing. It is suggested that the a-IGZO channel TFTs can be passivated by simple sputtering process without etch stop layer since the process rather improved the device performances despite some damages to the passivated surfaces.     

大尺寸AMOLED显示的技术挑战

综述了目前大尺寸AMOLED显示的技术挑战,尤其是背板技术。然后论述了如何采用氧化物TFT新技术与LTPS和a-Si TFT的优势相结合制造大尺寸背板的最佳方案。通过对比传统准分子激光退火（ELA）LTPS和非晶铟-镓-氧化锌（a-IGZO）TFT的器件特性,特别揭示了氧化物TFT的挑战性技术。最后,展示了由a-IGZO TFT背板制造的12.1in WXGAAMOLED显示器原型机。     

High Performance Indium‐Gallium‐Zinc Oxide Thin Film Transistor via Interface Engineering

Solution‐processed indium‐gallium‐zinc oxide (IGZO) thin film transistors (TFTs) have become well known in recent decades for their promising commercial potential. However, the unsatisfactory performance of small‐sized IGZO TFTs is limiting their applicability. To address this issue, this work introduces an interface engineering method of bi‐functional acid modification to regulate the interfaces between electrodes and the channels of IGZO TFTs. This method increases the interface oxygen vacancy concentration and reduces the surface roughness, resulting in higher mobility and enhanced contact at the interfaces. The TFT devices thus treated display contact resistance reduction from 9.1 to 2.3 kΩmm, as measured by the gated four‐probe method, as well as field‐effect mobility increase from 1.5 to 4.5 cm² (V s)^?1. Additionally, a 12 × 12 organic light emitting diode display constructed using the acid modified IGZO TFTs as switching and driving elements demonstrate the applicability of these devices.     

High performance electric-double-layer amorphous IGZO thin-film transistors gated with hydrated bovine serum albumin protein

Device performance of amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) has been improved greatly by using bovine serum albumin (BSA) as the top gate dielectric. BSA is a natural protein with acidic and basic amino acid residues, which is easily hydrated in air ambient. A typical a-IGZO TFT with hydrated BSA as the top gate dielectric exhibits a field-effect mobility (μ_FE) value of 113.5 cm² V⁻¹ s⁻¹ in saturation regime and a threshold voltage (V_TH) value of 0.25 V in air ambient. The excellent device performance can be well explained by the formation of electric double layers (EDLs) near the interfaces of a-IGZO/hydrated BSA and hydrated BSA/gate electrode. The reliability issue of a-IGZO TFTs gated with hydrated BSA has been also investigated by using the life time test without encapsulation. The V_TH value increases and μ_FE,sat value reduces slightly for the a-IGZO TFT and remain stabilized over 60 days.     

Amorphous InGaZnO thin film transistors with sputtered silver source/drain and gate electrodes

The amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) with sputtered silver source/drain (S/D) and gate electrodes were investigated and developed. The sputtered single-film Ag was confirmed to be unfit for the electrodes of a-IGZO TFTs because of its bad contact with a-IGZO and atom diffusion into insulators. Accordingly the sputtered Mo films were proposed to serve as the capping layers, indicating that the 20-nm-thick Mo could effectively form ohmic contact with the a-IGZO, prevent the Ag diffusion into the SiO_x, and make good adhesion to the glass substrates. The devices with multi-layer S/D and gate electrodes (Mo/Ag/Mo) were successfully fabricated, exhibiting the reasonably good performance and thus proving the application of the sputtered silver electrodes into a-IGZO TFTs was possible.     

Anodic oxidation of Si in oxygen/chlorine plasma

By adding a few percent of chlorine to oxygen plasma, the anodization rate of Si was enhanced; for example, the rate was doubled for oxygen containing 3-percent chlorine. With a chlorine concentration of 1.5 percent, the density of trap states at the Si-SiO2interface was reduced from 7×10¹¹/cm².eV to 5×10¹¹/cm².eV at the midgap of Si; after annealing at 800°C in argon for 60 min, it was reduced to 8 × 10¹⁰/cm².eV, and did not return to the original value after heating the specimen to 800°C. The density and capture cross section of traps in plasma-anodic oxide were also measured using the constant-current avalanche-injection method. The number of electron traps with small cross sections in plasmaanodic SiO2films was reduced by annealing them at 800°C in argon, but SiO2films which were anodized in oxygen/chlorine plasma showed an increase of trap density under the same annealing condition.     

高可靠性Cu BCE a-IGZO TFTs的制作

背沟道刻蚀型（BCE）非晶氧化铟镓锌薄膜晶体管（a-IGZO TFT）具有工艺简单、寄生电容小以及开口率高等优点,但BCE IGZO器件背沟道易受酸液和等离子体损伤,进而引起TFT均匀性和稳定性等方面问题,随着GOA技术的导入,对TFT器件电学性能的均匀性和稳定性提升的要求也日益迫切,因此开发高信赖性BCE IGZO TFT是技术和市场的迫切要求。本文主要分析了基于IGZO的背沟道刻蚀型薄膜晶体管电学性质,通过优化钝化层材料,色阻材料以及GOA TFT结构等削弱因背沟道水汽吸附引起的器件劣化,偏压温度应力测试结果显示优化后的TFT展现了良好的稳定性——在80℃,栅极30 V负向偏压条件下,2 000 s的ΔV_th小于1 V。最终,利用优化的IGZO TFT制作了215.9 mm（85 in）8K4K 120 Hz液晶显示器。     

一种新型a-IGZO TFT集成栅极驱动电路设计

在传统集成栅驱动电路中采用非晶InGaZnO薄膜晶体管(a-IGZO TFT)后会造成信赖性的降低,经过分析确定原因为驱动TFT阈值电压漂移。本文提出了一种改进的集成栅驱动电路,通过对驱动TFT栅节点电压的稳定控制,获得了较大的驱动TFT阈值电压漂移冗余度(从原来的不到±-3V扩大到±-9V),克服了a-IGZO TFT阈值电压漂移所造成的电路失效,稳定了集成栅驱动电路并延长了液晶显示器面板的寿命。     

High performance poly-Si TFTs fabricated using pulsed laserannealing and remote plasma CVD with low temperature processing

Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4×10¹⁶ cm^-3 by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO ₂/Si with the interface trap density of 2.0×10¹⁰ cm^-2 eV^-1 at 270°C. Poly-Si TFTs were fabricated at 270°C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm²/Vs for n-channel TFTs and 400 cm²/Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2×10^-10 A/μm to 3×10^-13 A/μm at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 μm     

Influence of channel layer and passivation layer on the stability of amorphous InGaZnO thin film transistors

The electrical stability of amorphous InGaZnO (a-IGZO) TFTs with three different channel layers was investigated. Compared with the single channel layer, the a-IGZO TFT with double stacked channel layer showed the lowest threshold voltage shift with slightly change in field effect mobility and sub-threshold swing under positive and negative gate bias stress tests. Moreover, sputtered SiN_x thin film was served as passivation layer where the V_th shift in bias stress effect evidently became less. It was found that the passivated a-IGZO TFT with double stacked channel layer still exhibited the best stability. The results prove that the stability of a-IGZO TFTs can be effectively improved by using double stacked channel layer and passivation layer.     

金属氧化物IGZO薄膜晶体管的最新研究进展

最近几年,金属氧化物IGZO薄膜晶体管成为研究热点,具有高迁移率、稳定性好、制作工艺简单等优点,备受人们关注。文章综述了制作金属氧化物IGZO晶体管的结构及其优缺点,总结了影响金属氧化物IGZO薄膜晶体管性能的因素,并提出了制作高性能金属氧化物IGZO薄膜晶体管的方法。     

Approaching Trap-Minimized Polymer Thin-Film Transistors

Semiconducting π-conjugated polymers are the most promising candidates for flexible electronics owing to their facile processability and mechanical robustness; however, achieving steep and stable switching operations in polymer thin-film transistors (TFTs) remains a serious challenge. Herein, it is shown that whole optimizations for eliminating interfacial carrier traps throughout the conductive path are necessary in achieving TFTs showing both exceptionally sharp switching and bias-stress-free characteristics. Inverted-coplanar-type TFTs composed of a highly lyophobic amorphous perfluoropolymer gate–dielectric interfaced with a push-coated semiconducting polymer layer are manufactured. The use of the dielectric allows the establishment of bias-stress-free characteristics with minimized contact resistance. Additionally, fairly sharp on/off switching TFTs with the smallest normalized subthreshold swing can be obtained by utilizing a particular donor–acceptor copolymer that involves a self-passivation mechanism working to achieve a trap-minimized interface. These findings have opened a way for low-power and robust device operations in polymer-based flexible electronics.