COF结构中键合力损伤芯片Al层的研究

运用实验和有限元模拟相结合的方法,研究了非导电膜和金-金共金工艺中键合力对芯片Al压焊块内应力分布的影响,并分析了样品的失效部位和失效原因.挠性基板上印制线宽度不同时键合力对芯片损伤情况的研究表明,小印制线宽度在相同单位面积键合力情况下对Al压焊块损伤较轻.讨论了印制线宽度对键合偏移容差的要求.     

压焊块结构设计对打线效果影响的研究

引起封装打线失效的原因有很多,首先是封装打线工艺的影响,但是芯片自身质量也有很大的关系。文章主要考虑芯片压焊块结构的设计因素,诸如压焊块区域膜层的组成、其上的孔阵列尺寸、铝层厚度等,对打线效果的好坏（脱铝、打穿）都有很密切的关系。文中对这几个因素进行研究,如压焊块上开孔的尺寸对打线粘附力的影响,不同clear rati...     

电子元器件金铝键合失效分析研究

金铝键合失效是电子元器件常见的失效模式之一。对某型号射频芯片和检波器两例产品开展了失效分析研究。结果表明,一例失效产品出现了键合丝脱落的情况,一例失效产品出现了键合拉力几乎为零的情况,这是由于铝焊盘与金键合丝之间形成了金铝间化合物,金铝间化合物电阻率较高,使得键合强度降低或键合脱开,最终导致产品失效。研究了金铝化合物的失效机理,借助扫描电子显微镜对金铝化合物形貌及元素进行了分析,最后对金铝化合物所导致的失效提出了预防和改进措施,对于提高电子元器件的可靠性具有一定的借鉴意义。     

局部增强压焊块铝层厚度的工艺方法

针对目前铜线封装对芯片压焊块的铝层厚度要求较高的问题,通过改进芯片制造工艺流程,对芯片内部压焊块的铝层进行单独地加厚。以便同时满足芯片封装厂采用铜线打线和芯片制造厂金属刻蚀工艺难易的要求。做法为,在钝化层刻蚀完成后,再生长一层足够厚的金属层,进行钝化层反版的光刻以及湿法刻蚀,只保留下压焊块区域的金属层,此时压焊块区域就...     

混合集成电路金铝键合退化与控制研究动态

混合集成电路的两种金铝键合系统,有着不完全相同的两种退化模式。综述了相关的退化机理和控制方法的研究状况。金丝与芯片铝膜的Au/Al键合系统,是键合IMC、Kirkendall空洞导致其界面开裂失效;铝丝与厚膜金导体的Al/Au键合系统,除了界面开裂外,还存在键合根部因铝原子向IMC过度迁移而形成铝丝内部空洞导致铝丝断裂。采用铜丝代替金丝,可有效控制Au/Al键合系统的退化;采用过渡垫片或在金浆料中加入少量Pd,同时减少金导体膜厚度,可有效控制铝丝Al/Au键合系统的退化。     

基于薄膜HIC金铝键合失效的工艺研究

介绍了薄膜混合集成电路(HIC)中金铝键合失效机理,提出了一种解决金铝键合失效的新工艺.分析失效机理发现,铝丝和薄膜金导带形成的金铝界面因原子扩散而形成内部空洞,出现键合根部的键合丝断裂的现象.通过改变键合区金属层结构,实现了单一金属化系统,有效避免了金属间化合物的形成.该项研究结果对陶瓷基薄膜HIC的工艺应用范围的拓...     

不同状态的SiAl丝对混合集成电路键合点根部损伤的影响

键合点根部损伤是Al丝超声键合工艺中最常见的问题之一，严重的根部损伤不仅使焊点的键合强度降低，甚至会使键合点失效。本通过优化键合机器的工艺参数，分析键合丝的组成成份和采取不同的退火条件，研究Al丝超声键合中键合点根部损伤的程度，为键合丝的选用提供依据，也为进一步提高Al丝超声键合强度做一些基础工作。     

半导体器件金铝键合的寿命研究

金铝键合失效是MOSFET器件常见的失效模式之一,主要是由于金属间化合物的生成,影响了金铝键合的接触电性能,从而导致键合强度下降,接触电阻升高。针对这种失效模式,进行了三种不同高温条件下的加速寿命试验,并对这三种试验的器件进行金铝键合现象观察,对目前工艺水平下的金铝键合寿命进行了评估。     

GaAs芯片上倒装Si芯片的金凸点高度与键合工艺参数优化

随着射频集成电路向小型化、高集成方向发展，基于金凸点热超声键合的芯片倒装封装因凸点尺寸小、高频性能优越成为主流技术之一。以GaAs芯片上倒装Si芯片的互连金凸点为研究对象，通过有限元仿真方法，分析了温度和剪切力作用下不同高度金凸点的等效应力，得到金凸点的最优高度值。通过正交试验，研究键合工艺参数(压力、保持时间、超声功率、温度)对金凸点高度和键合强度的影响规律。通过可靠性试验，验证了工艺优化后倒装焊结构的可靠性。结果表明：键合工艺参数对凸点高度的影响排序为压力>超声功率>温度>保持时间，对剪切力的影响排序为压力>超声功率>保持时间>温度。     

高温对金-铝系统电阻和强度的影响研究

在讨论金-铝键合系统失效机理的基础上,对高温条件下金-铝键合系统接触电阻和键合强度衰变情况进行研究.给出了金-铝系统接触电阻高温衰减曲线和破坏性键合拉力强度高温衰减曲线.通过对实验结果的分析,提出在设计中通过评估键合点工作温度来避免金-铝键合系统的可靠性隐患.     

Study of the self-alignment of no-flow underfill for micro-BGA assembly

As a concept to achieve high throughput low cost flip-chip assembly, a process development activity is underway, implementing next generation flip-chip processing based on large area underfill printing/dispensing, IC placement, and simultaneous solder interconnect reflow and underfill cure. The self-alignment of micro-BGA (ball grid array, BGA) package using flux and two types of no-flow underfill is discussed in this paper. A “rapid ramp” temperature profile is optimized for reflow of micro-BGA using no-flow underfill for self-aligning and soldering. The effect of bonding force on the self-alignment is also described. A SOFTEX real time X-ray inspection system was used to inspect samples to ensure the correct misalignment before reflow, and determine the residual displacement of solder joints after reflow. Cross-sections of the micro-BGA samples are taken using scanning electronic microscope. Our experimental results show that the self-alignment of micro-BGA using flux is very good even though the initial misalignment was greater than 50% from the pad center. When using no-flow underfill, the self-alignment is inferior to that of using flux. However, for a misalignment of no larger than 25% from the pad center, the package is also able to self-align with S1 no-flow underfill. However, when the misalignment is 37.5–50% from the pad center, there are 10–14% residual displacement after reflow. The reason is the underfill resistant force inhibiting the self-alignment of the package due to rapid increment of underfill viscosity during reflow. The self-alignment of micro-BGA package using no-flow underfill allows only <25% misalignment prior to the soldering. During assembling, although the bonding force does not influence on the self-alignment of no-flow underfill, a threshold bonding force is necessary to make all solder balls contact with PCB pads, for good soldering. The no-flow underfill is necessary to modify the fluxing/curing chemistry for overcoming the effect of tin metal salt produced during soldering on underfill curing, and for maintaining the low viscosity during soldering to help self-alignment.     

An accommodative approach designed for TCP gold-to-gold inner lead bonding

This paper proposes an approach that resolves the tradeoff between bond pad crack, the passivation crack, and lead lift failure modes in gold-to-gold inner lead bonding. The bonding head temperature, stage temperature, and bonding force are addressed as three critical recipes. The proposed scenario determines the bonding head temperature according to the maximum compensation flatness, followed by the corresponding stage temperature and required bonding force in sequence. The relevant gold bump hardness, chip warpage, and flatness variation in the bonding tool were evaluated using the finite-element method. The corresponding bonding force was determined using semianalytical equations with empirical factors. A gate driver IC with 280 I/O pins was adopted to conduct the experimental verification in the engineering pilot run. With the optimal recipes, the obtained results demonstrated success in diminishing these three failure modes. The feasibility of proposed approach was verified experimentally.     

Effect of misalignment on electrical characteristics of ACF joints for flip chip on flex applications

The effect of misalignment on the electrical properties of anisotropic conductive film (ACF) joints is investigated in this work. It is found that along with the increase of misalignment, the connection resistance of ACF joints increases. When the misalignment in x-direction is less than 5 μm, the increase rate of connection resistance is quite large. Then, along with the severity of misalignment, the increase rate becomes smaller. Finally, when the misalignment is close to 20 μm, the increase rate rises again. The Holm's electric contact theory is used for understanding the connection resistance variation. On the other hand, with the increase of misalignment in x-direction, the insulation resistance between ACF joints decreases. If the misalignment exceeded 10 μm, the decrease is prominent for the Ni particle ACF joints. This phenomenon can be explained by the effect of dielectric damage of the epoxy.Computer programs are also developed to calculate the variation of the probability of open and shorting after misalignment and predicate the maximum misalignment tolerance. The results show that the open and shorting probability increase abruptly after misalignment. On the view of pad parameters, the open probability is mainly related to the pad area, while the pads gap is critical to the shorting probability. Large pads gap (small pad width) can reduce the shorting probability obviously. On the other hand, enlarging the pad area by increasing pad length decreases the open probability significantly. So comparing to square shape pad, rectangle shape pad can reduce the failure probability greatly.     

Numerical analysis of ultrasonic wire bonding: Part 2. Effects of bonding parameters on temperature rise

The thermo-structural analysis of ultrasonic wire bonding is performed by means of 3D finite element method. A special focus has been placed on monitoring the temperature rise during ultrasonic vibration. An equivalent method is used to simulate the wire and bond pad, where the large volumes of wire and bond pad are effectively reduced to small computational magnitudes. The history of temperature changes in the wire-bond pad-substrate interfaces influenced by varying bond forces and bond pad sizes is specifically studied. It is shown that the maximum bulk temperature obtained upon completion of ultrasonic vibration is far lower than the melting temperatures of the wire and bond pad materials, indicating that the bulk temperature rise due to ultrasonic vibration is not directly responsible for ultrasonic wire bonding. A large bond pad size usually leads to a lower temperature rise, and when the pad size reaches a certain value, the effect of bond pad size on temperature rise becomes insignificant. A higher bond force results in a marginally higher temperature rise than a lower bond force, which does not necessarily affect the wire bondability.     

Hermetic Packaging Using Eutectic SnPb Solder and Cr/Ni/Cu Metallurgy Layer

We have developed an easy, low-cost, and low-temperature optoelectronic hermetic packaging technology utilizing the eutectic SnPb solder and the Cr/Ni/Cu bonding pad. Bonding characteristics of the design were investigated in three different setups: silicon-silicon, silicon-glass, and glass-glass samples. Hermeticity was achieved at 200 degC without flux for all samples during the final bonding process. The bonding pads did not dewet during or after the reflow process. By utilizing the eutectic SnPb solder, the self-alignment process can be achieved. Because the bonding process was conducted through visual alignment, original misalignment was estimated to be more than 100 mum. The surface tension of melting solder during the reflow process allowed the samples to self-align and obtain a misalignment of less than 20 mum after solidification, which was 4% of the entire solder width. The bonding strength of the three setups ranged from 3 to 10 MPa. Among the three setups, glass-glass samples appear to have the strongest bonding strength. This low-temperature and cost-effective soldering process has demonstrated its feasibility and potential utilization in optoelectronic packaging     

Numerical analysis of fine lead bonding-effect of pad thickness oninterfacial deformation

Deformation process of lead and pad during inner or middle lead bonding for packaging integrated circuit (IC) is simulated by a finite element method (FEM) in order to understand the effect of pad thickness on lead deformation behaviors, especially on the interfacial extension between lead and pad. The simulated bonding process was simplified so that we could easily understand the effect of pad thickness. Because of the simplification, we assumed that lead and pad were both made of gold and the cross section of lead was square. The mode of the interfacial deformation largely depends on the size ratio of δ₀/h ₀, where δ₀ is the pad thickness and H₀ is the lead height. The distributions of equivalent stress on the lead/pad and pad/substrate interfaces were also analyzed to discuss the bondability. It was suggested that the size ratio controls the position of the maximum stress at the pad/substrate interface which can damage silicon substrates     

Role of process parameters on bondability and pad damage indicators in copper ball bonding

Cu wire bonding is one of the hottest trends in electronic packaging due to the cost and performance advantages of Cu wire over Au wire. However, there are many challenges to Cu wire bonding, one of which is the increased stress transmitted to the bond pad during bonding. This high stress is not desirable as it leads to pad damage or cratering in the Si under the pad. Another issue is pad splash in which the pad material is squeezed outside the bonded area, which in severe cases can cause Al pad thinning and depletion. To study the root cause of the increased stress, ball bonding is performed with Au and Cu wires using the same levels of ultrasound (USG), bonding force (BF), and impact force (IF). The bonding is performed on a bonding test pad with integrated piezoresistive microsensors and the in situ pad stress is measured in real time. The ultrasonic pad stress did not show any significant difference between the Au and the Cu ball bonding processes. This indicates that the cause of increased stress cannot be attributed to material properties such as hardness alone, and that the differences in bondability and bonding parameters required for the Cu process might be more influential. To achieve optimal bonding results in terms of shear force per unit area, the Cu process requires higher BF and USG settings, which are the main causes of pad damage. To understand the effect of bonding parameters IF, BF, and USG on pad stress, a detailed DOE is conducted with Cu wire. In addition to conventional bonding parameters, the effect of a non-zero USG level applied during the impact portion of the bonding (pre-bleed USG) is investigated. One of the findings is the reduction of pad damage when higher pre-bleed USG levels are used.     

CMP中抛光垫的性质研究

以IC1000/Suba IV抛光垫为例,综述了影响抛光垫性能的各种因素,以文献相关数据为依据,着重分析了抛光温度和修整力对抛光垫性能的影响。从分析结果可以得出:IC1000/Suba IV比单层结构IC1000具有更好的抛光效果;新旧抛光垫性能在0~40°C基本相当;新、旧和没有黏合剂抛光垫的正常工作温度为-2.02~103.64°C,且玻璃过渡温度随着抛光垫厚度的减小而增加;抛光垫在0~50°C具有最小的外形变化。定性得出修整力与抛光精度成反比关系,明确了较小修整深度具备较好的平坦化效果。     

The study on failure mechanisms of bond pad metal peeling: Part B––Numerical analysis

According to the results of Part A of this paper [Microelectron. Reliab., this issue], the vertical tension loading transferred from the capillary is clarified as the direct driving force for bond pad metal peeling. Furthermore, the crack on the bonding pad is identified as the direct cause of the pad peeling. However, the major driving force for the crack that is correlated to the four main loadings described in the part A of this paper is not clarified. In order to find the driving force for the crack, whole ball bonding process of ultrasonic wire bonding is simulated by finite element method. The results of this study indicate that the horizontal vibration of the capillary controlled by ultrasonic power of the bonding machine has the most serious effect on the crack on the bonding pad as well as its propagation into the oxide layers in SDRAM chip. Thus it can be the major driving force for the crack.     

Thermosonic bonding of gold wire onto silver bonding layer on the bond pads of chips with copper interconnects

A copper pad oxidizes easily at elevated temperatures during thermosonic wire bonding for chips with copper interconnects. The bondability and bonding strength of a gold wire onto a bare copper pad are seriously degraded by the formation of a copper oxide film. A new bonding approach is proposed to overcome this intrinsic drawback of the copper pad. A silver layer is deposited as a bonding layer on the surface of copper pads. Both the ball-shear force and the wire-pull force of a gold wire bonded onto copper pads with silver bonding layers far exceed the minimum values stated in the JEDEC standard and MIL specifications. The silver bonding layer improves bonding between the gold ball and copper pads. The reliability of gold ball bonds on a bond pad is verified in a high-temperature storage (HTS) test. The bonding strength increases with the storage time and far exceeds that required by the relevant industrial codes. The superior bondability and high strength after the HTS test were interpreted with reference to the results of electron probe x-ray microanalyzer (EPMA) analysis. This use of a silver bonding layer may make the fabrication of copper chips simpler than by other protective schemes.