Impact of Thickness on Contact Issues for Pinning Effect in Black Phosphorus Field‐Effect Transistors

Metal/semiconductor contact is a significant constraint in short‐channel field effect transistors (FETs) comprising black phosphorus (BP) and other 2D semiconductors. Due to the pinning effect at metal/2D semiconductor interface, the Schottky barrier usually does not follow the Schottky–Mott rule, resulting in thickness‐dependent FET performance. In this work, the Schottky barrier in BP FETs is investigated via theory calculation and electrical measurement. A simple metal/BP contact model is presented based upon thickness‐dependent electrical characteristics of BP FETs. The model considers the Schottky barrier as a combined effect of the Schottky–Mott rule and the pinning effect and provides a feasibility to track the conducting behavior of other 2D semiconductor FETs.     

InSe Schottky Diodes Based on Van Der Waals Contacts

2D semiconductors are excellent candidates for next‐generation electronics and optoelectronics thanks to their electrical properties and strong light‐matter interaction. To fabricate devices with optimal electrical properties, it is crucial to have both high‐quality semiconducting crystals and ideal contacts at metal‐semiconductor interfaces. Thanks to the mechanical exfoliation of van der Waals crystals, atomically thin high‐quality single‐crystals can easily be obtained in a laboratory. However, conventional metal deposition techniques can introduce chemical disorder and metal‐induced mid‐gap states that induce Fermi level pinning and can degrade the metal‐semiconductor interfaces, resulting in poorly performing devices. In this article, the electrical contact characteristics of Au–InSe and graphite–InSe van der Waals contacts, obtained by stacking mechanically exfoliated InSe flakes onto pre‐patterned Au or graphite electrodes without the need for lithography or metal deposition is explored. The high quality of the metal‐semiconductor interfaces obtained by van der Waals contact allows to fabricate high‐quality Schottky diodes based on the Au–InSe Schottky barrier. The experimental observation indicates that the contact barrier at the graphite–InSe interface is negligible due to the similar electron affinity of InSe and graphite, while the Au–InSe interfaces are dominated by a large Schottky barrier.     

Modeling the gate bias dependence of contact resistance in staggered polycrystalline organic thin film transistors

We have modeled the dependence on the gate voltage of the bulk contact resistance and interface contact resistance in staggered polycrystalline organic thin film transistors. In the specific, we have investigated how traps, at the grain boundaries of an organic semiconductor thin film layer placed between the metal electrode and the active layer, can contribute to the bulk contact resistance. In order to the take into account this contribution, within the frame of the grain boundary trapping model (GBTM), a model of the energy barrier E_B, which emerges between the accumulation layer at the organic semiconductor/insulator interface and injecting contact, has been proposed. Moreover, the lowering of the energy barrier at the contacts interface region has been included by considering the influence of the electric field generated by the accumulation layer on the injection of carriers at the source and on the collection of charges from the accumulation layer to the drain contact. This work outlines both a Schottky barrier lowering, determined by the accumulation layer opposite the source electrode, as well as a Poole-Frenkel mechanism determined by the electric field of the accumulation layer active at the drain contact region. Finally it is provided and tested an analytical equation of our model for the contact resistance, summarizing the Poole-Frenkel and Schottky barrier lowering contribution with the grain boundary trapping model.     

蒙特卡罗方法模拟金属-半导体接触的直接隧穿效应

运用自洽的蒙特卡罗方法模拟了肖特基接触的隧穿效应 .模拟的内容包括具有不同的势垒高度的金属 -半导体接触在正向和反向偏置下的工作状态 .分析模拟结果可知 ,隧穿电流在反向偏置下起主要的作用 .同时还模拟了引入肖特基效应后 ,SBD的工作特性 ,验证了模拟使用的物理模型 .得到了与理论计算值符合的模拟结果 .分析模拟结果表明 ,由于肖特基效应形成的金属 -半导体接触势垒的降低 ,会在很大程度上影响金属 -半导体接触的输运特性     

降低肖特基势垒高度的途径探讨

通过深入地分析影响金属－半导体肖特基势垒的各种因素,探讨了几种降低肖特基势垒高度的途径,其中,特别是通过汽相激光诱导化学掺杂技术在金属－半导体界面上制作一足够薄的高掺杂层,可以使肖特基势垒高度得到显著降低。这种技术的应用,对在ＰｔＳｉ／Ｓｉ界面上制作超浅结和半导体器件中制作良好的欧姆接触提供了广阔的应用前景。     

用弹道电子发射显微术研究超薄金属硅化物/硅肖特基接触

采用弹道电子发射显微术 ( BEEM)技术对超薄 Pt Si/Si、Co Si2 /Si肖特基接触特性进行了研究 ,并与电流 -电压 ( I- V)及电容 -电压 ( C- V)测试结果进行了对比 .研究了 Ar离子轰击对超薄Pt Si/n- Si肖特基接触特性的影响 .BEEM、I- V/C- V技术对多种样品的研究结果表明 ,I- V/C- V测试会由于超薄硅化物层串联电阻的影响而使测试结果产生严重误差 ;BEEM测试则不受影响 .随着离子轰击能量增大 ,肖特基势垒高度降低 ,且其不均匀性也越大 .用 BEEM和变温 I- V对超薄 Co Si2 /n- Si肖特基二极管的研究结果表明 ,变温 I- V测试可在一定程度上获得肖特基势垒     

Intrinsic difference in Schottky barrier effect for device configuration of organic thin-film transistors

Schottky barrier effect for n-channel organic thin-film transistors (OTFTs) with bottom-gate, top-contact (TC) and bottom-gate, bottom-contact (BC) configuration was examined by using device simulation with a thin-film organic transistor advanced simulator (TOTAS). A thermionic field emission (TFE) model which addresses tunneling of thermally excited electrons was applied as a carrier injection model of OTFTs. Simulation results reveal that the BC configuration is affected by Schottky barrier more severely than the TC configuration under the same condition for device parameters, and that this discrepancy in device characteristics can be completely alleviated by contact-area-limited doping, where highly-doped semiconducting layers are prepared in the neighborhood of contact electrodes. Moreover, the existence of an intrinsic Schottky barrier is indicated even though an ohmic-contact condition is assumed, which becomes more prominent for lower bulk carrier concentration in organic semiconductor. This work suggests the availability of the TFE model for simulating realistic OTFT devices with Schottky contacts. From the simulation results, intrinsic differences in device performance for the TC and BC configurations are discussed.     

Numerical analysis of inhomogeneous Schottky diode with discrete barrier height patches

The potential profile inside the semiconductor at the metal–semiconductor contact is simulated by numerically solving the Poisson equation and the drift diffusion equations for inhomogeneous Schottky diode. From the simulated potential and the electron and hole concentrations, the drift-diffusion current as a function of bias is calculated. The simulation is carried out for various distribution patterns of barrier height patches at the metal–semiconductor contact to study the effect of barrier inhomogeneities on the Schottky diode parameters, namely barrier height and ideality factor and their temperature dependence. It is found that barrier height decreases and ideality factor increases with increase in the deviation of discrete barrier height patches in the distribution. The resulting barrier parameters are studied to understand the effect of barrier inhomogeneities on the current–voltage characteristics of inhomogeneous Schottky contact.     

Advantages of collocation methods over finite differences in one-dimensional Monte Carlo simulations of submicron devices

Collocation methods are very useful when one-dimensional Monte Carlo simulations of semiconductor submicron devices require a very accurate solution of Poisson's equation. Potential and electric field may be solved simultaneously with better accuracy than using finite differences. The extension to two dimensions is also outlined. We present the results obtained for Monte Carlo simulation of submicron W/Si and AuGaAs Schottky barrier diodes under forward bias conditions. The accurate solution for the electric field at the ohmic contact boundary allows us to model the injected current and to account for depletion of carriers. Tunnelling effects across the barrier are also included in the simulation.     

Pt／TiO2二极管湿敏传感器

Ｐｔ常被用来在金属氧化物半导体上做肖特基接触，在常温下，Ｐｔ／ＴｉＯ２界面处的电子电导对Ｐｔ／ＴｉＯ２肖特基势垒高度的变化非常敏感，本文描述了利用该性质制造的湿敏传感器的性能，并讨论了因水在Ｐｔ／ＴｉＯ２界面处的化学吸附，引起表面Ｆｅｒｍｉ能级改变，影响Ｐｔ／ＴｉＯ２肖特基势垒的高度，从而导致了Ｉ－Ｖ曲线变化的物理过程，对器件制造过程中的工艺问题所论述。     

Progress toward electrical injection of spin-polarized electrons into semiconductors

The use of carrier spin as a new degree-of-freedom in semiconductor devices offers new functionality and performance. However, efforts to implement semiconductor spintronics have been crippled by the lack of an efficient and practical means to electrically inject spin polarized carriers into a semiconductor device heterostructure. This paper summarizes progress toward that end using magnetic semiconductors and ferromagnetic metals as spin injecting contacts. We describe a very successful approach which employs a ferromagnetic metal/tunnel barrier contact, where the tunnel barrier is simply a tailored Schottky barrier which forms naturally between the ferromagnetic metal and the semiconductor itself. Initial efforts have demonstrated electron spin polarizations of at least 32% in GaAs quantum-well LED heterostructures. Significantly higher spin injection efficiencies are anticipated in optimized structures. These results demonstrate that spin injecting contacts can be formed using a very familiar and widely employed contact methodology, providing a ready pathway for the integration of spin transport into semiconductor processing.     

Nanoscale potential barrier distributions and their effect on current transport in Ni/n type Si Schottky diode

We have experimentally studied the Ni/n-Si nano Schottky barrier height(SBH) and potential difference between patches in the nano Schottky diodes(SD) using contact atomic force microscopy(C-AFM) in tapping mode and scanning tunneling microscopy(STM). Topology measurement of the surface with C-AFM showed that, a single Ni/n-Si SD consists of many patches with different sizes. These patches are sets of parallel diodes and electrically interacting contacts of 5 to 50 nm sizes and between these individual diodes, there exists an additional electric field. In real metal semiconductor contacts(MSC), patches with quite different configurations, various geometrical sizes and local work functions were randomly distributed on the surface of the metal. The direction and intensity of the additional electric field are distributed in homogenously along the contact metal surface. SBH controls the electronic transport across the MS interface and therefore, is of vital importance to the successful operation of semiconductor devices.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Bilayer tellurene-metal interfaces

Tellurene, an emerging two-dimensional chain-like semiconductor, stands out for its high switch ratio, carrier mobility and excellent stability in air. Directly contacting the 2D semiconductor materials with metal electrodes is a feasible doping means to inject carriers. However, Schottky barrier often arises at the metal–semiconductors interface, impeding the transport of carriers. Herein, we investigate the interfacial properties of BL tellurene by contacting with various metals including graphene by using ab initio calculations and quantum transport simulations. Vertical Schottky barriers take place in Ag, Al, Au and Cu electrodes according to the maintenance of the noncontact tellurene layer band structure. Besides, a p-type vertical Schottky contact is formed due to the van der Waals interaction for graphene electrode. As for the lateral direction, p-type Schottky contacts take shape for bulk metal electrodes(hole Schottky barrier heights(SBHs) ranging from 0.19 to 0.35 eV). Strong Fermi level pinning takes place with a pinning factor of 0.02. Notably, a desirable p-type quasi-Ohmic contact is developed for graphene electrode with a hole SBH of 0.08 eV. Our work sheds light on the interfacial properties of BL tellurene based transistors and could guide the experimental selections on electrodes.     

Schottky diode performance of an Au/Pd/GaAs device fabricated by deposition of monodisperse palladium nanoparticles over a p-type GaAs substrate

Au/Pd/p-GaAs Schottky diodes were fabricated by simple assembly of monodisperse Pd nanoparticles on a p-type GaAs semiconductor. Monodisperse 5-nm Pd nanoparticles were synthesized via reduction of palladium(II) acetylacetonate in oleylamine using a borane tert-butylamine complex. The Au/Pd/p-GaAs Schottky diodes provided a barrier height of 0.68 eV, which is higher than room-temperature values reported in the literature. A double distribution was observed for the barrier height for the Schottky diodes from I–V–T measurements. A decrease in temperature lowered the zero-bias barrier height and increased the ideality factor. These observations were ascribed to barrier height inhomogeneities at the interface that altered the barrier height distribution. Values of the series resistance obtained by the Norde method decreased with increasing temperature. Understanding the temperature dependence of the current–voltage characteristics of Au/Pd/p-GaAs devices might be helpful in improving the quality of Pd deposited on GaAs for future device technologies.     

肖特基接触的机理及不均匀性研究

对一般情况下肖特基接触的机理和肖特基势垒高度的影响因素做了系统分析,研究了肖特基接触特性的不均匀性及其原因,指出多晶界面势垒高度比同种材料的要低。通过实验,研究了金属/n-poly-Si0.83Ge0.17肖特基结的I-V-T特性,得到了势垒高度及影响因子与测试温度和外加偏压的依赖关系。研究发现:随着测试温度升高,表观理想因子变小,肖特基势垒高度变大;外加偏压增大,表观势垒高度和理想因子均变大。基于肖特基接触的不均匀性进行建模,得到了退火样品的表观势垒高度和理想因子近似为线性负相关的结论。     

Environmental sensitivity of Au diodes on n-AlGaN

With growing interest in AlGaN for ultraviolet detectors and high-power/high-temperature electronic devices, the problem of forming high-quality Schottky contacts to this semiconductor has become increasingly important. It was shown that wet-chemical surface pretreatments affect the as-deposited diode characteristics for Au/n-AlGaN Schottky diodes. However, these diodes improve over the course of days when exposed to air at room temperature, exhibiting reduced leakage currents, enhanced barrier heights, and reduced ideality factors. Exposure to oxygen, with an enhanced effect in the presence of water vapor, is responsible for the environmental aging. The environmental aging was found to occur regardless of the source of AlGaN, surface preparation, and metal deposition technique. It was determined that high asdeposited reverse currents were due to current transport beneath the contact area, rather than across the semiconductor surface. Two findings further suggested that the change in electrical characteristics was due to a phenomenon occurring at the metal/semiconductor interface. First, metal thickness played a key role in the rate of change of the electrical characteristics, with thicker contacts being more impervious to surrounding gas species at room temperature. Second, a metal that readily forms an oxide, Ni, exhibited little environmental aging, while noble metals, such as Au and Pt, showed dramatic effects. Mild anneals revealed that the environmental change was partially reversible, which suggests the passivation of electrically active defects at the metal/semiconductor interface as the cause of the altered diode behavior. Taken together, the data indicate that oxidizing species diffuse through noble metal contacts to the metal/semiconductor interface and passivate electrically active defects, which may be reactivated upon mild anneals in N₂.     

金属/氮化物肖特基势垒和欧姆接触研究进展

金属 /氮化物肖特基势垒和欧姆接触是蓝紫光光学器件及高温大功率电子器件中的关键工艺。氮化物半导体是一种极性材料 ,表面态密度较低 ,费米能级钉扎效应较弱 ,表面处理能显著影响接触特性。样品表面的沾污和氧化层也会使接触特性显著退化。宽禁带材料的杂质离化能高 ,重掺杂比较困难。深能级陷阱对载流子的俘获效应很强。这些因素都增加了接触的制作难度 ,促使人们寻求新的方案来改进接触特性。文中从金属 /半导体接触的物理模型出发来综述肖特基势垒和欧姆接触的研究进展 ,希望能给器件研究者提供新的思路。     

Analysis of contact effects in fully printed p-channel organic thin film transistors

Contact effects have been analyzed in fully printed p-channel OTFTs based on a pentacene derivative as organic semiconductor and with Au source–drain contacts. In these devices, contact effects lead to an apparent decrease of the field effect mobility with decreasing L and to a failure of the gradual channel approximation (GCA) in reproducing the output characteristics. Experimental data have been reproduced by two-dimensional numerical simulations that included a Schottky barrier (Φ_b = 0.46 eV) at both source and drain contacts and the effects of field-induced barrier lowering. The barrier lowering was found to be controlled by the Schottky effect for an electric field E < 10⁵ V/cm, while for higher electric fields we found a stronger barrier lowering presumably due to other field-enhanced mechanisms. The analysis of numerical simulation results showed that three different operating regimes of the device can be identified: (1) low |V_ds|, where the channel and the Schottky diodes at both source and drain behave as gate voltage dependent resistors and the partition between channel resistance and contact resistance depends upon the gate bias; (2) intermediate V_ds, where the device characteristics are dominated by the reverse biased diode at the source contact, and (3) high |V_ds|, where pinch-off of the channel occurs at the drain end and the transistor takes control of the current. We show that these three regimes are a general feature of the device characteristics when Schottky source and drain contacts are present, and therefore the same analysis could be extended to TFTs with different semiconductor active layers.     

Influence of pinning trap in Ti/4H–SiC Schottky barrier diode

Ti/4H–SiC Schottky barrier diode without any intentional edge termination is fabricated. The obtained properties, low on-resistance of 3 mΩ cm² and low leakage current of 10⁻⁴ A/cm² at 1000 V, are evaluated by device simulation considering pinning at metal/semiconductor interface. The breakdown voltage is explained by minimization of electric field enhancement at the Schottky electrode edge due to pinning. The leakage current corresponds to Schottky barrier tunneling current depending on drift layer doping and Schottky barrier height.