基于设计空间的基本开关电容电路滤波器设计

提出了一种运用符号和数值计算与离散非线性优化相结合的滤波器设计方法——设计空间法,把滤波器的技术指标,即滤波器设计中要用到的一组参数映射到设计空间,并根据给定的准则寻找这一设计空间的最佳解决方案。然后介绍了一种新型的具有独立零点设置的基本二阶开关电容电路,最后通过实例阐述了用设计空间法设计一开关电容（SC）低通滤波器,实验证明了该方法的可行性,并且得到了预期的效果。     

Design of switched-capacitor elements with voltage inverter switches for the simulation of FDNR Reference Structures

A number of new elements for switched-capacitor filters based on voltage inverter switches will be described. the new circuits simulate elements which are obtained from the normally used ones by FDNR transformation. They are insensitive to bottom plate parasitics and the influence of the to plate parasitics can be reduced. No matching is required between any capacitors in the SC circuit, so that the same low sensitivity to element variation holds as for the reference structure. These new elements allow realization of some further filter structures.     

Design criterion for high‐speed low‐power SC circuits

The settling behavior of switched‐capacitor (SC) circuits is investigated in this paper. The analysis is performed for typical SC circuits employing two‐stage Miller‐compensated operational amplifiers (op‐amps). It aims to evaluate the real effectiveness of the conventional design approach for the optimization of op‐amp settling performances. It is demonstrated that the classical strategy is quite inaccurate in typical situations in which the load capacitance to be driven by the SC circuit is small. The presented study allows a new settling optimization strategy based on an advanced circuit model to be defined. As shown by design examples in a commercial 0.35‐ µm CMOS technology, the proposed approach guarantees a significant settling time reduction with respect to the existing settling optimization strategy, especially in the presence of small capacitive loads to be driven by the SC circuit. Copyright © 2010 John Wiley & Sons, Ltd.     

利于集成且对杂散电容抑制性极佳的开关电容型滤波器

采用单位缓冲器设计对杂散电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件,利用该元件对椭园函数式LC低通滤波器进行SC模拟。为了获得电容最佳值,提出了一种简单的最优化方法。并采用寄生电阻预畸变与SC负电阻相结合的办法,设计的SC滤波器对杂散电容不灵敏,且电路简单。本文采用分立元件制作了一个五阶椭园低通SC-FDNR滤波器,实验结果表明该方法实用可行,效果明显。     

Non-linear optimization with constraints: A cook-book approach

Based on the stationary co-content theorem in non-linear circuit theory and the penalty function approach in non-linear programming theory, a canonical circuit for simulating general non-linear programming problems with equality and/or inequality constraints has been developed. the task of solving a non-linear optimization problem with constraints reduces to that of finding the solution of the associated canonical circuit using a circuit simulation program, such as SPICE. A catalogue of canonical circuits is given for each class of non-linear programming problem. Using this catalogue, an engineer can solve non-linear optimization problems by a cook-book approach without learning any theory on non-linear programming. Several examples are given which demonstrate how SPICE can be used, without modification, for solving linear programming problems, quadratic programming problems, and polynomial programming problems.     

小功率电源SC-FDNR滤波器的设计

设计了一种小功率电源有源滤波器：利用一个单位缓冲器设计了对寄生电容不灵敏的开关电容 (SC) 频率相关负电阻(FDNR) 元件，利用该元件对椭园函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，而且电路简单。本文用分立元件制作了一个五阶椭园低通SC-FDNR滤波器，实验结果表明该方法实用可行，效果明显。     

On a family of new two-op-amp switched-capacitor biquads for high-frequency applications

This paper presents three novel biquads derived by applying the concept of so-called basic elements for switched-capacitor (SC) circuits. These biquads are without continuous feedback and comprise two op-amps. They were derived assuming a transfer function denominator of the same form as the Fleischer-Laker type E circuit. It is shown that by a simple modification of the switching arrangement, i.e. by changing the type of the basic SC element, the effect of the amplifier finite gain on the performance of SC filters can be significantly reduced. the efficiency of this approach has been established by extensive simulation studies using the dedicated symbolic analysis program SCYMBAL. Design equations and comparison with already known biquads of this type are presented. Examples are provided to demonstrate that the proposed circuits require a low total capacitance while finite-gain effects are considerably reduced.     

Design of wave-sc filters using building blocks

Besides switched-capacitor (SC) filters developed for high volume production, e.g. the PCM-codec lowpass filter, numerous low volume applications exist in the area of solid-state filtering. to open up this application field for SC filters, a novel wave-SC filter structure is presented. the filter design using this concept requires only moderate design and layout skills since only a limited library of highly modular building blocks is required. It is also suitable for analogue gate array applications. As will be shown, the wave equations which are known from the theory of wave digital filters can be realized using stray-insensitive SC integrators and SC amplifiers only. Exemplary designs of a lowpass, a highpass, and a bandpass filter will be carried out with the building blocks presented. the theoretical results are verified by measurements at the breadboarded lowpass filter.     

Analysis of non-linear dynamical circuits and systems under the influence of thermal noise

In some electronic systems, such as cryoelectronic circuits, random noise has to be taken into consideration for modelling and simulation. After theoretical considerations an algorithm for the simulation of non-linear circuits with random noise is developed. Methods for global analysis of non-linear dynamical systems, such as Lyapunov exponents and the Poincaré map, are applied to systems with noise. the developed algorithms are applied to the cryoelectronic circuit of the ideal DC-SQUID model. Several non-linear effects which occur through noise are explained.     

A symmetric lattice-based wideband wide phase range digital phase shifter topology

In this paper, a novel digital phase shifter topology that achieves wideband and wide phase range is proposed. Wide frequency band operation is accomplished employing symmetrical all-pass lattice structures. Compact phase shifter size is obtained utilizing the miniaturized microwave monolithic integrated circuit (MMIC) design implementation technology. Therefore, resulting phase shifter units are suitable for various communication systems such as radar and cellular communication smart antenna arrays. This paper provides complete design equations together with design algorithm for the selected phase shift and the center frequency. Design algorithm is developed on MatLab environment. The proposed phase shifting circuit is implemented employing the commercially available 0.18-μm silicon CMOS technology. The new phase shifter topology provides 0⁰ to 360⁰ phase shift range over X-band, even beyond.     

A discrete-time approach to the steady state analysis and optimization of non-linear autonomous circuits

In this paper a method for the steady state analysis and optimization of non-linear autonomous circuits is described. After discretizing the linear part of the circuit, a system of non-linear algebraic equations is obtained. the final formulation is written entirely in the discrete-time domain, making it unnecessary to repeatedly take direct and inverse DFTs during the solution process. Furthermore, it is shown that the resulting formulation may be viewed as a generalization of the harmonic balance equations. an analytic method for computing the exact partial derivatives of the resulting equations with respect to the samples of the variables, the oscillation period and the circuit element values is described, making the proposed approach efficient for both analysis and optimization. Different globally convergent techniques for solving the non-linear system of equations are described, with emphasis on an algorithm based on fast simulated diffusion. Selected application examples are provided to validate the proposed approach.     

A systematic approach to the design of stray-insensitive sc circuits from active-RL or RLC prototypes

A systematic approach to the design of stray-insensitive switched-capacitor (SC) circuits from active-RC or RLC prototypes employing a parasitic insensitive SC differential voltage-controlled current-source as a basic building block is attempted. Procedures for transforming active-RC and RLC circuits into stray-insensitive SC circuits are formulated and illustrated with typical examples. Restrictions on the pole-frequency and pole-Q of the SC biquad are derived so that it closely emulates the frequency response of the original active-RC biquad. the SC biquad and the ladder filter derived by the proposed procedures were simulated with discrete components and tested in the laboratory. Test results agree closely with the theoretical predictions.     

Trade-off prediction and circuit performance optimization using a second-order model

A new approach to constrained optimization which is suited to integrated circuit (IC) design is presented and is shown to be additionally capable of the efficient generation of useful trade-off information. In contrast to existing optimization methods in which the constraint functions are only linearized, the new algorithm employs a newly developed method of using optimization history data to obtain, without extra simulation, a second-order approximation to both objective and constraint functions. In the new algorithm the search direction created at each optimization iteration is based on this second-order approximation. As a result the computational efficiency has been greatly improved compared with other constrained optimization methods in terms of the number of function evaluations required, a measure which is crucial in the context of IC design. the effectiveness and efficiency of the new algorithm have been demonstrated by means of some numerical examples which are commonly employed as benchmarks for existing optimization methods and by several electronic circuit examples. In all cases encouraging results have been obtained. It is also demonstrated that the information generated during the last stage of the optimization allows the generation of accurate trade-off information valid over a wide range of circuit performance.     

A hybrid genetic algorithm and bacterial foraging approach for dynamic economic dispatch problem

Dynamic economic dispatch (DED) is one of the most significant non-linear complicated problems showing non-convex characteristic in power systems. This is due to the effect of valve-points in the generating units’ cost functions, the ramp-rate limits and transmission losses. Hence, proposing an effective solution method for this optimization problem is of great interest. The original bacterial foraging (BF) optimization algorithm suffers from poor convergence characteristics for larger constrained problems. To overcome this drawback, a hybrid genetic algorithm and bacterial foraging (HGABF) approach is presented in this paper to solve the dynamic economic dispatch problem considering valve-point effects, ramp-rate limits and transmission losses. The HGABF approach can be derived by integrating BF algorithm and genetic algorithm (GA), so that the BF’s drawback can be treated before employing it to solve the complex and high dimensioned search space of the DED problem. To illustrate the effectiveness of the HGABF approach, several test systems with different numbers of generating units are used. The results of HGABF approach are compared with those obtained by other published methods employing same test systems. These results show the effectiveness and the superiority of the introduced method over other published methods.     

Analysis of wave switched-capacitor filters

For a special class of switched-capacitor filters, the wave SC filters, a very efficient analysis method will be given. It is based on a block partitioning technique, i.e. the whole wave SC network is divided into small subnetworks. Only small matrices have to be processed which saves computation time, so that even large wave SC filters can be analysed very fast and with high accuracy. It will also be shown that the methods can be extended for the analysis of other SC networks. Some numerical examples of different wave SC structures will be given.     

Direct analysis and synthesis of multiphase switched-current networks using signal-flow graphs

A by-inspection analysis and synthesis method for multiphase switched-current (SI) circuits using signal-flow graph (SFG) techniques is presented. The SFG is derived on the transistor level and the method is primarily useful for the hand analysis and design of small and medium-size SI circuits (e.g. SI filters, decimators, interpolators). Tables of commonly used SI circuits, in which the corresponding SFGs and circuits are given, make the derivation easy and fast. From the SFGs, not only the overall discrete-time transfer function, but also those in-between individual switching phases, are obtainable. With the proposed method it is straightforward to include non-ideal effects, such as finite output resistance of MOS transistors, clock-feedthrough and settling error. The method is also a useful tool for the synthesis of new SI circuits. It is shown that every low-sensitivity switched-capacitor (SC) circuit can be mapped directly into a low-sensitivity SI circuit with a corresponding topology. Examples of transformed SC circuits are given and two new double sampling integrators are introduced. © 1998 John Wiley & Sons, Ltd.     

Transistor‐level optimization methodology for the complete design of switched‐capacitor filter circuits

This paper presents an automatic procedure for the design and optimization of switched‐capacitor (SC) filters, including the automatic sizing of transistors in the amplifiers and switches. The optimization procedure is based on genetic algorithms (GAs) where the circuit's fitness is first computed using equations describing the filter's transfer function and then using transient simulations. These equations are obtained using a fast numerical methodology that takes into consideration the electrical behavior of all components in the circuit. The poles and zeros of the SC filter's transfer function are computed using a system of differential equations, obtained from the inspection of the circuit. This system describes the filter's behavior for all switch combinations, including the non‐ideal effects of the transistors in the switches and amplifiers. Due to the low computational effort and accuracy of this methodology, it is possible to use a large population in the GA. After finding a solution through equations, the more computationally intensive SPICE transient simulations are used to fine‐tune the solution, with a much smaller population in the GA. Taking advantage of the equations' low computational load and accuracy, process, voltage, temperature (PVT) corners and mismatch errors optimizations are also performed, allowing the chromosomes fitness to be calculated taking into consideration multiple cases, thus resulting in a low sensitivity design.     

Stochastic economic emission load dispatch through a modified particle swarm optimization algorithm

Conventional economic load dispatch problem uses deterministic models, which are however not able to reflect some real situations in practical applications since certain inaccurate and uncertain factors are normally involved in system operations. Stochastic models are more suited to be used for investigating some of the power dispatch problems. In this paper, both deterministic and stochastic models are first formulated, and then an improved particle swarm optimization (PSO) method is developed to deal with the economic load dispatch while simultaneously considering the environmental impact. Comparative studies are carried out to examine the effectiveness of the proposed approach. First, a comparison is made between the proposed PSO approach and other approaches including weighted aggregation and evolutionary optimization. Then, based on the proposed PSO, the impacts of different problem formulations including stochastic and deterministic models on power dispatch results are investigated and analyzed.     

基于深度优先搜索的潜在电路计算机辅助分析法

潜在电路分析(sneak circuit analysis,SCA)对系统安全可靠运行有重大意义,电力电子变换器的潜在电路分析处于手工分析阶段。该文对电力电子变换器潜在电路计算机分析方法进行研究。根据电路原理建立电力电子变换器矩阵模型,由此采用深度优先搜索算法,对变换器中所有可能的路径进行搜索,再通过判断函数对搜索到的路径进行识别,得到变换器中的潜在电路。基于该方法开发的计算机软件应用表明,它具有方法简单、搜索时间短、无冗余路径、准确性高、通用性强等优点,适用于复杂电力电子变换器的潜在电路分析。以谐振开关电容(resonant switched-capacitor,RSC)变换器为例,验证提出的潜在电路计算机辅助分析方法的正确性。     

Iteration PSO with time varying acceleration coefficients for solving non-convex economic dispatch problems

This paper presents a novel heuristic algorithm for solving economic dispatch (ED) problems, by employing iteration particle swarm optimization with time varying acceleration coefficients (IPSO-TVAC) method. Due to the effect of valve-points and prohibited operation zones (POZs) in the generating units’ cost functions, ED problem is a non-linear and non-convex optimization problem. The problem even may be more complicated if transmission losses are taken into account. The effectiveness of the proposed method is examined and validated by carrying out extensive tests on three different test systems. Valve-point effects, POZs, ramp-rate constraints and transmission losses are modeled. Numerical results show that the IPSO-TVAC method has a good convergence property. Furthermore, the generation costs of the IPSO-TVAC method are lower than other optimization algorithms reported in recent literature.