Photonic fast packet switching

Several approaches to photonic fast packet switching systems are presented. The wavelength-, time-, code-, and space-division approaches, including free-space photonic fast packet switching, are discussed. These approaches to photonic fast packet switching systems show that the research in this area is still in its infancy. Among various solutions, those based on a wavelength-division transport network and an electronic controller are most mature     

The bypass queue in fast packet switching

The telecommunications networks of the future are likely to be packet switched networks consisting of wide bandwidth optical fiber transmission media, and large, highly parallel, self-routing switches. Recent considerations of switch architectures have focused on internally nonblocking networks with packet buffering at the switch outputs. These have optimal throughput and delay performance. The author considers a switch architecture consisting of parallel plans of low-speed internally blocking switch networks, in conjunction with input and output buffering. This architecture is desirable from the viewpoint of modularity and hardware cost, especially for large switches. Although this architecture is suboptimal, the throughput shortfall may be overcome by adding extra switch planes. A form of input queuing called bypass queuing can improve the throughput of the switch and thereby reduce the number of switch planes required. An input port controller is described which distributes packets to all switch planes according to the bypass policy, while preserving packet order for virtual circuits. Some simulation results for switch throughput are presented     

光分组交换系统网管设计与实现

介绍了一种光分组交换网的网络管理系统设计与实现.所有的核心节点和边缘节点的控制模块都采用FPGA实现,代理端和管理端采用了简单网络管理协议(Simple Network Management Protoc01,SNMP),提供了图形化的用户界面,实现了配置、性能、故障和安全管理.该系统能够使光分组交换网络稳定、高效地运行.     

Design and analysis of a novel fast packet switch-pipeline banyan

Proposes a new fast packet switch architecture-pipeline banyan. It has a control plane and a number of parallel data planes which are of the same banyan topology. Packet headers are self-routed through the control plane to their destinations. As a result, they establish the corresponding routing paths in the data planes. The data planes do not need to do routing decisions, hence their complexity can be significantly reduced. Pipeline banyan can give a close to 100% maximum throughput and can deliver packets in a sequential order. Through analysis and simulation, the authors show that pipeline banyan has a better throughput and packet loss performance when compared with other banyan-type switch architectures     

Accuracy of traffic modeling in fast packet switching

Arrivals of calls, bursts, and packets to a fast packet switching system are governed by different time scales. This feature is used to break down the system performance analysis into layers. The impact of each layer on packet delay and blocking is investigated in isolation by assuming the global equilibrium in the next higher layer and deterministic flow of entities in all lower layers. The one-layer analytical model is developed and used to determine lower and upper estimates of a mean delay and blocking. Numerical results are compared with delays obtained from the multilayer simulation. Results of the analysis indicate that the channel utilization must be kept below a threshold value to avoid overload periods in the burst and call layers. Flow control techniques which can be used for that purpose are briefly discussed     

SCOQ: a fast packet switch with shared concentration and outputqueueing

A space-division, nonblocking packet switch with data concentration and output buffering is proposed. The performance of the switch is evaluated with respect to packet loss probability, the first and second moments of the equilibrium queue length and waiting time, throughput, and buffer overflow probability. Numerical results indicate that the switch exhibits very good delay-throughput performance over a wide range of input traffic. The switch compares favorably with some previously proposed switches in terms of fewer basic building elements used to attain the same degree of output buffering     

Analysis of a delay-dependent priority discipline in an integratedmulticlass traffic fast packet switch

A dynamic packet transmission priority discipline, head-of-the-line with priority jumps, is proposed and analyzed for a packet switch serving multiple classes of delay-sensitive traffic. It is shown that, under realistic traffic conditions, the discipline can make the tail probabilities of the delay distributions for the different classes of traffic, in excess of their respective delay requirements, approximately the same, thus resulting in fairness of service and minimization of the maximum tail probability among the different classes. Implementation of the discipline is considered to be relatively simple, and involved processing overhead is minimal     

Performance of a nonblocking space-division packet switch in a timevariant nonuniform traffic environment

The authors study the performance of a nonblocking space-division packet switch, given that the traffic intensities at the switch not only are nonuniform but also change as a function of time. A finite-state Markov chain is used as an underlying process to govern the time variation of traffic for the entire switch. The packet arrivals at each input form an independent Bernoulli process modulated by the underlying Markov chain. The output address of each packet is independently and randomly assigned with probability distributions, which are also modulated by the Markov chain. Provided that the traffic on each output is not dominated by individual inputs the service time of each output queue for sufficiently large switches can be characterized by an independent Markov modulated phase-type process. A matrix geometric solution for the resultant quasi-birth-death type queuing process is presented. The maximum throughput is obtained at the system saturation. The performance of the switch is numerically examined under various traffic conditions. A contention priority scheme to improve the switch performance is proposed     

Operations and management of a campus packet network

The operation and management of the Kansas University Packet Switch Network (KUPSN),which provides interactive and file transfer services to its users, is discussed, focussing on the problems encountered and solutions developed. Areas of network management of particular concern are identified, and tools developed to deal with them are described. Management system integration and the evolution of problem-handling procedures are discussed     

Reconfigurable fault tolerant networks for fast packet switching

The authors consider the design and analysis of reconfigurable networks for fast packet switching. The design constraints resulting from the use of fast packet switching that affect fault-tolerant network design are carefully studied. A reconfigurable network with high link redundancy is then proposed. An abstract replacement model that characterizes the proposed reconfigurable network is presented. Network fault tolerance problems are transformed into well known assignment problems. Two practical designs based on feasible technology are presented. An appreciable reliability improvements is achieved and full bandwidth is maintained up to a tolerable level of failures, with relatively few spare switches     

Technologies and building blocks for fast packet forwarding

We provide a review of the state of the art and the future of packet processing and switching. The industry's response to the need for wire-speed packet processing devices whose function can be rapidly adapted to continuously changing standards and customer requirements is the concept of special programmable network processors. We discuss the prerequisites of processing tens to hundreds of millions of packets per second and indicate ways to achieve scalability through parallel packet processing. Tomorrow's switch fabrics, which will provide node-internal connectivity between the input and output ports of a router or switch, will have to sustain terabit-per-second throughput. After reviewing fundamental switching concepts, we discuss architectural and design issues that must be addressed to allow the evolution of packet switch fabrics to terabit-per-second throughput performance     

Frame-based fast sorting scheduling algorithm for packet networks

A scheduling algorithm denoted frame-based approximate sorting fair queueing (FASFQ) is proposed. FASFQ assembles the packets of G-sessions (sessions with rate reservation) as frames which are transmitted one by one. The packets of E-sessions (`best-effort' sessions) are sent during the intervals between frames. FASFQ reduces the sorting complexity by replacing packet-sorting with frame-sorting, and can satisfy the different QoS requirements of different sessions. Analyses and simulations show that FASFQ can guarantee reserved rates for G-sessions and provide good isolation among sessions     

Multipath interconnection: a technique for reducing congestionwithin fast packet switching fabrics

The banyan interconnection is prone to internal link congestion, resulting in a blocking switch architecture. Several solutions that have been implemented to reduce the severity of link congestion offer packets a multiplicity of paths, which tend to increase packet delay variability and allow delivery of out-of-sequence packets. This, in turn, can lead to an increase in end-to-end protocol complexity, particularly in the case of real-time services. A solution called multipath interconnection is proposed to overcome this difficulty. Multiple (i.e., alternate) paths are provided and one is selected at call-setup time. Subsequent packets belonging to the call are constrained to follow the selected path. A number of path selection strategies are presented     

The fast packet ring switch: a high-performance efficientarchitecture with multicast capability

An architecture is presented for the packet switching of integrated traffic. It is based on the asynchronous routing of packets of varying size through regularly recurring dedicated time slots provided by a simple slotted-ring system. The architecture implements the distributed buffering and processing of packets, is data driven, and is designed to exploit fully the limited bandwidth of the ring system. Thus, switch modules of reasonable size and throughput are made feasible. The switch modules can be easily interconnected to achieve sufficient throughput for networking of services such as voice, data, image, and videoconferencing. The architecture provides a simple modular switching structure which does not suffer from the topological complexities and bottlenecks of those that use the staged Banyan-type networks for the switching of packets. Quasicircuit-switching can easily be achieved through selected ports with a peak bit-rate bandwidth allocation strategy in the switch control. Multicasting in particular is made simple and efficient in the current architecture. Moreover, it provides for the selective queueing of packets in the transmit ports     

A survey of multistage interconnection networks in fast packet switches

This paper comprises a broad survey of multistage interconnection networks (MINs), which are incorporated into the underlying fabric of fast packet switches for use in broadband ATM networks. A general classification of MINs based on network functionality and blocking characteristics in the context of fast packet switches is presented in order to emphasize the fundamental principles which differentiate the network architectures. For each class of network, important theoretical results are given and the underlying design principles are explained with the best known explicit examples. Special emphasis is given to the implementation complexities and control strategies of individual approaches.     

Analysis of a type II hybrid ARQ strategy in a DS-CDMA packet transmission environment

A type II hybrid automatic repeat request scheme is considered as a retransmission strategy in a direct-sequence code-division multiple-access packet mobile radio network. An analysis based on equilibrium point analysis is presented to model the behavior of the system in a message-based traffic generation model. A simulation approach is introduced to validate the proposed analytical model, obtaining results that closely match those derived theoretically.     

一种基于帧的快速包调度算法

本文提出了基于帧的近似排序包调度新算法（FASFQ），该算法用帧排序代替传统的包排序来处理G连接（预约带宽的连接）数据，并在帧与帧之间的空隙传送E型（best offort型）数据。理论分析和实验结果都表明，FASFQ算法与传统算法相比，在大大降低了排序复杂的同时，还能为G连接提供预约带宽，保证连接的独立性和公平性，避免E连接对G连接的冲击。     

Optimal queueing policies for fast packet switching of mixedtraffic

The power of ATM (asynchronous transfer mode) is its ability to provide bandwidth on demand, different sources can have different bandwidth requirements. Sources also differ in performance requirements, some ask for minimal delay variations, whereas others must have extremely low cell loss probabilities. It is shown how these complementary performance requirements can be explained with an LDOLL (low delay or low loss) queue, where sources get either service priority or storage priority. The space of possible LDOLL queuing policies is very large, even after a justified reduction, the size is still O (2^Q2), Q being the maximum number of ATM cells in the LDOLL queue. Using Markov decision theory and concepts of linear programming, only Q so-called efficient solutions are achieved. These are the LDOLL threshold policies, which are conceptually appealing, robust in performance, and practical from the implementation viewpoint     

网络报文动态监测仲裁系统设计实现

网络监听作为一种逐步发展和完善的技术,在协助网络管理员监测网络传输数据、分析网络的流量、排除网络故障等方面具有不可替代的作用。系统实现了流水线式模式进行数据包捕获和解析处理。建立了通用的报文捕获与解析方案。系统主要以UDP协议报文数据段的解析为重点,支持点对点、组播报文和广播报文的捕获与解析。报文协议可由用户自行设计,用户可以根据需要设计应用层报文协议,用于监控与分析报文。