Improved description of base dynamics in the modelling of bipolar transistors

An improved non-linear high-frequency model for the bipolar transistor is presented, based on considerations of the dynamics of the charge stored in the base region. the model incorporates higher-order circuit elements in order to obtain increased accuracy in circuit simulation at high frequencies. the model is derived from device physics by solving the diffusion equation in the base region by means of a quasi-static expansion. the result is a more accurate circuit representation, which can be added to existing bipolar transistor models. Simulation examples are given and the possible convergence problems associated with the model are discussed.     

适用于电路仿真的IGBT模块暂态模型研究

高压IGBT与二极管构成IGBT模块已经广泛应用于柔性直流输电技术领域。然而现有仿真研究难以模拟IGBT模块中IGBT与二极管各自详细开关暂态特性及相互影响,因此提出一种适用于电路仿真的IGBT模块暂态模型及其参数通用提取方法。模型采用机理推导、电气等效、曲线拟合等方法在PSCAD、SABER等电路仿真平台实现,无需获取器件底层参数和求解复杂物理方程,不仅可以实现电路仿真中IGBT模块的各种运行状态,而且可以在纳秒级步长下模拟其电压电流尖峰、拖尾电流、米勒平台等开关暂态特性。通过与SABER中通用模型仿真结果及实验实测波形对比分析,验证了IGBT模块暂态模型和参数提取方法的正确性和通用性,为进一步将模型应用于柔性直流输电系统仿真、电磁干扰及损耗分析、控制策略等研究打下基础。     

Development of an electrothermal simulation tool for integrated circuits: Application to a two-transistor circuit

In this paper a methodology for performing electrothermal analyses on integrated circuits is introduced. Using the relaxation method, standard electrical and thermal simulators, which are often used in the design process, are coupled through an efficient interface program. The simulator is capable of performing steady-state and transient analysis at device and chip levels. A variable-time-step technique has been implemented to reduce the computational time for a given set of computational resources. The simulator has been validated on different structures such as the bipolar junction transistor to predict the temperature distribution and the device performance in an amplifier circuit and an integrated current-mirror circuit. The simulation results are compared to experimental results to verify the performance of the electrothermal simulator and the accuracy of the thermal model. Simulation results demonstrate that the approach is suitable to model the thermal effects of integrated circuits in a more time-efficient, accurate and user-friendly fashion.     

Mathematical model of electromagnetic transient processes in an electrical circuit containing an inductive, superconducting current limiter

A mathematical model of the electromagnetic transient process in a circuit containing elements that smoothly but rapidly change the inductance is proposed. These elements are superconducting fault current limiters. The model provides us with the ability to accurately estimate the influence (thermal and electrodynamic) of a shortcircuit current on the elements of an electrical circuit, which is an essential requirement when choosing electrical equipment.     

An accurate reference-generating circuit for successive approximation current mode A/D converters

As pressures increase on VLSI designers to use a lower supply voltage of 3.3 V rather than the present 5 V, current mode signal-processing techniques will surely become increasingly important and attractive. This paper presents the design of a reference-generating (RG) circuit which employs a current mode divide-by-two circuit. Current dividers are usually implemented by using resistor networks or weighted transistors. the division accuracy of such solutions is limited by resistor or transistor mismatch. In this study the proposed divide-by-two circuit does not rely on well-matched components and high-gain op amps to achieve high accuracy. This paper also addresses the relationship among the operation and accuracy of the division process, the transistor mismatch and the resolution of a converter which employs the RG circuit. the proposed RG circuit can be implemented not only for medium-speed successive approximation current mode A/D converters but also for A/D converter arrays achieving a high conversion rate.     

Parameter estimation for induction machines based on sensitivityanalysis

Induction machine parameters supplied by manufacturers are usually sufficient for short-circuit analysis only. System studies that involve transient simulation of machines require additional parameters that are not readily available, but nonetheless are essential for an accurate modeling of the machines. A mathematical method for estimating the equivalent circuit parameters of induction machines from the most readily available performance characteristics is presented. In this method, machine equations are used to estimate the parameters and sensitivity analyses are then performed with respect to the circuit parameters to match the given performance characteristics. An example is included to illustrate how well the performance of the estimated model matches that of the actual machine. The example is a three-phase, 1000 HP, 4.16 kV, 60 Hz induction motor. The example indicates that, with a restricted set of input data, it is possible to find the elements of a machine model that duplicates the given performance to a high degree of accuracy. Without sensitivity analysis, accuracies on the order of 10% are obtained, but after sensitivity analysis an accuracy of 0.1% or better can be achieved     

IGBT驱动有源钳位电路的研究

有源钳位电路可以有效地抑制绝缘栅双极型晶体管(insulated gate bipolar transistor,IGBT)关断时的尖峰电压,但是有源钳位电路的频繁动作会增大损耗,危及整个系统的安全。所以在对传统的有源钳位电路模型进行电路分析的基础上,提出了一种优化的有源钳位电路,分析比较了两种有源钳位电路关断时的暂态过程,建立了相应的损耗分析模型,对两种电路进行定性损耗分析的计算。最后通过Pspice的定量仿真实验,仿真与分析结果对比证实了所提出的开关模型和损耗模型的正确性。     

A technique of structural synthesis of a relay current controller in a transistor-based electric drive

From a signal methodological perspective, we developed a technique for structural synthesis of a relay current controller in an automatic current-control system for different laws of switching the keys in a valve inverter. The technique consists of several phases: a phase in which timing diagrams of transistor control impulses in the bridge circuit of the valve inverter are constructed, a phase in which the moments of locking and unlocking of the bridge transistors are determined; a phase in which the static characteristics of the relay elements are determined; and a phase in which the number of relay elements of the current controller are minimized and the structure of the controller is formed. Timing diagrams of the transistor control impulses are constructed on the basis of time diagrams, which describe tracking of the control input by the armature current in the direct-current (dc) motors and the armature voltage at the electric-motor armature in all operation modes of the electric drive, and depend on the used law of switching the keys of the bridge circuit in the valve inverter. The moments of locking and unlocking of the inverter bridge transistors are determined using relay elements with an adjustment characteristic of the discontinuous function of a step type, at a smooth alternating signal at the input of the relay element, which is a signal of desynchronization in the automatic currentcontrol system. The technique allows composing the analytical expressions for static characteristics of the relay elements, which define the moments of locking and unlocking the bridge transistors, and minimizing the number of relay elements in the controller. The synthesized relay current controllers with a minimal number of relay elements provide a high accuracy of the armature current in the dc motor in all operation modes of the electric drive.     

Benchmarking of GFET devices for amplifier application using multiscale simulation approach

Starting from advanced NEGF physical simulation of a 100 nm gate length Graphene FET, we attempt to use these results as a starting point to evaluate this technology for microwave circuit benchmarking. Using an improved compact model carefully adjusted on NEGF simulation data, in both DC and AC regime, we use this model to design a mmW amplifier at 140 GHz. In the first part of the design procedure, we use the ADS compact model for coplanar waveguide of passive elements. The complete design is then verified using electromagnetic FEM simulation which gives more reliable results at very high frequencies for passive elements and interconnections. This analysis has shown that unlike first GFET generations, impedance matching problems may be naturally solved with transistor performance improvements. Finally, the GFET device and circuit is compared to HEMT technologies and shows promising performances.     

三相分体式GIS一次系统VFTO的建模与计算

对GIS一次系统元件的建模方法进行了总结与讨论,根据实际情况对部分元件的模型进行了修正。用EMTP建立了一实际110 kV GIS一次系统的计算模型,并对特快速暂态过电压和接地导体上的暂态电流进行了仿真计算。计算结果与实测结果进行了比较,验证了模型的有效性和仿真计算的可行性。     

Load characterization and power conditioner synthesis using higher-order elements

It is shown that virtually all nonlinear and/or time-varying loads that generate harmonic current distortion can be characterized in terms of so-called higher-order circuit elements. The most relevant higher-order elements exploited in this paper are the memristor, meminductor, and memcapacitor. Such elements naturally arise by introducing constitutive relationships in terms of higher-order voltage and current differentials and integrals. Consequently, the power conditioner necessary to compensate for the load current distortions is synthesized similarly. The new characterization and compensation synthesis is applied to the half-wave rectifier and the controlled bridge converter.     

The current-switching principle-the versatile long-tailed pair

The circuit technique known as current-switching is versatile and fundamental to the operation of digital systems working at high digit switching rates. For these reasons, it merits close study by engineering students, particularly those intending to become proficient in circuit design. This paper presents a tutorial-review of the long-tailed pair current-switch using bipolar junction transistors. A brief historical survey sets the scheme in context. Then, a DC characterization, employing a simplified equivalent circuit, is followed by a first-order study of the transient response based on the use of a charge-control model of the transistor. Finally, a miscellany of applications is listed to illustrate the adaptability of the scheme to the design of logic and waveform generation and shaping circuits     

Efficient output waveform evaluation of a CMOS inverter based on short‐circuit current prediction

A novel approach for obtaining the output waveform, the propagation delay and the short‐circuit power dissipation of a CMOS inverter is introduced. The output voltage is calculated by solving the circuit differential equation only for the conducting transistor while the effect of the short‐circuit current is considered as an additional charge, which has to be discharged through the conducting transistor causing a shift to the output waveform. The short‐circuit current as well as the corresponding discharging current are accurately predicted as functions of the required time shift of the output waveform. A program has been developed that implements the proposed method and the results prove that a significant speed improvement can be gained with a minor penalty in accuracy. Copyright © 2002 John Wiley & Sons, Ltd.     

晶体振荡器频率稳定度的矩阵分析

分析石英振荡器因电路元件或晶体管参量变化所引起的频率变化,就参量变化与频率漂移彼此之间的关系作了计算。推导有关电路参量变化所引起频率变化的一般方程,晶体管的y参量和振荡器电路元件都是已知的情况下,此方程也适用于任何其它振荡器的工作频率。     

High-speed non-linear circuit models for p-n junction diodes

Circuit models for both long-base and short-base p-n junction diodes which are valid for non-linear high-speed and high-frequency operations are presented. the diode model consists of a parallel connection of higher-order dynamic elements and includes the conventional diffusion model as a special case. the new dynamic model can be used for simulating arbitrary p-n junction diode circuits under all operating conditions. In particular, it is capable of simulating realistically the diode's reverse transient behaviour and providing an increasingly accurate approximation to the diffusion equation as the order of the model gets higher. the model is also shown to be capable of reproducing the frequency-dependent small-signal characteristics of p-n junction diodes. The model is based mainly upon the device's physical operating principles. Perhaps the most significant implication of the model is the fact that it illustrates the important roles played by higher-order and dynamic elements in highspeed and high-frequency non-linear device modelling.     

大功率链式STATCOM电磁暂态快速等效建模和误差评估

针对含有大量模块的大功率链式静止同步补偿器(STATCOM)存在的电磁暂态仿真速度缓慢的问题,提出一种链式STATCOM级联H桥拓扑的等效建模方法,以提高仿真效率。主要开展了以下的研究:对比分析了经典电磁暂态建模和快速等效建模的原理;推导出级联H桥换流链电压、电流之间的数学模型;结合换流链数学模型及其控制方法,设计出基于MATLAB/Simulink的仿真流程;分析主要电气量如功率模块直流电压、换流链电流和功率等的理论误差。比较精确模型和等效模型的仿真精度和仿真速度,结果表明所提的等效模型与精确模型的仿真误差小于1.2%,仿真时间缩短了80%。可见所提的大功率链式STATCOM电磁暂态快速等效建模和误差评估方法,可以在精度允许范围内大幅降低仿真时间并精确评估模型,具有较强的科学和工程应用价值。     

Surge analysis of the tank of a gas-insulated line using lumped constant circuits

Surge voltages evaluated by a digital analysis method, for example, electromagnetic transients program (EMTP) and by an analog analysis method (transient network analyzer: TNA) are compared with experimental results on a scaled model of a gas insulated line. From the results, it is confirmed that the analog analysis method has a satisfactory accuracy and its computing speed is quite high. The error caused by the lumped element modeling of the gas insulated line is comparatively small, and the line is not necessary to be treated as a distributed parameter line. The lumped element model is advantageous to understand the mechanism of the transient characteristic of the induced transient voltage. A simple equivalent circuit of the gas insulated line is proposed and its accuracy is confirmed by a comparison with the calculated result obtained by an accurate line method. The transient overvoltages of the tank and across the insulated flange can be analytically calculated using the equivalent model.     

Coupling capacitor voltage transformer: A model for electromagnetic transient studies

In this work, an accurate coupling capacitor voltage transformer (CCVT) model for electromagnetic transient studies is presented. The model takes into account linear and nonlinear elements. A support routine was developed to compute the linear 230 kV CCVT parameters (resistances, inductances and capacitances) from frequency response data. The magnetic core and surge arrester nonlinear characteristics were estimated from laboratory measurements as well. The model is used in connection with the electromagnetic transients program (EMTP) to predict the CCVT performance when it is submitted to transient overvoltages, as are the cases of voltages due to the ferroresonance phenomenon and circuit breaker switching. The difference between simulated and measured results is fairly small. Simulations had shown that transient overvoltages produced inside the CCVT, when a short circuit is cleared at the CCVT secondary side, are effectively damped out by the ferroresonance suppression circuit and the protection circuit.     

Measurement of hybrid-π equivalent circuit parameters of bipolarjunction transistors in undergraduate laboratories

In this paper we report on a simple and accurate technique for the measurement of the small-signal y-parameters of a bipolar transistor at a given DC bias using a standard LCR meter which is readily available in undergraduate electronics laboratories. We demonstrate how the hybrid-π equivalent circuit of the transistor can be extracted from the measurement using a spreadsheet. Practical results are presented and the accuracy of the extracted hybrid-π parameters is checked by comparison between PSPICE simulation and actual measurement of the frequency response of a common-emitter amplifier built with the transistor in question     

A new analytical/iterative approach to statistical delay characterization of cmos digital combinational circuits

This paper is believed to be one of the first attempts to statistically characterize signal delays of basic CMOS digital building blocks. Analytic expressions in terms of the transistor geometries and technological process variations are provided for fast delay computations, to be used for manufacturing yield optimization, delay variability reduction and general VLSI circuit design for quality. the proposed approach is novel in several ways: (1) It is a combination of an accurate, semi-empirical MOS transistor model with the use of an efficient interpolation technique to link the non-physical model parameters to the ‘designable’ and ‘noise’ factors. (2) It uses several newly developed analytical delay formulae where possible and simple iterative solutions where direct analytical solutions do not exist. (3) the resulting hybrid analytical/iterative models are tuned, if necessary, to enhance the overall statistical accuracy. (4) Local delays are combined together for the analysis of complex combinational VLSI circuits. (5) C-code is generated for specific delay paths to further increase efficiency (improvement in analysis times by two to four orders of magnitude with respect to SPICE, with about 5%-10% accuracy). Examples of statistical delay characterization are used to illustrate the high accuracy of the proposed approach in modelling the influence of the ‘noise’ parameters on circuit delay relative to direct SPICE-based Monte Carlo analysis. the important impact of the proposed approach is that statistical evaluation and optimization of delays in much larger VLSI circuits will become possible.