Realizations of mutative 4-ports and their applications to memstor simulations

In this paper, in addition to the universal 4-port mutator circuit introduced earlier with an adder and a subtractor block, two more 4-port mutator circuits, one with plus type (CCII+) and minus type current conveyors (CCII?), the other with a plus type current conveyor (CCII+) and one minus type current follower (CF?) are presented, their port relation matrix and their realization of different memstors are tabulated. How the transfer characteristics of the ideal mutative 4-ports with respect to frequency hold is verified using their transistor level simulations. By terminating properly two ports of the mutative 4-port simulations of a memristor with three different mutators, of a meminductor and of a memcapacitor are presented and compared also with some mutators existing in the literature.     

两种相位抵消法消侧音原理及其电路形式

为帮助正确理解及运用常见的消侧音电路,分别讨论了加法和减法电路实现的相位抵消法消侧音原理。几种典型电路均用到运算放大器。为直观认识每种电路的特点,估算了接收方获得信号和发送方输出信号的比值（电压比）,每种电路均经TINA-TI软件仿真和实际电路验证,估算值和仿真、验证结果一致。这些消侧音原理和电路可应用在楼宇对讲、无线对讲等场合。最后,分享了一些设计和制作消侧音电路的经验。     

Synthesis of Broad-Band 3-dB Hybrids Based on the 2-Way Power Divider

The synthesis of broad-band 2-way Wilkinson hybrids is well known. The even- and odd-mode analysis results in two equivalent circuits where the synthesis of the odd mode is done by computer optimization. This paper shows an exact synthesis of 2-way Wilkinson power dividers having one isolation resistor, but an arbitrary number of quarter-wave transformers. A large number of circuits have been synthesized with up to 6 quarter-wave transformers. The 2-way Wilkinson hybrid can be extended to a 4-port component. This 4-port component can operate as a 180° or 90° 3-dB hybrid depending on the input port. The hybrid has a high directivity independent of frequency when used as a 180° hybrid. Experimental results are given for a 2-way divider and a 3-dB hybrid built in microstrip with a center frequency of 5 GHz.     

Memstor,memstance simulations via a versatile 4-port built with new adder and subtractor circuits

In this paper, novel voltage-mode (VM) n-channel metal-oxide semiconductor (NMOS) transistor-based analogue adder and subtractor circuits, which, respectively, perform V₁+V₂ and V₁?V₂ operations, are presented. The most important feature of the proposed circuits is their extremely simple structures containing only six NMOS transistors. Further, the presented adder and subtractor circuits have high input and low output impedances, resulting in easy cascadability. The post-layout simulations of the proposed circuits have been executed using TSMC 0.25 µm process parameters with ±1.25 V. The area of the suggested circuits is approximately 30 × 13 µm². Moreover, the topology of a generalised mutator, a versatile 4-port built with an adder and a subtractor, which acts as an ordinary mutator when properly reduced to a 2-port, is offered. A table for simulating lossless inductance, memristor, meminductor, memcapacitor and other elements under suitable termination of the 4-port is given, and three of these elements’ simulations with SPICE are also presented.     

Pathological realizations of the DCVC (CDBA) and applications to oscillators and filters

The historical origin of the introduction of the differential current voltage conveyor (DCVC) also known as the current differencing buffered amplifier (CDBA) is reviewed. Pathological realizations of the modified differential current conveyor (MDCC) and of the DCVC are given. Generation of alternative equivalent oscillator and filter circuits using voltage followers (VF), current followers (CF), voltage inverters (VI) and current inverters (CI) from known CDBA oscillators and filters is demonstrated by several examples. It is found that there is duplication in some of the recently published circuits and new simplified oscillator and filter circuits are reported.     

Realizations of Grounded Negative Capacitance Using CFOAs

The paper presents new realizations of grounded negative capacitance, using current feedback operational amplifiers (CFOAs), two resistors and one capacitor. All the proposed realizations are canonic in the number of passive components and do not require any critical component matching condition. Application examples in capacitive cancellation schemes and resistance-controlled low-frequency quadrature sinusoidal oscillator design are provided. The workability of the circuits has been verified by PSPICE simulations.     

Equivalent Transformations for Mixed-Lumped and Multiconductor Coupled Circuits

Distributed circuits consisting of a cascade connection of m -port stab circuits and multiconductor coupled transmission lines are equivalent to ones consisting of cascade connections of multiconductor coupled transmission lines whose characteristic impedances are different from original ones, m-port stub circuits, and an m-port ideal transformer bank. Because of the reciprocity of the circuit, values of transformer ratio must be identified. In the special case of a one conductor transmission line, these equivalent transformations are equivalent to Kuroda's identities. These extended equivalent transformations may be applied to mixed-lumped and multiconductor coupled circuits. By using these equivalent transformations, equivalent circuits and exact network functions of multiconductor nonuniform coupled transmission lines can be obtained.     

Frequency Response of Quarter-Wave Coupled Reciprocal Stripline Junctions

The frequency response of quarter-wave coupled reciprocal 3-port symmetrical junctions for which the reference eigennetwork appears as a short circuit at the reference terminals is presented. The equivalent circuit of such reciprocal junctions is constructed in terms of the reciprocal parts of the split admittance eigenvalues of the ideal 3-port circulator. Since the two circuits are related, the element values selected for the matching networks are the ones which apply to an ideal circulator with an overall Chebyshev response. This is done for n=1, 2, and 3. An important conclusion of this paper is that the design of wideband circulators is closely related to the design of wideband reciprocal 3-port junctions. The paper includes experimental results obtained on a stripline device in its magnetized and demagnetized states.     

A nonreciprocal tunable waveguide directional filter using aturnstile open gyromagnetic resonator

The 4-port waveguide directional filter is a classic network in microwave engineering. The purpose of this paper is to describe one gyromagnetic version using an open gyromagnetic resonator in a dielectric-filled cavity. A property of the circuit is that it behaves as a 4-port circulator with one direction of circulation at one split frequency of the resonator and with the other direction for the other split frequency. An insertion loss between the coupled ports below 1.50 dB and an attenuation or isolation of typically 15 dB between the decoupled ports over most of the tuning range of the filter have been achieved. Its 3-dB bandwidth is typically 65 MHz. A typical tuning range of more than 1 GHz centered at about 10.5 GHz has been separately realized for each split branch     

FEN filter design using tantalum and silicon integrated circuits

An economical approach to integrated active RC filter design is described. Complex filter networks are broken down into a series of cascadable second-order filter sections consisting of tantalum thin-film RC networks and semiconductor integrated operational amplifiers. Two building blocks are available for any desired frequency within a decade and for any desired filter function (e.g., low-pass, high-pass, band-pass, band-reject, all-pass, etc.). One building block is for low Q realizations and contains one amplifier; the other is for high Q realizations and contains two. The considerable versatility of this approach is obtained by 1) a network synthesis approach based on decomposing a given second-order function into a low Q asymptotic approximation of this function in cascade with an active frequency emphasizing network and 2) by the characteristics of tantalum and silicon integrated circuits.     

Design of ternary CMOS circuits based on transmission function theory

This paper presents threshold comparison operation, transmission operation and union operation which can be used to describe the function of MOS transistors in a pass-transistor network. The relative properties and circuit realizations of these operations, and the transmission function expression by use of these operations are discussed. A transmission function theory suitable to CMOS network synthesis is proposed. This paper also discusses the simplification of ternary functions and proposes minimized design of some basic ternary CMOS circuits. The computer simulation using SPICE2G5 has confirmed that these circuits have desirable DC transfer characteristics.     

多电平逆变器直流侧电压平衡控制策略综述

针对这种在输出有功功率时直流侧电容电压不平衡的问题,介绍了用于二极管箝位五电平逆变器的四种基于电容的辅助稳压电路：基于单级电容的辅助稳压电路、通用直流辅助稳压电路、单电容辅助稳压电路和简化的单电容辅助稳压电路,和三种基于电感的辅助稳压电路,详细说明了每一种电路的电路结构、脉冲宽度调制控制策略以及工作原理,并通过MatIab／Simuljnk仿真验证了控制结果。     

Synthesis of new nonlinear network elements

The basic problem of synthesizing a nonlinear resistor, inductor, or capacitor with a prescribed i-v, φ-i, or q-v curve is solved by introducing three new linear two-port network elements, namely the mutator, the reflector, and the scalor. The mutator has the property that a nonlinear resistor is transformed into a nonlinear inductor, or a nonlinear capacitor, upon connecting this resistor across port two of an appropriate mutator. The reflector has the property that a given i-v, φ-i, or q-v curve can be reflected about an arbitrary straight line through the origin. The scalor is characterized by the property that any i-v, φ-i, or q-v curve can be compressed or expanded along a horizontal direction, or along a vertical direction. Using these new elements as building blocks, it is shown that any prescribed single-valued (which need not be monotonic) i-v, φ-i, or q-v curve can be synthesized. Active circuit realizations for each of these new elements are given. Laboratory models of mutators, reflectors, and scalors have been built using discrete components. Oscilloscope tracings of typical mutated, reflected, and scaled i-v, φ-i, and q-v curves are given. The experimental results are in good agreement with theory at relatively low operating frequencies. The practical problems that remain to be solved are the stability and frequency limitation of the present circuits.     

Matching Considerations of Lossless Reciprocal 5-Port Waveguide Junctions (Short Papers)

Some of the restrictions imposed on general 5-port junctions (or networks) by losslessness and reciprocity are discussed as well as considerations of restrictions due to physical symmetry. It is proven that if a lossless reciprocal 5-port junction (or network) is completely matched, then all off-diagonal elements of the scattering matrix are nonzero; i.e., if the junction is matched, no port is decoupled from any of the others. It is also shown that all off-diagonal scattering coefficients of a lossless reciprocal 5-port junction (or network) have a magnitude of one half if and only if the junction is completely matched. Those physical symmetries which preclude complete matching of 5-port junctions are given and a general theorem concerning the matching of junctions and physical symmetry is proven.     

Fully-differential current-mode higher order filters using all grounded passive elements

In this paper the realization of nth order (n ≥ 3) fully-differential current-mode filters using Current Differencing Current Conveyors (CDCC) has been presented which results in circuits employing all grounded passive elements. In contrast to earlier known realizations of fully-differential filters which invariably require more than one capacitors per pole, the proposed realization employs only one capacitor per pole. The cut-off frequency of the realized filter can be electronically tuned when all the grounded resistors associated with the integrators are implemented by identical CMOS grounded voltage-controlled-resistors (VCR) driven by a common control voltage. The methodology has been illustrated by realizing a fifth order Butterworth filter as a specific example whose workability has been verified using SPICE simulations in 0.18 µm TSMC technology. A reduced-component-version of the designed fifth order Butterworth filter has also been presented which also employs all grounded RC components but does not have electronic-tunability. Some representative simulation results have been included.     

NAM expansion method for systematic synthesis of OTA-based floating gyrators

This paper presents a NAM expansion method for systematically synthesizing OTA-based floating gyrators. After describing nullor-mirror components of OTAs, class I, II and III gyrators, which can be built with standard OTAs, are synthesized by using the nullor-mirror equivalent models described by NAM. The class-I gyrators employing two DO-OTAs have four equivalent realizations, the class-II gyrators employing three SO-OTAs have eight equivalent realizations, and the class-III gyrators employing four SISO-OTAs have 16 equivalent realizations. Having used canonic number of components, the circuits are easy to be integrated and their parameters can be tuned electronically through tuning bias currents of OTAs. Finally, as an example, the MULTISIM simulation results of a notch filter constructed by the OTA-based III gyrator are presented to verify the realizability of the derived circuits.     

Optimized design of unique miniaturized planar baluns for wireless applications

The high frequency balun network has proven to be an important component in the design of certain RF and microwave system topologies-especially in wireless communications system architectures. This work describes the optimized design of planar balun circuits which operate in the 900 MHz wireless frequency band. The designs are an outgrowth of extensive in-depth computer analysis and fabrication and testing of a multiplicity of circuit realizations. A novel feature of these designs is their compact size which is almost one sixteenth that of conventional quarter wavelength-coupled line designs. Size reduction and excellent coupling are effectively obtained by novel use of discrete capacitors.     

A Simplified Calibration Methodology for On-Chip Couplers

In this paper, we propose a simplified calibration methodology for on-chip couplers to de-embed the unwanted but unavoidable parasitics introduced by the probing pads as well as the effects originating from redundant feeding lines. The traditional TRL (Thru, Reflect, Line) calibration technique for single-ended two-port device is extended and applied to symmetrical 4-port devices that can be decomposed as the odd- and even-mode equivalent circuits. Accordingly, the TRL calibration standards in the balanced format are designed as well. As a final step, single-ended 4-port S-parameters of device under test (DUT) are reconstructed through its de-embedded odd- and even-mode 2-port S-parameters. To validate the efficacy of our proposed calibration methodology in extracting S-parameters of DUT, models in HFSS, such as a branch-line coupler and a coupled-line coupler with probing pads, and balanced TRL calibration standards are generated. After performing the de-embedding procedures proposed in this paper, the extracted S-parameters agree well with the simulated S-parameters of DUT without adding any pads and feeding lines for measurement.     

Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes

Low-density parity-check convolutional codes (LDPC-CCs) complement their popular block-oriented counterparts and may be more suitable in certain communication applications. These include streaming voice, video, and packet switching networks. In order to use these codes efficiently we must generate termination sequences similar to those used in conventional convolutional codes. In this paper, we present a construction method for termination sequence generation circuits suitable for field-programmable gate arrays and application-specific integrated circuits. This method uses linear algebra to determine the termination sequence for a small number of states of the encoder and converts these solutions into a sequential circuit. Results are presented for several realizations of termination circuits for a (128,3,6) LDPC-CC.     

Balancing networks for symmetric antennas: part II-practical implementation and modeling

The practical aspects of implementing the three fundamental types of balancing networks presented in the first part of this paper, using a 180/spl deg/ 4-port hybrid network are investigated. It is shown, for the first time, that the use of attenuators between the hybrid and the antenna detracts from the ability of the balanced-to-unbalanced network (balun) to balance any of the three quantities: current, voltage, or forward power. It is shown that additional time delay or linear phase shift, even when made equal for each port, makes the implementation of a current or voltage balun difficult over a broad frequency range although narrowband operation is still possible. Thus, the placement of phase-matched coaxial lines between the balun and the antenna is not desirable. It is shown that the equal-delay hybrid is uniquely adapted for the realization of a voltage or current balun. Finally, the modeling of symmetric antennas as driven by each fundamental type of balun is presented.