针对AES加密算法的时序驱动Cache攻击研究

时序驱动Cache攻击是指通过分析处理器中加密算法的不同执行时间来恢复密钥,从而实现对密码系统的攻击.文章针对AES加密算法进行时序驱动Cache攻击分析:首先介绍了Cache结构和信息泄露原理,指明对算法执行过程中泄露信息的利用,描述了AES算法,对基于碰撞的时序驱动Cache攻击和基于模板的时序驱动Cache攻击进...     

针对AES和CLEFIA的改进Cache踪迹驱动攻击

通过分析"Cache失效"踪迹信息和S盒在Cache中不对齐分布特性,提出了一种改进的AES和CLEFIA踪迹驱动攻击方法。现有攻击大都假定S盒在Cache中对齐分布,针对AES和CLEFIA的第1轮踪迹驱动攻击均不能在有限搜索复杂度内获取第1轮扩展密钥。研究表明,在大多数情况下,S盒在Cache中的分布是不对齐的,通过采集加密中的"Cache失效"踪迹信息,200和50个样本分别经AES第1轮和最后1轮分析可将128bit AES主密钥搜索空间降低到216和1,80个样本经CLEFIA第1轮分析可将128bit CLEFIA第1轮扩展密钥搜索空间降低到216,220个样本经前3轮分析可将128bit CLEFIA主密钥搜索空间降低到216,耗时不超过1s。     

基于AES密码芯片的DPA攻击技术分析

关于AES密码芯片相应的DPA攻击技术实现方法,而且基于Atmel—AES平台应用DPA攻击技术可以分析获得AES相应的密钥,从而能够证明AES算法对于DPA攻击时体现出来的薄弱环节,同时也可以证明对AES芯片抵抗DPA攻击进行相关研究的必要性。     

基于微控制器的AES激光注入攻击研究

密码设备面临故障攻击的威胁,针对密码芯片的故障攻击手段研究是密码学和硬件安全领域的重要研究方向.脉冲激光具有较好的时空分辨性,是一种准确度较高的故障攻击手段.该文详细描述了激光注入攻击的原理和方法,以集成AES-128算法的微控制器(MCU)为例实施了激光注入攻击实验.实验以微控制器的SRAM为攻击目标,分别成功实现了差分故障攻击和子密钥编排攻击,恢复了其16 Byte的完整密钥,其中后一种攻击是目前首次以激光的手段实现.研究表明,激光注入攻击能准确定位关键数据存放的物理位置,并能在任意的操作中引入错误,实现单比特的数据翻转,满足故障攻击模型的需求.激光注入攻击能在较短时间内完成自动攻击和密文收集,攻击过程贴近真实场景,对密码芯片具有极大的威胁.     

基于微控制器的AES激光注入攻击研究

密码设备面临故障攻击的威胁,针对密码芯片的故障攻击手段研究是密码学和硬件安全领域的重要研究方向。脉冲激光具有较好的时空分辨性,是一种准确度较高的故障攻击手段。该文详细描述了激光注入攻击的原理和方法,以集成AES-128算法的微控制器(MCU)为例实施了激光注入攻击实验。实验以微控制器的SRAM为攻击目标,分别成功实现了...     

基于深度残差神经网络的AES密码芯片电磁攻击研究

基于分而治之方法提出了一种在完全未知明文、密文及泄露中间值情况下的电磁泄漏攻击方法.设计深度残差神经网络模型,对基于现场可编程逻辑门阵列（field programmable gate array,FPGA）的密码芯片高级加密标准（advanced encryption standard,AES）加密算法进行了电磁分析攻击.该模型包括数据扩展层和深度残差层两部分.数据扩展层将一维电磁信号数据扩展到二维,有效降低了模型的训练难度;深度残差层是基于残差块的深度神经网络,有效解决了深层网络的收敛难、调优难等问题.在明文和密文完全未知的情况下,仅仅通过采集到的电磁泄漏信号,利用该模型对密钥的最后两位进行了恢复实验,实验结果表明准确率达到了91.8%.在同等条件下,该模型的准确度比支持向量机（support vector machine,SVM）模型提升了近8%.     

基于攻击效用的复合攻击预测算法

网络攻击以复合攻击形式为主,但当前的安全设备只能检测无法预测,针对这个问题,提出了一种基于攻击效用的复合攻击预测方法,通过该方法识别攻击者的最终意图,预测攻击者下一步可能进行的攻击行为.该方法利用攻击意图描述复合攻击过程,建立了基于攻击意图的复合攻击逻辑关系图,并引入攻击效用的概念,表示入侵者在攻击过程中完成每步攻击所获得的收益的大小,是复合攻击预测的重要参考.最后,通过实验验证了该方法的有效性.     

AES加密设备的差分能量攻击原理与仿真

旁路攻击是目前信息安全技术领域一个备受瞩目的热点,绕过传统的密码分析方法,利用加密解密设备在进行数据处理时泄露出来的信息比,如运行时间、功耗等对密码系统进行分析和攻击.而DPA（differential power analysis）攻击是较为常见的一种旁路攻击.文中对DPA攻击和AES加密算法进行简单介绍,并在此基础上进行标准DPA攻击的仿真,为能量攻击分析提供一定的理论依据和实验数据.     

基于攻击树的自动攻击模型研究

文章首先介绍了攻击树的概念,对拒绝服务攻击进行了攻击树建模,在攻击树理论的基础上,提出了一种自动攻击模型。     

针对SMS4密码算法的Cache计时攻击

分别提出并讨论了针对SMS4加密前4轮和最后4轮的访问驱动Cache计时分析方法,设计间谍进程在不干扰SMS4加密前提下采集加密前4轮和最后4轮查表不可能访问Cache组集合信息并转化为索引值,然后结合明文或密文对密钥的不可能值进行排除分析,最终恢复SMS4初始密钥.实验结果表明多进程共享Cache存储器空间方式和SMS4查找表结构决定其易遭受Cache计时攻击威胁,前4轮和最后4轮攻击均在80个样本左右恢复128bit SMS4完整密钥,应采取一定的措施防御该类攻击.     

AES硬件实现的能量分析攻击仿真

首先针对高级加密标准（AES）算法的硬件实现，给出了攻击时刻的汉明能耗模型；然后在行为级进行了基于寄存器数据变化的PA攻击；进一步通过对门级电路的功耗仿真，实现了能耗曲线数据的PA攻击。     

一种新的简化AES中间相遇攻击方法

A new 5-round distinguisher of AES with key whitening is presented by using the properties of its round transformation. Based on this distinguisher, we present new meet-inthe-middle attacks on reduced AES considering the key schedule and the time-memory tradeoff approach. New attacks improve the best known meet-in-the-middle attacks on reduced AES presented at FSE2008.We reduce the time complexity of attacks on 7-round AES-192 and 8-round AES-256 by a factor of at least 28. Moreover, the distinguisher can be exploited to develop the attack on 8-round AES-192.     

The research of DPA attacks against AES implementations

This article examines vulnerabilities to power analysis attacks between software and hardware implementations of cryptographic algorithms. Representative platforms including an Atmel 89S8252 8-bit processor and a 0.25 um 1.8 v standard cell circuit are proposed to implement the advance encryption standard （AES）. A simulation-based experimental environment is built to acquire power data, and single-bit differential power analysis （DPA）, and multi-bit DPA and correlation power analysis （CPA） attacks are conducted on two implementations respectively. The experimental results show that the hardware implementation has less data-dependent power leakages to resist power attacks. Furthermore, an improved DPA approach is proposed. It adopts hamming distance of intermediate results as power model and arranges plaintext inputs to differentiate power traces to the maximal probability. Compared with the original power attacks, our improved DPA performs a successful attack on AES hardware implementations with acceptable power measurements and fewer computations.     

GPON中的AES加密

文章简单的介绍了GPON的体系结构与下行帧的结构,并着重介绍了AES加密的流程、方法与具体算法,最后对GPON中的AES加密、解密方法及AES计数器模式在GPON中的使用进行了详细的介绍。     

AES安全性及其影响研究

AES是美国政府制定的先进的加密标准,论文分析了它是如何加解密的,以及其安全性和发展前景如何。     

IPSec AES在WLAN网络安全中的研究及其实现

分析了无线局域网安全现状,提出了在IP层引入IPSec机制到无线局域网终端的方案,实现了IPSec AES128、192和256bit3种不同长度的密钥算法,增强了无线局域网络安全性能,丰富了无线局域网络安全内容。     

Multi-point joint power analysis attack against AES

For the power analysis attack of the AES cryptographic algorithm with the single information leakage point,the traditional attack method does not use as much information as possible in the algorithm and power trace.So there are some problems such as required more power traces,the low utilization rate of information and so on.A novel method of muti-point joint power analysis attack against AES was proposed to solve the problems.And taking the correlation power analysis attack as an example,the detailed attack process was presented.The operations of the round key addition and the SubBytes were chosen as the attack intermediate variable at the same time.Then the joint power leakage function was con-structed for the attack intermediate variable.And the multi-point joint correlation energy analysis attack was given.Aiming at the AES cryptographic algorithm implemented on the smart card,the multi-point joint power analysis attack,the correlation power analysis attack with the single information leakage point in the key addition and the SubBytes were conducted.The measured results validate the proposed method is effective.It also shows that the proposed method has the advantages of high success rate and less power traces comparing with the single information leakage point.     

AES加密算法的一种优化的FPGA实现方法

介绍AES算法的原理并阐述了明文分组和密钥长度都是128 b的情况下基于FPGA的设计和实现。结合算法和FPGA的特点,采用查表法优化处理了字节代换运算、列混合运算和密钥扩展运算。同时,为了提高系统工作速度,在设计中应用了流水线技术,但由于流水线结构不能用于反馈模式,因此,实现时使用的是电码本模式(ECB)的工作方式。利用QuartusⅡ开发工具给出仿真结果,时钟频率达70.34 MHz。最后做了应用分析。     

RESEARCH ON THE EVAPORATION PROPERTY OF IMPREGNATED DISPENSER CATHODE BY AES

During the activation and ageing,the evaporation components and rates from 4.56:1.44:2impregnated dispenser cathode have been determined by the vapor-collect method based on the Augerelectron spectroscopy(AES).(1)The evaporation rate of a cathode after ageing differs from that of a justactivated cathode by a factor of 5 to 10.The evaporation energy of the former is 4.58 eV,and that of the latter is4.34 eV.(2)At operating temperature,the metallic barium in the evaporated materials is about 90%,and thebarium oxide is about 9.3%.(3)Blow 1000℃ the evaporation of Ca is not significant;over 1150℃ the Ca startsevaporating rapidly,particularly in the activation process,it may approach 3.5% at 1250℃.