Study of Ni/Si(1 0 0) solid-state reaction with Y addition

The characteristics of Ni/Si(1 0 0) solid-state reaction with yttrium (Y) addition are studied in this paper. Film stacks of Ti(20 nm)/TiN(40 nm)/Ni(8 nm)/Y(4 nm)/Ni(8 nm)/Si(1 0 0) and Ti(20 nm)/TiN(40 nm)/Ni(7 nm)/Y(6 nm)/Ni(7 nm)/Si(1 0 0) were prepared by physical vapor deposition. After solid-state reaction between metal films and Si was performed by rapid thermal annealing, various material analyses show that NiSi forms even with the addition of Y, and Ni silicidation is accompanied with Y diffusion in Ni film toward its top surface. The electrical characteristic measurements reveal that no significant Schottky barrier height modulation with the addition of Y occurs.     

Crystalline orientation dependence of electrical properties of Mn Germanide/Ge(1 1 1) and (0 0 1) Schottky contacts

We have investigated the crystalline orientation dependence of the electrical properties of Mn germanide/Ge(1 1 1) and (0 0 1) Schottky contacts. We prepared epitaxial and polycrystalline Mn₅Ge₃ layers on Ge(1 1 1) and (0 0 1) substrates, respectively. The Schottky barrier height (SBH) estimated from the current density-voltage characteristics for epitaxial Mn₅Ge₃/Ge(1 1 1) is as low as 0.30 eV, while the SBH of polycrystalline Mn₅Ge₃/Ge(0 0 1) is higher than 0.56 eV. On the other hand, the SBH estimated from capacitance-voltage characteristics are higher than 0.6 eV for both samples. The difference of these SBHs can be explained by the local carrier conduction through the small area with the low SBH regions in the epitaxial Mn₅Ge₃/Ge(1 1 1) contact. This result suggests the possibility that the lowering SBH takes place due to Fermi level depinning in epitaxial germanide/Ge(1 1 1) contacts.     

The effect of pulsed laser annealing on the nickel silicide formation

The pulsed laser annealing (PLA) is used to assist nickel silicide transformation for Schottky barrier height reduction and tensile strain enhancement and the effect of different laser power are investigated. In this report, a two-step annealing process which combine the conventional rapid thermal annealing with pulsed laser annealing is proposed to achieve a smooth silicon-rich NiSi_x interfacial layer on (1 0 0) silicon. With optimized laser energy, a 0.2 eV Schottky barrier height (SBH) modulation is observed from Schottky diode electrical characterization. Furthermore, PLA provides sufficient effective temperature during silicidation which also lead to increased tensile stress of silicide film than the two-step RTA silicide is also investigated. The SBH modulation and tensile stress enhancement benefits of PLA silicidation are considered as an alternative to the conventional rapid thermal annealing for ultra-scaled devices performance enhancement.     

Effective formation of interface controlled Y2O3 thin film on Si(1 0 0) in a metal-(ferroelectric)-insulator-semiconductor structure

Yttrium was deposited on the chemical oxide of Si and annealed under vacuum to control the interface for the formation of Y₂O₃ as an insulating barrier to construct a metal-ferroelectric-insulator-semiconductor structure. Two different pre-annealing temperatures of 600 and 700 °C were chosen to investigate the effect of the interface state formed after the pre-annealing step on the successive formation of Y₂O₃ insulator and Nd₂Ti₂O₇ (NTO) ferroelectric layer through annealing under an oxygen atmosphere at 800 °C. Pre-anneal treatments of Y-metal/chemical-SiO₂/Si at 600 and 700 °C induced a formation of Y₂O₃ and Y-silicate, respectively. The difference in the pre-anneal temperature induced almost no change in the electrical properties of the Y₂O₃/interface/Si system, but degraded properties were observed in the NTO/Y₂O₃/interface/Si system pre-annealed at 600 °C when compared with the sample pre-annealed at 700 °C. C-V characteristics of the NTO/Y₂O₃/Si structured system showed a clockwise direction of hysteresis, and this gap could be used as a memory window for a ferroelectric-gate. A smaller hysteric gap and electrical breakdown values were observed in the NTO/Y₂O₃/Si system pre-annealed at 600 °C, and this was due to an unintentional distribution of the applied field from the presence of an interfacial layer containing Y-silicate and SiO₂ phases.     

Structural and electrical properties of Er-doped HfO2 and of its interface with Ge (0 0 1)

Er-doped HfO₂ thin films with Er content ranging from 0% to 15% are deposited by atomic layer deposition on native oxide free Ge(001). The crystallographic phase is investigated by X-ray diffraction and is found to depend on the Er%. The cubic fluorite structure develops on Ge for Er% as low as 4% and is stable after annealing at 400 °C in N₂. Microstrain increases with increasing the Er content within the fluorite structure. Time of flight secondary ion mass and electron energy loss spectroscopy evidence a Ge diffusion from the substrate that results in the formation of a Ge-rich interfacial region which does not present a structural discontinuity with the oxide. The diffusion of Ge is enhanced by the annealing and causes a reordering of the crystal lattice. In annealed films the interface defect density measured by low temperature conductance measurements is found to decrease with decreasing the Er content.     

Comment on “Negative Schottky barrier between titanium and n-type Si(0 0 1) for low-resistance ohmic contacts”

It is shown in this letter that recently published statements [Solid-State Electron 2004;48(2):335] on negative Schottky barrier height between titanium and n-type Si(0 0 1) are not satisfactorily experimentally approved and may not be true. The rectification effect of the Schottky barrier is overshadowed by high series resistance which influences I–V characteristic already in reverse bias and disables to extract true Schottky barrier height from the characteristics in the bias range studied. On the basis of published data it is probably not possible to speak about negative Schottky barrier height.     

Studies of Ti- and Ni-germanide Schottky contacts on n-Ge(1 0 0) substrates

In this study, we investigated fabrication and characteristics of germanides Schottky contacts on germanium. Ti- and Ni-germanides were fabricated on n-Ge(1 0 0) substrates by sputtering metal Ti or Ni on Ge followed by a furnace annealing. The influence of annealing temperature on the electrical properties of Ti- and Ni-germanide on n-Ge(1 0 0) substrates was investigated. The low temperature ∼300 °C annealing helped to obtain the optimized Schottky contact characteristics in both Ti-germanide/Ge and Ni-germanide/Ge substrates contacts. The well-behaved Ti-germanides/n-Ge Schottky contact with 0.34 eV barrier height was obtained by using a 300 °C annealing process.     

NiSi contact metallization using electroless Ni deposition on Pd-activated self-assembled monolayer (SAM) on p-type Si(1 0 0)

In this paper we describe a method to form NiSi contacts using electroless plating of Nickel or Ni alloy on Pd activated self-assembled monolayer (SAM) on p-type Si(1 0 0). Such method allows uniform deposition of very thin, <30 nm, Ni or Ni alloy films. Clean, oxide free, Si substrate was covered with aminopropyltriethoxysilane (APTES) self-assembled monolayer. The surface was activated with Pd-citrate solution followed by electroless plating. The samples were annealed for 1 h in vacuum (∼10⁻⁶ Torr) forming the silicide layer. The annealing temperatures were 400 °C for NiP alloy and 500 °C for NiPW alloy. X-ray diffraction (XRD) measurement confirmed the presence of NiSi phase after annealing. The silicides material properties were characterized using secondary electron microscopy (SEM) analysis, X-ray diffraction (XRD) and X-ray photon spectroscopy (XPS) profiling. The results are reported and summarized.     

Growth and structural properties of crystalline LaAlO3 on Si (0 0 1)

Crystalline LaAlO₃ was grown by oxide molecular beam epitaxy (MBE) on Si (0 0 1) surfaces utilizing a 2 ML SrTiO₃ buffer layer. This SrTiO₃ buffer layer, also grown by oxide MBE, formed an abrupt interface with the silicon. No SiO₂ layer was detectable at the oxide-silicon interface when studied by cross-sectional transmission electron microscopy. The crystalline quality of the LaAlO₃ was assessed during and after growth by reflection high energy electron diffraction, indicating epitaxial growth with the LaAlO₃ unit cell rotated 45° relative to the silicon unit cell. X-ray diffraction indicates a (0 0 1) oriented single-crystalline LaAlO₃ film with a rocking curve of 0.15° and no secondary phases. The use of SrTiO₃ buffer layers on silicon allows perovskite oxides which otherwise would be incompatible with silicon to be integrated onto a silicon platform.     

Epitaxy of BaTiO3 thin film on Si(0 0 1) using a SrTiO3 buffer layer for non-volatile memory application

In this study we report the epitaxial growth of BaTiO₃ films on Si(0 0 1) substrate buffered by 5 nm-thick SrTiO₃ layer using both MBE and PLD techniques. The BaTiO₃ films demonstrate single crystalline, (0 0 1)-oriented texture and atomically flat surface on SrTiO₃/Si template. The electrical characterizations of the BaTiO₃ films using MFIS structures show that samples grown by MBE with limited oxygen pressure during the growth exhibit typical dielectric behavior despite post deposition annealing process employed. A ferroelectric BaTiO₃ layer is obtained using PLD method, which permits much higher oxygen pressure. The C-V curve shows a memory window of 0.75 V which thus enable BaTiO₃ possibly being applied to the non-volatile memory application.     

Study of deep level defect behavior in undoped n-InP (1 0 0) after rapid thermal annealing

The effects of rapid thermal annealing on deep level defects in the undoped n-type InP with Ru as Schottky contact metal have been characterized using deep level transient spectroscopy (DLTS). It is observed that the as-deposited sample exhibit two deep levels with activation energies of 0.66 and 0.89 eV. For the samples annealed at 300 °C and 400 °C, a deep level is identified with activation energies 0.89 and 0.70 eV, respectively below the conduction band. When the sample is annealed at 500 °C, three deep levels are observed with activation energies 0.25, 0.32 and 0.66 eV. Annealing of the sample at 300 °C, orders the lattice of as-grown material by suppressing the defect 0.66 eV (A1) which is found in the as-deposited sample. The trap concentration of the 0.89 eV deep levels is found to be increased with annealing temperature. The deep level 0.32 eV may be due to the lattice defect by thermal damage during rapid thermal annealing process such as vacancies, interstitials and its complexes, indicating the damage of the sample after annealing at 500 °C. The defects observed in all the samples are possibly due to the creation of phosphorous vacancy or phosphorous antisite.     

Nickel silicide formation on Si(100) and Poly-Si with a presilicide N2 + implantation

The key feature of this study is to incorporate N₂ ⁺ implant prior to Ni sputtering on the poly-Si gate and source/drain regions. The results show that the incorporation of the presilicide N₂ ⁺ implant is able to suppress agglomeration in the Ni silicide films up to 900°C and enhance the phase stability of NiSi on Si(100) up to 750°C. Stable and low sheet resistance was achieved on the silicided undoped poly-Si up to 700°C due to reduced layer inversion, which is driven by grain boundary energy and the surface energy of the poly-Si.     

A robust k ∼ 2.3 SiCOH low-k film formed by porogen removal with UV-cure

Aurora^®ELK films were fabricated by PE-CVD of a SiCOH matrix precursor and an organic porogen material. The porogen material is removed during a subsequent thermally assisted UV-cure step with a short wavelength UV-lamp (λ < 200 nm). This results in film thickness shrinkage of 13.2% and a robust low-k film with k-value ∼ 2.3, elastic modulus ∼5.0 GPa and intrinsic film stress ∼59 MPa. The microscopic film properties during UV-cure were evaluated by FT-IR. A decrease in the CH_x peak area is related to the porogen removal from the film resulting in a reduced dielectric constant. The decrease of the Si-CH₃ peak and increase in the SiO network area are associated to the network restructuring and increase in elastic modulus. The nature of the Si-H peaks which appear during UV-cure has to be investigated carefully to determine their impact on film reliability. The dielectric diffusion barrier can work as an UV absorption layer which reduces UV-curing of underlying layers and possible UV reflections on interfaces. The SiCN/A-SiCO diffusion barrier film properties during UV-cure show a decrease in k-value, increase in intrinsic film stress and a slight increase in leakage. More research is needed to evaluate the impact of porogen removal by UV-cure on BEOL integration.     

Surface properties restoration and passivation of high porosity ultra low-k dielectric (k ∼ 2.3) after direct-CMP

Surface hydrophilisation and effective k-value degradation have been reported in literature after direct-CMP of high porosity SiOC films (without a protective capping layer). In the sequel, attempts to restore ultra low-k (ULK) material initial properties after a standard CMP and post-CMP cleaning process are reported. Annealing treatment has shown to be valuable to remove residual organics and water absorbed at the ultra low-k material surface after direct-CMP. However, as the hydrophilicity of the polished surface remains unchanged, it does not prevent moisture uptake, leading to an increase in k-value with time. Therefore, in order to restore hydrophobic properties and to stabilize the surface in time, three silylating agents - containing chlorosilane reactive groups (-SiMe_nCl_3−n) as well as hydrophobic methyl functions (-CH₃) in their structure - have been employed in liquid, gas or dense CO₂ phases on the CMP-induced damaged ULK layers. While each of these organic treatments is efficient to restore hydrophobicity on post-CMP ULK surfaces, only one of them proved to be able to keep the k-value low (comparable to the ULK pristine k-value) and stable in time, without inducing significant change in porosity of the ULK material.     

Epitaxial growth of Dy2O3 thin films on epitaxial Dy-germanide films on Ge(0 0 1) substrates

Ultra-thin films of Dy are grown on Ge(0 0 1) substrates by molecular beam deposition near room temperature and immediately annealed for solid phase epitaxy at higher temperatures, leading to the formation of DyGe_x films. Thin films of Dy₂O₃ are grown on the DyGe_x film on Ge(0 0 1) substrates by molecular beam epitaxy. Streaky reflection high energy electron diffraction (RHEED) patterns reveal that epitaxial DyGe_x films grow on Ge(0 0 1) substrates with flat surfaces. X-ray diffraction (XRD) spectrum suggests the growth of an orthorhombic phase of DyGe_x films with (0 0 1) orientations. After the growth of Dy₂O₃ films, there is a change in RHEED patterns to spotty features, revealing the growth of 3D crystalline islands. XRD spectrum shows the presence of a cubic phase with (1 0 0) and (1 1 1) orientations. Atomic force microscopy image shows that the surface morphology of Dy₂O₃ films is smooth with a root mean square roughness of 10 Å.     

A study of self-aligned formation of C54 Ti(Si1−xGex)2 to P+ and N+ Si0.7Ge0.3 alloys using rapid thermal annealing

In this paper, solid state reactions of titanium with boron and phosphorus doped Si_0.7Ge_0.3 alloys have been investigated for application in a self-aligned germanosilicide process. Wet chemical etching of the germanosilicide with respect to unreacted Ti in a solution of 1:1:5 NH₄OH:H₂O₂:H₂O has been investigated. Characterization was performed using four-point probe sheet resistance measurements, x-ray diffraction, cross-sectional transmission electron microscopy, Nomarski optical imaging, and scanning electron microscopy. The C54 Ti(Si_1−yGe_y)₂ phase was observed to form for reactions on both boron and phosphorus doped Si_0.7Ge_0.3 alloys. Grain structures of the C54 phases were found to be similar to grain structures of intrinsic alloy reactions with lateral grain dimensions on the order of 0.3 Μm. Resistivities of 22 ΜΩ-cm have been determined for the boron and phosphorus reactions. Although the germanosilicide phases were observed to etch slowly in 1:1:5 NH₄OH:H₂O₂:H₂O, which is conventionally used in the self-aligned titanium silicide process, the much higher etch rate of titanium nitride compounds and unreacted Ti provided for a self-aligned germanosilicide process. A first anneal in a nitrogen ambient was found to be necessary to eliminate lateral silicidation over surrounding oxide during self-aligned germanosilicide formation.     

Influence of AlN buffer layer thickness on the properties of GaN epilayer on Si(1 1 1) by MOCVD

The effect of thickness of the high-temperature (HT) AlN buffer layer on the properties of GaN grown on Si(1 1 1) has been investigated. Optical microscopy (OM), atomic force microscopy (AFM) and X-ray diffraction (XRD) are employed to characterize these samples grown by metal-organic chemical vapor deposition (MOCVD). The results demonstrate that the morphology and crystalline properties of the GaN epilayer strongly depend on the thickness of HT AlN buffer layer, and the optimized thickness of the HT AlN buffer layer is about 110 nm. Together with the low-temperature (LT) AlN interlayer, high-quality GaN epilayer with low crack density can be obtained.     

Direct measurement of interfacial structure in epitaxial Gd2O3 on GaAs (0 0 1) using scanning tunneling microscopy

The epitaxial growth of Gd₂O₃ on GaAs (0 0 1) has given a low interfacial density of states, resulting in the demonstration of the first inversion-channel GaAs metal-oxide-semiconductor field-effect transistor. Motivated by the significance of this discovery, in this work, cross-sectional scanning tunneling microscopy is employed herein to obtain precise structural and electronic information on these epitaxial films and interfaces. At the interface, the interfacial stacking of Gd₂O₃ films is directly correlated with the stacking sequence of the substrate GaAs. Additionally, from the local electronic states across the gate oxides, the spatial extent of the GaAs wavefunctions into the oxide dielectric may suggest a minimum Gd₂O₃ thickness to be of bulk properties.     

碳注入对 Ni0.95(Pt0.05)Si热稳定性影响探究

在两步快速热退火硅化之前,对硅衬底进行不同剂量的碳注入,以此探究碳对Ni0.95(Pt0.05)Si薄膜热稳定性的影响。与没有碳注入的比起来,1e15 cm-2和3e15 cm-2碳剂量注入得到的Ni0.95(Pt0.05)Si薄膜热稳定性分别被改善了100 oC和150 oC。通过方块电阻测量,XRD物相分析和SEM图像对比发现,沉淀在Ni0.95(Pt0.05)Si晶界处和Ni0.95(Pt0.05)Si/Si的界面处的碳原子是Ni0.95(Pt0.05)Si薄膜热稳定性提高的原因,而且碳的注入还在一定程度上改变了硅化反应中NiSi晶粒生长的择优取向。这些发现对Ni0.95(Pt0.05)Si:C材料的应用都将很有意义。     

Formation speed of atomically flat surface on Si (1 0 0) in ultra-pure argon

The flattening speed of the low temperature atomically flattening technology is evaluated in order to apply atomically flat surface of (1 0 0) orientation on large-diameter silicon wafers to the LSI manufacturing. The atomically flatness of the whole surface of wafers with the diameter of 200 mm can be obtained after annealing at 800 °C or above. The process time required to obtain the atomically flatness for the whole wafer surface can be shortened by increasing the annealing temperature as well as by increasing the gas flow rate. With the off angle of 0.50° or below, it was found that only mono-atomic steps appear on the surfaces and the flattening speed is independent of the off angle. These indicate that the process speed is independent of the migration speed of Si atoms on the surface, but depends on the gas replacement efficiency near the Si surface in this technique.