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1.
This work presents a general analysis framework for control loop design of two-stage converters. The results yield a thorough explanation of various loop design approaches. A three-loop method to extend the system bandwidth is proposed. The new control design algorithm is applied to a 48 V/3.3 V two-stage converter. Experiments verify the effectiveness of the control loop design approach.  相似文献   

2.
3.
Design issues for monolithic DC-DC converters   总被引:3,自引:0,他引:3  
This paper presents various ideas for integrating different components of dc-dc converter on to a silicon chip. These converters are intended to process power levels up to 0.5W. Techniques for integrating capacitors and design issues for MOS transistors are discussed. The most complicated design issue involves inductors. Expressions for trace resistance and inductance estimation of on-chip planar spiral inductor on top metal layer of CMOS process are compared. These inductors have high series resistance due to low metal trace thickness, capacitive coupling with substrate and other metal traces, and eddy current loss. As an alternative, a CMOS compatible three-dimensional (3-D) surface micromachining technology known as plastic deformation magnetic assembly (PDMA) is used to fabricate high quality inductors with small footprints. Experimental results from a monolithic buck converter using this PDMA inductor are presented. A major conclusion of this work is that the 3-D "post-process" technology is more viable than traditional integrated circuit assembly methods for realizing of micro-power converters.  相似文献   

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5.
Active-clamp snubbers for isolated half-bridge DC-DC converters   总被引:1,自引:0,他引:1  
In conventional isolated half-bridge dc-dc converters, the leakage-inductance-related losses degrade converter efficiency and limit the ability to increase the converters' switching frequencies. In this paper, a novel active-clamp snubber circuit for half-bridge dc-dc converters is proposed to recycle the energy stored in the leakage inductance by transferring this energy to a capacitor with zero-voltage zero-current-switching switched auxiliary switches, such that body-diode conduction of primary-side main switches are prevented and primary side ringing are attenuated resulting in improved converter efficiency. Principles of operation and simulation analysis are presented and supported by experimental results that show significant improvement in efficiency.  相似文献   

6.
An improved perturbation technique proposed in a recent paper (Int. J. Electronics, vol. 63, pp.403-414) has been successfully applied to steady-state analysis of PWM switching converters. This paper extends the algorithm to transient analysis of a broader class of non-linear systems. As an example, the transient response of a Boost PWM switching converter is analyzed to demonstrate its simplicity and accuracy.  相似文献   

7.
A general approach for controlling pulse-width-modulated (PWM) -type switching DC-DC converters digitally using state-feedback techniques and linear optimal control theory is reported. The methodology for redesigning the state estimator is investigated, and a method derived from the general linear-quadratic-regulator (LQR) problem, is proposed. The method is found to offer better transient responses and robustness to uncertainties in plant parameters when compared with the typical eigenvalue-assignment method. Special attention is directed to plant models with possible migrations of the open-loop zeroes across the stability boundary during operation. Results of applying these techniques to a published Cuk converter are reported to illustrate different points of interest  相似文献   

8.
A random discrete pulse-width modulation (RDPWM) scheme is examined and compared with the randomised pulse-position modulation (RPPM) method for DC-DC power conversion. The RDPWM method has no switching harmonics while the RPPM method has significant switching harmonics. Power spectral characteristics of the two methods are presented and discussed  相似文献   

9.
High-performance error amplifier for fast transient DC-DC converters   总被引:1,自引:0,他引:1  
A new error amplifier is presented for fast transient response of dc-dc converters. The amplifier has low quiescent current to achieve high power conversion efficiency, but it can supply sufficient current during large-signal operation. Two comparators detect large-signal variations, and turn on extra current supplier if necessary. The amount of extra current is well controlled, so that the system stability can be guaranteed in various operating conditions. The simulation results show that the new error amplifier achieves significant improvement in transient response than the conventional one.  相似文献   

10.
Small-signal analysis of DC-DC converters with sliding mode control   总被引:9,自引:0,他引:9  
This paper deals with small-signal analysis of DC-D converters with sliding mode control. A suitable small signal model is developed which allows selection of control coefficients, analysis of parameter variation effects, characterization of the closed loop behavior in terms of audiosusceptibility, output and input impedances, and reference to output transfer function. Unlike previous analyses, the model includes effects of the filters used to evaluate state variable errors. Simulated and experimental results demonstrate model potentialities  相似文献   

11.
Performance prediction of DC-DC converters with impedances as loads   总被引:1,自引:0,他引:1  
This paper presents a method of predicting the outer loop gain of dc-dc converters when there is a general (nonresistive) impedance as a load. Based on this prediction, it is possible to then derive a corresponding phase margin, gain margin and bandwidth in order to define a dc-dc converter's stable operating area. Two applications of the method are presented for performance prediction in: 1) dc-dc converters with additional capacitors placed across their load; 2) source converters in a distributed power system. In both applications, the theoretical predictions match closely to the experimental data.  相似文献   

12.
This paper presents a simple unified approach to the design of fixed-frequency pulsewidth-modulation-based sliding-mode controllers for dc-dc converters operating in the continuous conduction mode. The design methodology is illustrated on the three primary dc-dc converters: buck, boost, and buck-boost converters. To illustrate the feasibility of the scheme, an experimental prototype of the derived boost controller/converter system is developed. Several tests are performed to validate the functionalities of the system.  相似文献   

13.
Offline applications with single-stage power converters (SSCs) are presented in this paper. The approach used in synthesizing the SSCs is first described, and their applications are then introduced. In addition, viable control strategies for the SSCs are addressed. The developed SSCs can fulfill multifunctions, such as input power factor correction, fast output regulation and lamp ballasting, and possess the merits of compact size, simple driver design and high reliability. Prototypes of SSCs, applied to an electronic dimming ballast and a DC regulator, are built which show high feasibility in such moderate power applications  相似文献   

14.
This paper describes a new control design procedure for PWM DC-DC converters. The control action has two components: a linear feedback, designed via the LQ approach, and a nonlinear feedforward. The proposed control scheme guarantees excellent regulation of the output voltage, even in the presence of large variations of the input reference signal, as pointed out by numerous simulations carried out on different converter topologies. Good performances are also achievable when a suitably designed estimator is inserted into the control loop to reconstruct internal variables and input voltage disturbances from output voltage measurements  相似文献   

15.
In this paper, a compact soft-start scheme is proposed and successfully applied to typical voltage-mode DC-DC switching converters. The adaptive current limitation implemented through DAC control will largely reduce the overshoot voltage under a wide range of output current. Proven experimentally by a buck converter implemented in a 0.5 μm CMOS technology, the post-simulation results show that when the converter starts up, the maximum overshoot (2.7% at ILOAD=0 A) by the proposed soft-start scheme is less than that with the conventional scheme by 5% under the same condition. The start-up time can be adaptively adjustable depending on load current and the maximum start-up time is around 760 μs with 22 μF output capacitor. The circuits which realize the soft-start scheme can also be fully integrated into the control chip of DC-DC switching converter resulting in low cost.  相似文献   

16.
A design method for paralleling current mode controlled DC-DC converters   总被引:3,自引:0,他引:3  
This paper proposes a new current sharing method. It is based on current mode controlled dc-dc converters and achieves the current sharing by forcing all inner current loops to have the same current reference. Meanwhile, this method decouples control loops from the voltage regulation and current-sharing regulation instead of adding control loops as in traditional master-slave methods. Therefore, the large signal performance is good while its stability is guaranteed. Further, unlike multi-module methods, the modularity of single dc-dc converter is retained. Design rules and small signal analysis are presented. The advantages of the proposed method are verified by experimental results.  相似文献   

17.
A novel structure for on chip tap weight implementation in CCD transversal filters is described which employs two splits in the CCD sensing electrodes to improve on the performance of the conventional single-split weighting technique. This greatly reduces the capacitance associated with the sensing nodes and consequently reduces the common mode signal, gain sensitivity, coefficient error, and clock noise pickup. Experimental results are presented which verify this improved performance. The results achieved for a 3.4-kHz low-pass filter clocked at 32 kHz show a signal-to-noise ratio of 86 dB with harmonic distortion of less than 0.3 percent.  相似文献   

18.
A new transfer function from control voltage to duty cycle, the closed-current loop, which captures the natural sampling effect is used to design a controller for the voltage-loop of a pulsewidth modulated (PWM) dc-dc converter operating in continuous-conduction mode (CCM) with peak current-mode control (PCM). This paper derives the voltage loop gain and the closed-loop transfer function from reference voltage to output voltage. The closed-loop transfer function from the input voltage to the output voltage, or the closed-loop audio-susceptibility is derived. The closed-loop transfer function from output current to output voltage, or the closed loop output impedance is also derived. The derivation is performed using an averaged small-signal model of the example boost converter for CCM. Experimental verification is presented. The theoretical and experimental results were in good agreement, confirming the validity of the transfer functions derived.  相似文献   

19.
This paper introduces an approach to achieve optimum dead times in dc-dc converters with synchronous rectifiers without sensing any of the power-stage signals other than the output voltage. The dead times are adjusted adaptively to minimize the duty-cycle command, which results in maximization of the converter efficiency. The method is particularly well suited for digital controller implementation, requiring no additional analog components or modifications of standard gate-drive circuitry. Experimental results for a digitally controlled 5V-to-1V, 5-A synchronous buck converter demonstrate practical implementation of the sensorless dead-time optimization algorithm.  相似文献   

20.
This paper proposes a design criterion for calculating the resonant auxiliary elements of zero-voltage transition dc-dc pulsewidth-modulated (PWM) converters that use a dc auxiliary voltage source. The proposed criterion is based on stored energy in resonant auxiliary elements and takes into account the influence of the auxiliary voltage source value. Using this criterion, the reactive energy can be kept at a minimum level and a reduction of the auxiliary elements current ratings is achieved, which leads to lower conduction losses and improved converter efficiency. In addition, a reduction in size of auxiliary magnetic elements can be accomplished. To illustrate the usefulness of the proposed design criterion, the paper compares results obtained from the True-PWM Zero-Voltage Switching pole boost converter designed according to the proposed criterion, and from the original design guidelines. Experimental results show an efficiency gain of about 1% for a wide load range and 1.5% at full load. In addition, a reduction of about 52% in the auxiliary transformer volume for the implemented prototype was achieved, ensuring a reduction in overall converter size. Experimental results were obtained using a 1-kW 100-kHz laboratory prototype.  相似文献   

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