A Broadband CMOS Frequency Tripler Using a Third-Harmonic Enhanced Technique

A third harmonic enhanced technique is proposed to implement a broadband and low-phase-noise CMOS frequency tripler. It nonlinearly combines a pair of differential fundamental signals to generate deep cuts at the peaks of the fundamental waveform, resulting in a strong third harmonic frequency output. This mechanism has inherent suppression on the fundamental and the other harmonics so that only a low-Q high-pass filter on the lossy silicon substrate is applied at the output to further reject the fundamental and the second harmonic frequencies, in contrast to the high-Q filters used in most of the previous tripler designs. The fabricated circuit using 0.18 m CMOS technology is compact and has an input frequency range from 1.7 GHz to 2.25 GHz, or an output frequency range from 5.1 GHz to 6.75 GHz, resulting in about 28% frequency bandwidth. The optimum conversion loss from the tripler is 5.6 dB (27.5% efficiency) at an input power of 2 dBm. The suppressions for the fundamental, second and fourth harmonics in the measurement are better than 11 dB, 9 dB, and 20 dB within an input power range from 2 dBm to 7 dBm.     

225–255-GHz InP DHBT Frequency Tripler MMIC Using Complementary Split-Ring Resonator

In this paper, a novel design of frequency tripler monolithic microwave integrated circuit (MMIC) using complementary split-ring resonator (CSRR) is proposed based on 0.5-μm InP DHBT process. The CSRR-loaded microstrip structure is integrated in the tripler as a part of impedance matching network to suppress the fundamental harmonic, and another frequency tripler based on conventional band-pass filter is presented for comparison. The frequency tripler based on CSRR-loaded microstrip generates an output power between ?8 and ?4 dBm from 228 to 255 GHz when the input power is 6 dBm. The suppression of fundamental harmonic is better than 20 dBc at 77–82 GHz input frequency within only 0.15?×?0.15 mm² chip area of the CSRR structure on the ground layer. Compared with the frequency tripler based on band-pass filter, the tripler using CSRR-loaded microstrip obtains a similar suppression level of unwanted harmonics and higher conversion gain within a much smaller chip area. To our best knowledge, it is the first time that CSRR is used for harmonic suppression of frequency multiplier at such high frequency band.     

一种毫米波宽锁定范围的注入锁定倍频器设计

为提高毫米波段倍频器在低功耗下的工作带宽,采用IHP130 nm SiGe BiCMOS 工艺,设计了一种采用双端注入技术的毫米波宽锁定范围注入(DEI)锁定倍频器。该注入锁定倍频器主要由谐波发生器和带有尾电流源的振荡器构成,由巴伦产生差分信号双端注入振荡器的形式提高三次谐波注入强度,使其在E、W 等波段输出宽锁定范围和良好相位噪声性能的三倍频信号。仿真结果表明,注入锁定倍频器在工作电压为1.2 V,输入信号功率为0 dBm时,其锁定范围在57~105 GHz 内。在相同工作电压和输入信号功率下,输入频率为32 GHz 时,一次、二次和四次谐波抑制大于20 dBc,功耗为9.1 mW。     

Design of a W-band Frequency Tripler for Broadband Operation Based on a Modified Equivalent Circuit Model of GaAs Schottky Varistor Diode

This paper presents the design and experimental results of a W-band frequency tripler with commercially available planar Schottky varistor diodes DBES105a fabricated by UMS, Inc. The frequency tripler features the characteristics of tunerless, passive, low conversion loss, broadband and compact. Considering actual circuit structure, especially the effect of ambient channel around the diode at millimeter wavelength, a modified equivalent circuit model for the Schottky diode is developed. The accuracy of the magnitude and phase of S21 of the proposed equivalent circuit model is improved by this modification. Input and output embedding circuits are designed and optimized according to the corresponding embedding impedances of the modified circuit model of the diode. The circuit of the frequency tripler is fabricated on RT/Rogers 5880 substrate with thickness of 0.127 mm. Measured conversion loss of the frequency tripler is 14.5 dB with variation of ±1 dB across the 75?~?103 GHz band and 15.5?~?19 dB over the frequency range of 103?~?110 GHz when driven with an input power of 18 dBm. A recorded maximum output power of 6.8 dBm is achieved at 94 GHz at room temperature. The minimum harmonics suppression is greater than 12dBc over 75?~?110 GHz band.     

260 GHz GaN高功率三倍频器设计

基于GaN太赫兹二极管芯片,采用非平衡式电路结构,设计了一款260 GHz三倍频器。采用GaN肖特基二极管芯片提高电路的耐受功率和输出功率;采用“减高+减宽”的输出波导结构抑制二次谐波;采用高低阻抗带线结构设计了倍频器的输入滤波器和输出滤波器。测试结果显示,该三倍频器在261 GHz峰值频率下,实现最大输出功率为69.1 mW,转换效率为3.3%,同时具有较好的谐波抑制特性。     

A compact 220 GHz heterodyne receiver module with planar Schottky diodes

This letter presents the development of a compact 220 GHz heterodyne receiver module for radars application in which a novel low pass wide stop band intermediate frequency (IF) filter is integrated. The planar Schottky anti-parallel mixing diode based subharmonic mixer (SHM) is used as the receiver’s first stage. The diode is flip-chip mounted on a 50 μm thick quartz substrate. The accurate modeling of the self and mutual inductance of the diode’s air-bridges are discussed. The measured conversion loss (CL) of the SHM has a minimum value of 6.2 dB at 210.5 GHz, and is lower than 8.4 dB in the frequency range 209.4–219.6 GHz with a 10 mW input power from a local oscillator (LO). The LO chain consists of a 110 GHz passive tripler, two Ka-band amplifiers and a Ka-band active tripler. The tested minimum double side band (DSB) noise temperature of the integrated 220 GHz heterodyne receiver is 725 K at 205.2 GHz and lower than 1550 K in the frequency range 199–226 GHz.     

Novel oscillator incorporating a compact microstrip resonant cell

A novel transistor oscillator incorporating a compact microstrip resonant cell (CMRC) as its terminating resonance is proposed. Adjusting the dimensions of the cell, it is possible that the fundamental frequency can be positively fed back and the second harmonic negatively fed back at the input port of the oscillator. The fundamental output is enhanced with the second harmonic being suppressed. The output power of the proposed CMRC oscillator is 14.7 dBm at 2.5 GHz with 27.1 dB rejection of the second harmonic, outperforming the conventional microstrip termination with a 40% size reduction     

A subharmonic self-oscillating mixer with integrated antenna for60-GHz wireless applications

A balanced integrated-antenna self-oscillating mixer at 60 GHz is presented in this paper. The modal radiation characteristics of a dual-feed planar quasi-Yagi antenna are used to achieve RF-local oscillator (RF-LO) isolation between closely spaced frequencies. The balanced mixer is symmetric, inherently broad band, and does not need an RF balun. Pseudomorphic high electron-mobility transistors are used in a 30-GHz push-pull circuit to generate the second harmonic and a 30-GHz dielectric resonator was used to stabilize the fundamental oscillation frequency. This allows the possibility of building a balanced low-cost self-contained antenna integrated receiver with low LO leakage for short-range narrow-band communication. Phase locking can be done with half of the RF frequency. The circuit exhibits a conversion loss less than 15 dB from 60 to 61.5 GHz, radiation leakage of -26 dBm at 60 GHz, and IF phase noise of -95 dBc/Hz at 100-kHz offset     

A Millimeter Wave Phase Locked and Frequency Multiplying Source

A millimeter wave phase locked and frequency multiplying source is proposed in this paper. The design includes an X-band phase locked loop (PLL) frequency synthesizer as the base frequency source, and a monolithic millimeter wave frequency tripler, which is developed by using OMMIC 0.18μm pHEMT process. The PLL and the tripler are integrated in a single circuit board to make a low-cost and compact frequency source with the size of 6cm × 5cm. Measurement shows an output power of more than 4.8dBm at the frequency range from 35 to 36.7GHz. A phase noise of about -92dBc/Hz at 100kHz offset is achieved.     

基于石英基片的二毫米频段三倍频器的研制

介绍了一个基于石英基片的二毫米频段三倍频器.采用反向并联变容二极管对结构实现倍频.建立了该二极管管对的等效电路模型并提取了模型参数.设计实现的倍频器输入为K型接头结构,输出为WR-8波导结构.获得的倍频器在输出频率为112.8～118.2 GHz范围内,输出功率大于0 dBm,最大输出功率超过2 dBm,最小倍频损耗为...     

Millimeter- and submillimeter-wave multipliers usingquantum-barrier-varactor (QBV) diodes

Experimental results are presented using quantum-barrier-varactor (QBV) diodes in harmonic multipliers. Output powers and tripler conversion efficiencies of more than 2 mW and 5%, respectively, were achieved between 210 and 280 GHz. In a crude experiment, an efficiency of more than 0.2% for the fifth harmonic was measured at 310 GHz. The values for the QBV diode as a tripler are comparable to state-of-the-art results for Schottky-varactor diode triplers. The experimental results agree well with theoretical calculations     

Balanced Colpitt oscillator MMICs designed for ultra-low phase noise

Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.     

An efficient Schottky-varactor frequency multiplier at millimeter waves. Part II: Tripler

The multiplication efficiency of millimeter wave triplers was studied. In the case of a commercially available Schottky-varactor, the tripler efficiency versus pump power, bias voltage, and embedding impedances at the fundamental and harmonic frequencies was simulated using a nonlinear analysis program. A scaled model of a waveguide mount was used to experimentally optimize the impedances. For experimental verification a tripler from 33–39 GHz to 99–117 GHz was constructed. The highest efficiency measured was 28% at 107 GHz with 5 mW input power. The highest efficiency obtained with 30 mW input power was 18%.     

Low-loss and high-selectivity bandpass filter with harmonic suppression and piezoelectric transducer tuning

A low-loss and high-selectivity bandpass filter with harmonic suppression and piezoelectric transducer (PET) tuning is presented. At the 3.5 GHz passband, the insertion loss is 1.48 dB, and the transmission zeros at 3.05 and 4.08 GHz have a rejection of 55 dB. The rejection at the 7 GHz second harmonic is 50 dB. A PET tunes the bandstop sections to obtain a tunable suppression (>45 dB) around the second harmonic from 5.35 to 7.8 GHz.     

基于肖特基势垒二极管三维电磁模型的220GHz三倍频器

采用阻性肖特基势垒二极管UMS DBES105a设计了一个太赫兹三倍频器.为了提高功率容量和倍频效率,该倍频器采用反向并联二极管对结构实现平衡式倍频.根据S参数测试曲线建立了该二极管的等效电路模型并提取了模型参数.由于在太赫兹频段二极管的封装影响到电路的场分布,将传统的二极管SPICE参数直接应用于太赫兹频段的电路设计存在一定缺陷,因此还建立了二极管的三维电磁模型.基于该模型研制出的220 GHz三倍频器最大输出功率为1.7 mW,最小倍频损耗为17.5 dB,在223.5 GHz~237 GHz输出频率范围内,倍频损耗小于22 dB.     

Third-order intermodulation reduction by harmonic injection in aTWT amplifier

A method for reducing the two-tone third-order intermodulation products arising from two carrier frequencies at 1.95 and 2.00 GHz is demonstrated in a traveling wave tube-distributed amplifier. The optimum amplitude and phase of an injected second harmonic and the resulting intermodulation suppression of up to 24.2 dB are examined for fundamental drive levels approaching saturation     

A harmonic suppression antenna for an active integrated antenna

An inset-fed antenna with a shorting pin and slots is presented for harmonic suppression of an active integrated antenna. Its fundamental resonant frequency is 5.8 GHz. At fundamental and harmonic frequencies, return loss and radiation characteristics are measured and compared with those of the conventional microstrip patch antenna. The second and third harmonic return losses of the proposed antenna are suppressed to 6.7 dB and 17.7 dB with respect to the conventional patch antenna, respectively.     

A 5.7–6.4GHz GaAs HBT Power Amplifier with a Gain Enhanced Bias Circuit

This paper describes the design of a 5.7–6.4GHz GaAs Heterojunction bipolar transistor (HBT) power amplifier for broadband wireless application such as wireless metropolitan area networks. A bias circuit is proposed which enhances the power gain and provides a good linearity. Using the wideband matching network tech-niques with trap circuits embedded to filter the harmonics and the diode-based linearizing techniques, a broadband power amplifier module was obtained which exhibited a gain above 28dB. This is about 1dB improvement com-pared with those normal bias circuits at a supply volt-age of 5V in the frequency range of 5.7–6.4GHz, measured with Continuous wave(CW) signals. The saturated output power was greater than 33dBm in 5.7–6.4GHz and the out-put 1dB compression point was greater than 31dBm. The phase deviation was less than 5 degrees when the output power below 33dBm. The second and third order harmonic components were also less than -45dBc and -50dBc.     

Nonlinear power amplification at the second harmonic in TRAPATT diodes

The letter describes a microstrip-amplifier circuit where both the triggering of the trapped-plasma state and amplification occur at the second harmonic of the fundamental TRAPATT frequency. Peak power output of 24 W and a gain of 6.5 dB have been observed with this amplifier at a frequency of 2.29 GHz.     

Submillimeter-wave heterodyne spectroscopy with a compact solid state radiometer

A compact, solid state submillimeter-wave heterodyne radiometer has been developed and was used to measure spectral characteristics of a water vapor jet in a space simulation chamber. Features of the 557 GHz water vapor line profile were observed in significantly greater detail than in previous experiments through an increased sensitivity and improved frequency resolution (600 kHz). The local oscillator of the radiometer consisted of a frequency multiplication chain which was driven by an InP Gunn oscillator at 92.6 GHz, and which contained a frequency tripler and harmonic mixer in cascade. The front end of the receiver had a noise temperature of 4500 K (DSB) at 555 GHz, consumed 3 W and weighed 3 kg. This advance in technology is particularly relevant to submillimeter-wave radiometry from a space-based platform.