Miniature hermetically sealed housing for pressure sensors

The aim of the current study was to reduce both the size as well as production costs of current designs whilst retaining the general architectural principles and find a solution lending itself to batch processing. The designs result in a new method for connecting the sensor to the outside being necessary. This can be achieved by thin film on a steel substrate or using ceramic technology such as LTCC. Special attention is paid to the flexible membranes. Small membranes with high corrugations made of nickel are separated in a standard galvanic process on the housing. The manufactured sensors are characterised.     

Integrated signal conditioning for silicon pressure sensors

A silicon-diaphragm pressure sensor containing on-chip circuitry for signal conditioning has been designed for applications in biomedicine. The device requires no off-chip components and only two external leads, making it suitable for use with multisensor catheters having diameters less than 1.5 mm. The output is a temperature-compensated high-frequency FM analog representation of the applied pressure signal. The device exhibits 1-percent resolution and accuracy over the physiological pressure and temperature ranges. Circuit techniques applicable to a variety of active sensors are descried.     

A sensing chair using pressure distribution sensors

The sensing chair project enables an ordinary office chair to become aware of its occupant's actions and needs. Surface-mounted pressure distribution sensors are placed over the seatpan and backrest of the chair for real time capturing of contact information between the chair and its occupant. Given the similarity between a pressure distribution map and a gray-scale image, pattern recognition techniques commonly used in computer and robot vision, such as principal components analysis, were successfully applied to solving the problem of sitting posture classification. The current static posture classification system operates in real time with an overall classification accuracy of 96% and 79% for familiar and unfamiliar users, respectively. The results obtained form important stepping stones toward an intelligent chair that can find applications in many areas including multimodal interfaces, intelligent environment, and safety of automobile operations     

Surface passivation of crystalline silicon solar cells: a review

In the 1980s, advances in the passivation of both cell surfaces led to the first crystalline silicon solar cells with conversion efficiencies above 20%. With today's industry trend towards thinner wafers and higher cell efficiency, the passivation of the front and rear surfaces is now also becoming vitally important for commercial silicon cells. This paper presents a review of the surface passivation methods used since the 1970s, both on laboratory‐type as well as industrial cells. Given the trend towards lower‐cost (but also lower‐quality) Si materials such as block‐cast multicrystalline Si, ribbon Si or thin‐film polycrystalline Si, the most promising surface passivation methods identified to date are the fabrication of a p–n junction and the subsequent passivation of the resulting silicon surface with plasma silicon nitride as this material, besides reducing surface recombination and reflection losses, additionally provides a very efficient passivation of bulk defects. Copyright © 2000 John Wiley & Sons, Ltd.     

A theoretical study of transducer noise in piezoresistive andcapacitive silicon pressure sensors

An analysis of the effect of noise introduced by the transduction process on the minimum detectable signal (MDS) of piezoresistive and capacitive pressure sensors has been performed. MDS is first introduced as an appropriate figure of merit for comparing different sensor transduction schemes. Analyses are then performed to determine the minimum MDS theoretically achievable for a broad range of generic transducer circuits. The results of the analyses indicate that noise in the transduction process is not a limiting factor in the performance of properly designed integrated silicon sensors     

SENSIM: A simulation program for solid-state pressure sensors

A simulation program is described which is capable of calculating the output response of silicon piezoresistive or capacitive pressure sensors as a function of both pressure and temperature. A thermoelastic plane-stress formulation is used in calculating the stress and deflection of the transducer diaphragm. Both analytical and finite-difference solution methods are available, depending on the sensor structure. Diaphragm thickness taper, oxide and package stress, and rim effects are simulated. For capacitive structures, the program accurately predicts the diaphragm deflection and pressure sensitivity as a function of pressure and temperature. Stepped diaphragm structures are shown to be capable of improving pressure sensitivity by as much as 50 percent. The package-induced thermal drift for electrostatically sealed glass-silicon devices is typically less than 0.05 mmHg/°C.     

A readout system for passive pressure sensors

This paper presents a readout system for the passive pressure sensors which consist of a pressure- sensitive capacitor and an inductance coil to form an LC circuit. The LC circuit transforms the pressure variation into the LC resonant frequency shift. The proposed system is composed of a reader antenna inductively coupled to the sensor inductor, a measurement circuit, and a PC post-processing unit. The measurement circuit generates a DC output voltage related to the sensor＇s resonant frequency and converts the output voltage into digital form. The PC post-processing unit processes the digital data and calculates the sensor＇s resonant frequency. To test the performance of the readout system, a sensor is designed and fabricated based on low temperature co-fired ceramic （LTCC）, and a series of testing experiments is carried out. The experimental results show good agreement with the impedance analyzer＇s results, their error is less than 2.5%, and the measured values are almost insensitive to the variation of readout distance. It proves that the proposed system is effective practically.     

Structures for piezoresistive measurement of package induced stress in transfer molded silicon pressure sensors

The package induced stress in a transfer molded micromechanical pressure sensor has been measured by use of silicon piezoresistors. Measurements have been carried out by monitoring the individual piezoresistors in the measuring bridge of an existing sensor, and by measurements on a modified sensor structure with specially designed stress sensing structures. The induced difference (σ_x – σ_y) between x- and y- normal stress in the sensor diaphragm has been measured to 50 ± 10 MPa at 25°C. The induced stress creates a thermal zero shift of the sensor signal. By covering the sensor chip with a soft glob top before molding, the stress may be considerably reduced. For glob-topped samples the measured value of (σ_x – σ_y) at 25°C is 20 ± 20 MPa.     

A vertical channel JFET fabricated using silicon planar technology

A vertical channel JFET with a new structure was fabricated using a self-aligned process and doped polysilicon technology. This structure is suitable for a high power device, since many channels are easily integrated on a single chip. It is also suitable for a high frequency device, because two essential conditions for high frequency operation, sufficiently low gate resistance and small channel length, can be realized without difficulty. This device shows triode-like I-V characteristics, which are determined by the channel impurity concentration and gate diffusion profile. Typical performances of an n-channel, 4 mm/spl times/4 mm, 5520 channel power FET, designed for an audio amplifier, are a voltage amplification factor of 5, a source-to-gate breakdown voltage of 60 V, a drain-to-gate breakdown voltage of 200 V, and I/SUB DSS/=4 A at V/SUB DS/=7 V.     

Porous silicon in crystalline silicon solar cells: a review and the effect on the internal quantum efficiency

Crystalline silicon (c-Si) is the dominant semiconductor material in use for terrestrial photovoltaic cells and a clear tendency towards thinner, active cell structures and simplified processing schemes is observable within contemporary c-Si photovoltaic research. The potential applications of porous silicon and related benefits are reviewed. Specific attention is given to the different porous silicon formation processes, the use of this porous material as anti-reflection coating in simplified processing schemes and for simple selective emitter processes and its light trapping and surface passivating capabilities, which are required for advantageous use in thin active cell structures. Our analysis of internal quantum efficiency data obtained on both conventional and thin-film c-Si solar cells has been performed with the aim of describing the light diffusing behaviour of porous Si as well as investigating the surface passivating capabilities. An effective entrance angle of 60° is derived, which corresponds to totally diffuse isotropic light, and the importance of a correction for absorption losses in the porous layer is illustrated. Furthermore, photoconductivity decay measurements of freshly etched porous Si on float-zone p-type Si indicate a strong bias-light dependency and a fast degradation of the surface recombination velocity. © 1998 John Wiley & Sons, Ltd.     

Performance improvements of solar-grade crystalline silicon by continuously variable temperature phosphorous gettering process using a porous silicon layer

The Continuously Variable Temperature Phosphorous Gettering process using a Porous Silicon Layer (PSL-CVTPG) was proposed. PSL-CVTPG process can getter unwanted impurities from Solar-Grade silicon (SOG-Si) wafers and upgrade photovoltaic properties of solar cells more efficiently than conventional Constant Temperature Phosphorus Gettering process using a Porous Silicon Layer (PSL-CTPG). The resistivity, and mobility of majority carriers, and the effective lifetime of minority carriers were evaluated; the results showed that under certain conditions, the gettering effect of the PSL-CVTPG is better than that of the optimum PSL-CTPG. By orthogonal experiments, the optimum PSL-CVTPG conditions were found to be 900 °C/60 min+750 °C/60 min. PSL-CVTPG and CTPG processes under their respective optimum gettering conditions were used in the fabrication of solar cells, and cells based on SOG-Si wafers purified by the PSL-CVTPG process exhibited an amelioration in photovoltaic performances.     

Gettering by heat thermal processing: application in crystalline silicon solar cells

The aim of this work is to getter unwanted impurities from solar grade crystalline silicon (Si) wafers and then to enhance their electronic properties. This was done by forming a sacrificial porous silicon (PS) layer on both sides of the Si wafers and by performing infrared (IR) thermal annealing treatments (at around 950 °C) in a SiCl₄/N₂ controlled atmosphere. The process allows concentrating unwanted impurities in the PS layer and near the PS/silicon interface. These treatments reduce the resistivity by about two orders of magnitude at a depth of about 40 μm and improve the minority carrier diffusion length from 75 to 210 μm. This gettering method was also tested on silicon wafers where grooved fingers and back contacts were achieved using a chemical vapor etching (CVE) method. Front buried metallic contacts and small holes for local back surface field were then achieved after the gettering stage in order to realize silicon solar cells. It was shown that the photovoltaic parameters of gettered silicon solar cells were improved as regard to ungettered ones.     

Thermal oxidation for crystalline silicon solar cells exceeding 19% efficiency applying industrially feasible process technology

Thermal oxides are commonly used for the surface passivation of high‐efficiency silicon solar cells from mono‐ and multicrystalline silicon and have led to the highest conversion efficiencies reported so far. In order to improve the cost‐effectiveness of the oxidation process, a wet oxidation in steam ambience is applied and experimentally compared to a standard dry oxidation. The processes yield identical physical properties of the oxide. The front contact is created using a screen‐printing process of a hotmelt silver paste in combination with light‐induced silver plating. The contact formation on the front requires a short high‐temperature firing process, therefore the thermal stability of the rear surface passivation is very important. The surface recombination velocity of the fired oxide is experimentally determined to be below S ≤ 38 cm/s after annealing with a thin layer of evaporated aluminium on top. Monocrystalline solar cells are produced and 19·3% efficiency is obtained as best value on 4 cm² cell area. Simulations show the potential of the developed process to approach 20% efficiency. Copyright © 2008 John Wiley & Sons, Ltd.     

高效低成本的硅双极GSM双频PA模块

提出了在单个陶瓷基底上利用硅射频Ic双极芯片技术设计PA模块的方法和测试数据.得到的数据表明利用硅技术生产出的产品性能可与现有GaAs技术产品相媲美.     

Shunt removal and patching for crystalline silicon solar cells using infrared imaging and laser cutting

Shunts in crystalline silicon solar cells can be physically removed and replaced with good cells to eliminate their influences, which is proved by the experiments in this paper. By infrared imaging and laser cutting, the shunted regions near the edges of cell A and in the middle of cell B were identified and removed with their efficiencies increased by 6·8% and 3·0%, respectively. After shunt removal, cell B was patched up with good cells and its final work current further increased from 3·71 to 4·11 A. The result implies that this work could improve the output power and current matching in a module for the repaired cell. Copyright © 2009 John Wiley & Sons, Ltd.     

Wafer bonding technology for silicon-on-lnsulator applications: A review

School of Engineering, Duke University, Durham, North Carolina, 27706. The status of wafer bonding technology especially for silicon-on-insulator (SOI) materials is reviewed. General advantages of wafer bonding as well as specific problems of wafer bonding, such as interface bubble formation, and solutions for these problems are discussed. The specific requirements for SOI materials in terms of SOI layer thickness and the appropriate thinning procedures are dealt with. Interface properties such as bonding strength and electrical properties are also reviewed. Various device results are mentioned.     

Deep level centers in silicon carbide: A review

Results from current studies of the parameters of deep centers in 6H-, 4H-, and 3C-SiC are analyzed. Data are presented on the ionization energy and capture cross sections of centers formed by doping SiC with different types of impurities or during irradiation, as well as of intrinsic defects. The involvement of these centers in radiative and nonradiative recombination is examined. This analysis of published data illustrates the large effect of intrinsic defects in the SiC crystal lattice both on the formation of deep centers and on the properties of the epitaxial layers themselves, such as their doping level and polytype homogeneity. Fiz. Tekh. Poluprovodn. 33, 129–155 (February 1998)     

Accuracy of progress ratios determined from experience curves: the case of crystalline silicon photovoltaic module technology development

Learning curves are extensively used in policy and scenario studies. Progress ratios (PRs) are derived from historical data and are used for forecasting cost development of many technologies, including photovoltaics (PV). Forecasts are highly sensitive to uncertainties in the PR. A PR usually is determined together with the coefficient of determination R², which should approach unity for a good fit of the available data. Although the R² is instructive, we recommend using the error in the PR determined from the fit because it is a direct measure of the range in PR values that is recommended to be used in sensitivity analyses within scenario studies. We present a simple equation to calculate the error in PR from the fit parameters. In the case of crystalline PV module technology development we find a PR = 0·794 ± 0·003 by fitting price data of the period 1976–2006. A moving average approach with a 10‐year time window shows that PR varies from 0·818 ± 0·017 up to a starting year of 1987, and is reduced considerably to a minimum value of 0·704 ± 0·014 for the starting year 1991. For the most recent starting year 1997, the average PR is considerably higher at 0·884 ± 0·022, highlighting the recent silicon feedstock supply problem. When available, error in individual data points can be used to perform weighted fits in order to decrease fitting errors. To illustrate this approach, an analysis of Dutch PV system price development over the period 1992–2002 shows that PR is 0·876 ± 0·010, where the error is decreased with respect to unweighted fitting. The PR = 0·794 has been used to analyze the cost targets stated in the Strategic Research Agenda as formulated by the European PV Technology Platform for the years 2013, 2020 and 2030. Assuming that such a PR is maintained, it is concluded that these targets may be attained at sustained annual growth rates of 21–42%, which seems feasible. Copyright © 2007 John Wiley & Sons, Ltd.     

A BioMEMS review: MEMS technology for physiologically integrated devices

MEMS devices are manufactured using similar microfabrication techniques as those used to create integrated circuits. They often, however, have moving components that allow physical or analytical functions to be performed by the device. Although MEMS can be aseptically fabricated and hermetically sealed, biocompatibility of the component materials is a key issue for MEMS used in vivo. Interest in MEMS for biological applications (BioMEMS) is growing rapidly, with opportunities in areas such as biosensors, pacemakers, immunoisolation capsules, and drug delivery. The key to many of these applications lies in the leveraging of features unique to MEMS (for example, analyte sensitivity, electrical responsiveness, temporal control, and feature sizes similar to cells and organelles) for maximum impact. In this paper, we focus on how the biological integration of MEMS and other implantable devices can be improved through the application of microfabrication technology and concepts. Innovative approaches for improved physical and chemical integration of systems with the body are reviewed. An untapped potential for MEMS may lie in the area of nervous and endocrine system actuation, whereby the ability of MEMS to deliver potent drugs or hormones, combined with their precise temporal control, may provide new treatments for disorders of these systems.