A new design of fault-tolerant digital comparator based on quantum-dot cellular automata

Analog Integrated Circuits and Signal Processing - Quantum-dot cellular automata (QCA) is a new nanoscale development for the future of digital systems. It has been gained a lot of attention since...     

Design and evaluation of new majority gate-based RAM cell in quantum-dot cellular automata

Quantum-dot cellular automata is one of the candidate technologies used in Nano scale computer design and a promising replacement for conventional CMOS circuits in the near future. Since memory is one of the significant components of any digital system, designing a high speed and well-optimized QCA random access memory (RAM) is a remarkable subject. In this paper, a new robust five-input majority gate is first presented, which is appropriate for implementation of simple and efficient QCA circuits in single layer. By employing this structure, a novel RAM cell architecture with set and reset ability is proposed. This architecture has a simple and robust structure that helps achieving minimal area, as well as reduction in hardware requirements and clocking zone numbers. Functional correctness of the presented structures is proved by using QCADesigner tool. Simulation results confirm efficiency and usefulness of the proposed architectures vis-à-vis state-of-the-art.     

A new quantum-dot cellular automata full-adder

A novel expandable five-input majority gate for quantum-dot cellular automata and a new full-adder cell are presented. Quantum-dot cellular automata (QCA) is an emerging technology and a possible alternative for semiconductor transistor based technologies. A novel QCA majority-logic gate is proposed. This component is suitable for designing QCA circuits. The gate is simple in structure and powerful in terms of implementing digital functions. By applying these kinds of gates, the hardware requirement for a QCA design can be reduced and circuits can be simpler in level, gate counts and clock phases. In order to verify the functionality of the proposed device, some physical proofs are provided. The proper functionality of the FA is checked by means of computer simulations using QCADesigner tool. Both simulation results and physical relations confirm our claims and its usefulness in designing every digital circuit.     

Design of sequential circuits by quantum-dot cellular automata

This paper proposes a detailed design analysis of sequential circuits for quantum-dot cellular automata (QCA). This analysis encompasses flip-flop (FF) devices as well as circuits. Initially, a novel RS-type FF amenable to a QCA implementation is proposed. This FF extends a previous threshold-based configuration to QCA by taking into account the timing issues associated with the adiabatic switching of this technology. The characterization of a D-type FF as a device consisting of an embedded wire is also presented. Unique timing constraints in QCA sequential logic design are identified and investigated. An algorithm for assigning appropriate clocking zones to a QCA sequential circuit is proposed. A technique referred to as stretching is used in the algorithm to ensure timing and delay matching. This algorithm relies on a topological sorting and enumeration step to consistently traversing only once the edges of the graph representation of the QCA sequential circuit. Examples of QCA sequential circuits are provided.     

A new binary to gray code converter based on quantum-dot cellular automata nanotechnology

Photonic Network Communications - Quantum-dot cellular automata (QCA) is one of the most prominent technologies in nanometer-scale with appreciable reduction of size and power consumption and high...     

Design and implementation of circuit-switched network based on nanoscale quantum-dot cellular automata

Photonic Network Communications - Quantum-dot cellular automata (QCA) is a nanoscale technology to design digital circuits in nano-measure which acts based on electron’s interaction....     

Clocked molecular quantum-dot cellular automata

Quantum-dot cellular automata (QCA) is an approach to computing that eliminates the need for current switches by representing binary information as the configuration of charge among quantum dots. For molecular QCA, redox sites of molecules serve as the quantum dots. The Coulomb interaction between neighboring molecules provides device-device coupling. By introducing clocked control of the QCA cell, power gain, reduced power dissipation, and computational pipelining can be achieved. We present an ab initio analysis of a simple molecular system, which acts as a clocked molecular QCA cell. The intrinsic bistability of the molecular charge configuration results in dipole or quadrupole fields that couple strongly to the state of neighboring molecules. We show how clocked control of the molecular QCA can be accomplished with a local electric field.     

A new sign detection design for the residue number system based on quantum-dot cellular automata

Photonic Network Communications - Sign detection has a wide application in digital fixed-point signal processing; however, it seems hard to conduct it in residue number systems (RNSs) based on...     

Novel RAM cell designs based on inherent capabilities of quantum-dot cellular automata

Quantum Cellular Automata (QCA) is a novel and attractive method which enables designing and implementing high-performance and low-power consumption digital circuits at nano-scale. Since memory is one of the most applicable basic units in digital circuits, having a fast and optimized QCA-based memory cell is remarkable. Although there are some QCA structures for a memory cell in the literature, however, QCA characteristics may be used in designing a more optimized memory cell than blindly modeling CMOS logics in QCA. In this paper, two improved structures have been proposed for a loop-based Random Access Memory (RAM) cell. In the proposed methods, the inherent capabilities of QCA, such as the programmability of majority gate and the clocking mechanism have been considered. The first proposed method enjoys smaller number of cells and the wasted area has been reduced compared to traditional loop-based RAM cell. For the second proposed method, the memory access time has been duplicated in presence of smaller number of cells. Irregular placement of QCA cells in a QCA layout makes its realization troublesome. So, we have proposed alternative versions of the proposed methods that exploit regularity of clock zones in design and have compared them to each other. QCA designer has been employed for simulation of the proposed designs and proving their validity.     

Layout design of manufacturable quantum-dot cellular automata

Quantum-dot cellular automaton (QCA) is an emergent technology that is not hindered by quantum effects that limit the scaling of CMOS technology, but instead employs them to perform computation. However, this brings its own impediments, such as the influence of the thermodynamic effects. Beside that, QCA has to be coupled with CMOS circuitry of different size features to enable clocking. We discussed all these facts and devised a floorplan which would facilitate manufacturability. Based on it we developed the process of QCA layout design and defined the design rules that must be considered in order to ensure correct operation. These instructions enable the automatization of designing a QCA circuit layout.     

Using a nanoscale technology for designing fault-tolerant 2:1 multiplexer based on a majority gate

Photonic Network Communications - In today’s environment, digital technology and digital computing are unavoidable components of the creation of electronic gadgets. Quantum-dot cellular...     

基于元胞自动机的高速公路收费设计

文章在事故预防、吞吐量、成本等方面分析特定收费广场设计的性能,并运用主成分分析法确定公路收费站的评价模型。在建立评价模型的基础上,利用元胞自动机模型对收费亭数量以及形状等方面进行优化。     

Novel single-trit comparator circuits in ternary quantum-dot cellular automata

Analog Integrated Circuits and Signal Processing - Today, with the continuation of the reduction of the dimensions of transistors, the thickness of the gate is so small that it causes the leakage...     

Design of thermometer code-to-gray code converter circuit in quantum-dot cellular automata for nano-computing network

Photonic Network Communications - This article proposes the thermometer code converter, which eliminates the requirement of binary code converter to generate gray codes in different digital...     

Analytical method for cell displacement defect quantum-dot cellular automata primitive

Quantum-dot cellular automata (QCA) is an emerging computational paradigm which can overcome scaling limitations of the existing complementary metal oxide semiconductor (CMOS) technology. The existence of defects cannot be ignored, considering the fabrication of QCA devices at the molecular level where it could alter the functionality. Therefore, defects in QCA devices need to be analyzed. So far, the simulation-based displacement defect analysis has been presented in the literature, which results in an increased demand in the corresponding mathematical model. In this paper, the displacement defect analysis of the QCA main primitive, majority voter (MV), is presented and carried out both in simulation and mathematics, where the kink energy based mathematical model is applied. The results demonstrate that this model is valid for the displacement defect in QCA MV.     

An enhanced high-speed multi-digit BCD adder using quantum-dot cellular automata

The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata(QCA). Even though many efficient arithmetic circuits were designed using QCA, there is still a challenge to implement high-speed circuits in an optimized manner. Among these circuits, one of the essential structures is a parallel multi-digit decimal adder unit with significant speed which is very attractive for future environments. To achieve high speed, a new correction logic formulation method is proposed for single and multi-digit BCD adder. The proposed enhanced single-digit BCD adder(ESDBA) is 26% faster than the carry flow adder(CFA)-based BCD adder. The multi-digit operations are also performed using the proposed ESDBA, which is cascaded innovatively. The enhanced multi-digit BCD adder(EMDBA) performs two 4-digit and two 8-digit BCD addition 50% faster than the CFA-based BCD adder with the nominal overhead of the area. The EMDBA performs two 4-digit BCD addition 24% faster with 23% decrease in the area, similarly for 8-digit operation the EMDBA achieves 36% increase in speed with 21% less area compared to the existing carry look ahead(CLA)-based BCD adder design. The proposed multi-digit adder produces significantly less delay of(N-1)+3.5 clock cycles compared to the N*One digit BCD adder delay required by the conventional BCD adder method. It is observed that as per our knowledge this is the first innovative proposal for multi-digit BCD addition using QCA.     

Single-bit digital comparator circuit design using quantum-dot cellular automata nanotechnology

The large amount of secondary effects in complementary metal–oxide–semiconductor technology limits its application in the ultra-nanoscale region. Circuit designers explore a new technology for the ultra-nanoscale region, which is the quantum-dot cellular automata (QCA). Low-energy dissipation, high speed, and area efficiency are the key features of the QCA technology. This research proposes a novel, low-complexity, QCA-based one-bit digital comparator circuit for the ultra-nanoscale region. The performance of the proposed comparator circuit is presented in detail in this paper and compared with that of existing designs. The proposed QCA structure for the comparator circuit only consists of 19 QCA cells with two clock phases. QCA Designer-E and QCA Pro tools are applied to estimate the total energy dissipation. The proposed comparator saves 24.00% QCA cells, 25.00% cell area, 37.50% layout cost, and 78.11% energy dissipation compared with the best reported similar design.     

Reliability of majority voting based VLSI fault-tolerant circuits

The effect of compensating module faults on the reliability of majority voting based VLSI fault-tolerant circuits is investigated using a fault injection simulation method. This simulation method facilitates consideration of multiple faults in the replicated circuit modules as well as the majority voting circuits to account for the fact that, in VLSI implementations, the majority voting circuits are constructed from components of the same reliability as those used to construct the circuit modules. From the fault injection simulation, a survivability distribution is obtained which, when combined with an area overhead expression, leads to a more accurate reliability model for majority voting based VLSI fault-tolerant circuits. The new model is extended to facilitate the calculation of reliability of fault-tolerant circuits which have sustained faults but continue to operate properly. Analysis of the reliability model indicates that, for some circuits, the reliability obtained with majority voting techniques is significantly greater than predicted by any previous model     

Analysis of missing and additional cell defects in sequential quantum-dot cellular automata

The defect characterization of sequential devices and circuits, implemented by molecular quantum-dot cellular automata (QCA), is analyzed in this paper. A RS-type flip–flop is first introduced; this flip–flop takes into account the timing issues associated with the adiabatic switching of this technology and its requirements. It is then shown that a D-type flip–flop can be constructed with an embedded QCA wire which extends over multiple clocking zones. The logic-level characterization of both flip–flop devices is provided. A single additional and missing cell defect model is assumed for molecular implementation. For sequential circuits, defect characterization is pursued. It is shown that defects affect the functionality of basic QCA devices, resulting mostly in unwanted inversion and majority voter acting as a wire at logic level. In this paper, it is shown that a device-level characterization of the defects and faults can be consistently extended to a circuit-level analysis.     

An efficient design and implementation of Vedic multiplier in quantum-dot cellular automata

Telecommunication Systems - The Quantum-Dot Cellular Automata (QCA) is an incipient nanotechnology in contrast to the CMOS technology with appealing features like low power consumption, high speed...