On optimal burn-in procedures - a generalized model

Burn-in is a manufacturing technique that is intended to eliminate early failures. In this paper, burn-in procedures for a general failure model are considered. There are two types of failure in the general failure model. One is Type I failure (minor failure), which can be removed by a minimal repair or a complete repair; and the other is Type II failure (catastrophic failure), which can be removed only by a complete repair. During the burn-in process, two types of burn-in procedures are considered. In Burn-In Procedure I, the failed component is repaired completely regardless of the type of failure; whereas, in Burn-In Procedure II, only minimal repair is done for the Type I failure, and a complete repair is performed for the Type II failure. Under the model, various additive cost functions are considered. It is assumed that the component before undergoing the burn-in process has a bathtub-shaped failure rate function with the first change point t/sub 1/, and the second change point t/sub 2/. The two burn-in procedures are compared in cases when both the procedures are applicable. It is shown that the optimal burn-in time b/sup */ minimizing the cost function is always before t/sub 1/. It is also shown that a large initial failure rate justifies burn-in, i.e., b/sup */>0. The obtained results are applied to some examples.     

An extended model for optimal burn-in procedures

In this paper, the problem of determining optimal burn-in time is considered under the general failure model. There are two types of failure in the general failure model. One is Type I failure (minor failure) which can be removed by a minimal repair, and the other is Type II failure (catastrophic failure) which can be removed only by a complete repair. In the researches on optimal burn-in, the assumption of a bathtub shaped failure rate function is commonly adopted. In this paper, upper bounds for optimal burn-in times are obtained under a more general assumption on the shape of the failure rate function, which includes the bathtub shaped failure rate function as a special case.     

A note on density model size testing

Let (F/sub k/)/sub k/spl ges/1/ be a nested family of parametric classes of densities with finite Vapnik-Chervonenkis dimension. Let f be a probability density belonging to F/sub k//sup */, where k/sup */ is the unknown smallest integer such that f/spl isin/F/sub k/. Given a random sample X/sub 1/,...,X/sub n/ drawn from f, an integer k/sub 0//spl ges/1 and a real number /spl alpha//spl isin/(0,1), we introduce a new, simple, explicit /spl alpha/-level consistent testing procedure of the hypothesis {H/sub 0/:k/sup */=k/sub 0/} versus the alternative {H/sub 1/:k/sup *//spl ne/k/sub 0/}. Our method is inspired by the combinatorial tools developed in Devroye and Lugosi and it includes a wide range of density models, such as mixture models, neural networks, or exponential families.     

Near-optimal depth-constrained codes

This note considers an n-letter alphabet in which the ith letter is accessed with probability p/sub i/. The problem is to design efficient algorithms for constructing near-optimal, depth-constrained Huffman and alphabetic codes. We recast the problem as one of determining a probability vector q/sup */=(q/sup *//sub 1/,...,q/sup *//sub n/) in an appropriate convex set, S, so as to minimize the relative entropy D(p/spl par/q) over all q/spl isin/S. Methods from convex optimization give an explicit solution for q/sup */ in terms of p. We show that the Huffman and alphabetic codes so constructed are within 1 and 2 bits of the corresponding optimal depth-constrained codes.     

Limitation of DC currents by YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au superconducting films

The limitation of dc fault currents is one of the issues for the development of dc networks or links. This paper shows for the first time the high potential of YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta//-Au bilayers for the design of dc current limiters. Such devices are based on the transition into the normal state of the superconducting YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// films above a current I/sup */>I/sub c/, where I/sub c/ is the critical current at the onset of dissipation. The study of the transition under current pulses shows that a thermally driven transition into the normal state can occur after a delay t/sub trans/. This duration is defined by the amplitude of the current pulse. For I/sup *//spl ap/3I/sub c/, this delay is less than 10 /spl mu/s. The abrupt transition into the normal state allows an efficient current limitation. A recovery of the superconducting state can also occur under current. This property can be extremely interesting for autonomous operation of a current limiter in an electrical network in case of transient over-currents coming from the starting of high-power devices.     

Nonalloyed ohmic contacts for p/sup +/-type in GaAs base layer in HBTs

Two new metallisation systems, Pd/Pt and Cr/Au, for nonalloyed ohmic contacts on p/sup +/-InGaAs have been compared with the Ti/Pt contact. The observed strong dependence of the contact resistivity on the metal is related to its work function. The lowest resistivities are achieved with Pd/Pt, e.g. 1.2*10/sup -6/ Omega cm/sub 2/ for p=1.7*/sup 19/ cm/sup -3/.<>     

New View on an Anisotropic Medium and Its Application to Transformation from Anisotropic to Isotropic Problems

The metric factor is defined as m(epsilon*/sub x/, epsilon*/sub y/, theta/sub x/) = /spl radic/ cos/sup 2/theta/sub x/ / epsilon*/sub x/ + sin/sup 2/theta/sub x/ / epsilon*/sub y/ in the radial direction, with the angle theta/sub x/ from the x axis being one of the principal axes in an anisotropic dielectric medium filling the two-dimensional space. The normalized metric factor is defined as n(epsilon*/sub x/, epsilon*/sub y/, theta/sub x/, beta) /spl equiv/ m(epsilon*/sub x/, epsilon*/sub y/, theta/sub x/) / m(epsilon*/sub x/, epsilon*/sub y/, beta) in the form normalized by the metric factor in the direction with the angle beta from the x axis. The effective path length d'/sub P1P2/ between the points P1 and P2 is defined as d'/sup P1P2/ = n(epsilon*/sub x/, epsilon*/sub y/, theta/sub x/, beta)d/sub P1P2/ where d/sub P1P2/ is the actual path length of the straight line P1P2 with the angle theta/sub x/ from the x axis. We propose the minimun principle of the effective path length for electric flux in the region with multilayered anisotropic media. It is applied to solving the electrostatic problem with two anisotropic media whose principal axes are different. We show by using the normalized metric factor that the anisotropic problem can be transformed into the isotropic problem.     

An optimal replacement policy for a three-state repairable system with a monotone process model

In this paper, a deteriorating simple repairable system with three states, including two failure states and one working state, is studied. Assume that the system after repair cannot be "as good as new", and the deterioration of the system is stochastic. Under these assumptions, we use a replacement policy N based on the failure number of the system. Then our aim is to determine an optimal replacement policy N/sup */ such that the average cost rate (i.e., the long-run average cost per unit time) is minimized. An explicit expression of the average cost rate is derived. Then, an optimal replacement policy is determined analytically or numerically. Furthermore, we can find that a repair model for the three-state repairable system in this paper forms a general monotone process model. Finally, we put forward a numerical example, and carry through some discussions and sensitivity analysis of the model in this paper.     

Nonintersecting subspaces based on finite alphabets

Two subspaces of a vector space are here called "nonintersecting" if they meet only in the zero vector. Motivated by the design of noncoherent multiple-antenna communications systems, we consider the following question. How many pairwise nonintersecting M/sub t/-dimensional subspaces of an m-dimensional vector space V over a field F can be found, if the generator matrices for the subspaces may contain only symbols from a given finite alphabet A/spl sube/F? The most important case is when F is the field of complex numbers C; then M/sub t/ is the number of antennas. If A=F=GF(q) it is shown that the number of nonintersecting subspaces is at most (q/sup m/-1)/(q/sup Mt/-1), and that this bound can be attained if and only if m is divisible by M/sub t/. Furthermore, these subspaces remain nonintersecting when "lifted" to the complex field. It follows that the finite field case is essentially completely solved. In the case when F=C only the case M/sub t/=2 is considered. It is shown that if A is a PSK-configuration, consisting of the 2/sup r/ complex roots of unity, the number of nonintersecting planes is at least 2/sup r(m-2)/ and at most 2/sup r(m-1)-1/ (the lower bound may in fact be the best that can be achieved).     

Low-operating-voltage integrated silicon light-emitting devices

A solution is presented for the fabrication of low-voltage, low-power (<4.25 V and <5 mW) silicon light-emitting devices (Si-LEDs), utilizing standard very large scale integration technology without any adaptation. Accordingly, they can be integrated with their signal processing CMOS and BiCMOS circuits on the same chip. This enables the fabrication of much needed all-silicon monolithic optoelectronic systems operated by a single supply. The structural details of two distinctly different line-patterned Si-LEDs are presented, composed of heavily doped n/sup +/p/sup +/ junctions, made by BiCMOS n/sup +/ sinker and PMOS p/sup +/ source/drain doped regions, respectively. Using this approach, other Si-LED structures can be designed to yield low- or high-voltage Si-LED operation as well. Light is emitted at low reverse bias as a result of quantum transitions of carriers, generated by field emission, as indicated by the low reverse breakdown voltage V/sub B/, the soft "knee" I-V characteristics and the negative temperature coefficient of V/sub B/. The optical performance data show that, at low reverse operating current I/sub R/, the overall emitted light intensity L is a nonlinear function of I/sub R/ and becomes linear at higher I/sub R/. A bell-shaped light spectrum is obtained, with an enhanced short wavelength and attenuated long-wavelength radiation, relative to that of avalanche Si-LEDs.     

Fabrication of V-grooved inner stripe GaAs-AlGaAs quantum-wire lasers

V-grooved inner stripe (VIS) GaAs-AlGaAs quantum-wire (QWR) lasers were successfully fabricated by, combining two-step metalorganic chemical vapor deposition (MOCVD) growth with a wet-etching technique. In order to achieve low threshold current density and high reliability, a conductive stripe width (W), a thickness (t/sub p-CBL/), and a doping concentration (n/sub p-CBL/) of the p-GaAs current-blocking layer (CBL) were determined to be W=1.2 /spl mu/m, t/sub p-CBL/=2 /spl mu/m, and n/sub p-CBL/=1/spl times/10/sup 18/ cm/sup -3/. The leakage currents passing through the CBL were also estimated using a modified P-SPICE. Thus far, a threshold current of 45 mA and an output power of 4 mW at 51 mA have been achieved under room-temperature pulsed operation for some devices with uncoated facets.     

Reliability Enhancement Through Optimal Burn-In

Burn-in is an important screening method used in predicting, achieving, and enhancing field reliability. Although electronics burn-in has been studied qualitatively, no comprehensive quantitative approach exists for determining optimal burn-in periods. This paper presents a cost-optimization model from a system viewpoint, with burn-in periods for the components as the decision variables. This model is applied to an electronic product recently developed which uses many ICs. State-of-the-art ICs have high early-failure rates and long infant mortality periods. Proper use of burn-in reduces early failure rates and reduces system deployment costs. The total cost to be minimized is formulated as a function of the mean costs of the component, device burn-in, shop repair, and field repair, which in turn are functions of the mean number of failures during and after burn-in. Component and system reliability are constraints that have to be satisfied. The early device failures are assumed to have a Weibull distribution. The formulated problem, with failure rates and cost factors, is optimized. Some basic properties of reliability and cost functions are discussed.     

InP/InGaAs double heterojunction bipolar transistors incorporating carbon-doped bases and superlattice graded base-collector junctions

High performance InP/InGaAs double heterojunction bipolar transistors (DHBTs) incorporating carbon-doped bases and graded base-collector junctions implemented using a short period superlattice were grown by gas source MBE (GSMBE). Base hole concentrations up to 1.6*10/sup 19/ cm/sup -3/ were obtained, using CCl/sub 4/ as the dopant source. Transistors with 2*10 mu m/sup 2/ emitters achieved f/sub t/ and f/sub max/ values up to 76 and 82 GHz, respectively. These devices demonstrate state of the art values of f/sub max/.<>     

Time domain adaptive integral method for surface integral equations

An efficient marching-on-in-time (MOT) scheme is presented for solving electric, magnetic, and combined field integral equations pertinent to the analysis of transient electromagnetic scattering from perfectly conducting surfaces residing in an unbounded homogenous medium. The proposed scheme is the extension of the frequency-domain adaptive integral/pre-corrected fast-Fourier transform (FFT) method to the time domain. Fields on the scatterer that are produced by space-time sources residing on its surface are computed: 1) by locally projecting, for each time step, all sources onto a uniform auxiliary grid that encases the scatterer; 2) by computing everywhere on this grid the transient fields produced by the resulting auxiliary sources via global, multilevel/blocked, space-time FFTs; 3) by locally interpolating these fields back onto the scatterer surface. As this procedure is inaccurate when source and observer points reside close to each other; and 4) near fields are computed classically, albeit (pre-)corrected, for errors introduced through the use of global FFTs. The proposed scheme has a computational complexity and memory requirement of O(N/sub t/N/sub s/log/sup 2/N/sub s/) and O(N/sub s//sup 3/2/) when applied to quasiplanar structures, and of O(N/sub t/N/sub s//sup 3/2/log/sup 2/N/sub s/) and O(N/sub s//sup 2/) when used to analyze scattering from general surfaces. Here, N/sub s/ and N/sub t/ denote the number of spatial and temporal degrees of freedom of the surface current density. These computational cost and memory requirements are contrasted to those of classical MOT solvers, which scale as O(N/sub t/N/sub s//sup 2/) and O(N/sub s//sup 2/), respectively. A parallel implementation of the scheme on a distributed-memory computer cluster that uses the message-passing interface is described. Simulation results demonstrate the accuracy, efficiency, and the parallel performance of the implementation.     

Improved Schottky barrier on n-Sb/sub 2/S/sub 3/ films chemically deposited with silicotungstic acid (solar cells)

The first fabrication of low cost Schottky barrier solar cells on chemically deposited polycrystalline n-Sb/sub 2/S/sub 3/ thin films is reported. It is observed that in the films deposited with silicotungstic acid and annealed, the Schottky barrier height ( phi /sub b/) of the Au/n-Sb/sub 2/S/sub 3/ junctions is considerably improved from 0.54 to 0.76 eV. The ideality factor n decreased from 2.32 to 1.08 and the reverse-saturation current density J/sub 0/ from 3.2*10/sup -6/ to 1.5*10/sup -9/ A cm/sup -2/. Under AM1 illumination, the improved diode exhibited a conversion efficiency of approximately 3%.<>     

A class of 1-generator quasi-cyclic codes

If R = F/sub q/[x/spl rceil/]/(x/sup m/ - 1), S = F/sub qn/[x]/(x/sup m/ - 1), we define the mapping a_(x) /spl rarr/ A(x) =/spl sigma//sub 0//sup n-1/a/sub i/(x)/spl alpha//sub i/ from R/sup n/ onto S, where (/spl alpha//sub 0/, /spl alpha//sub i/,..., /spl alpha//sub n-1/) is a basis for F/sub qn/ over F/sub q/. This carries the q-ray 1-generator quasicyclic (QC) code R a_(x) onto the code RA(x) in S whose parity-check polynomial (p.c.p.) is defined as the monic polynomial h(x) over F/sub q/ of least degree such that h(x)A(x) = 0. In the special case, where gcd(q, m) = 1 and where the prime factorizations of x/sub m/ 1 over F/sub q/ and F/sub qn/ are the same we show that there exists a one-to-one correspondence between the q-ary 1-generator quasis-cyclic codes with p.c.p. h(x) and the elements of the factor group J* /I* where J is the ideal in S with p.c.p. h(x) and I the corresponding quantity in R. We then describe an algorithm for generating the elements of J*/I*. Next, we show that if we choose a normal basis for F/sub qn/ over F/sub q/, then we can modify the aforementioned algorithm to eliminate a certain number of equivalent codes, thereby rending the algorithm more attractive from a computational point of view. Finally in Section IV, we show how to modify the above algorithm in order to generate all the binary self-dual 1-generator QC codes.     

Real impact of dynamic operation stress during burn-in on DRAM retention time

The burn-in (BI) mechanism in connection with the dynamic operation stress (DOS) has been investigated to examine the real impact on dynamic random access memory (DRAM) reliablity. In this paper, the wafer burn-in (WBI) method with equivalent screening efficiency as the package burn-in (PBI) is implemented by employing DOS. It is found that retention time degradation by BI stress in DRAM with potentially lethal defects is mainly attributed to DOS-induced hot carrier (HC) degradation of DRAM cell. Hot electrons injection in Si-SiO/sub 2/ interface brings about lots of interfacial states as well as the electrical field modification at the gate-overlapped region, causing the degradation of retention time. This is clarified by an anomalous threshold voltage (V/sub T/) shift, and an increase of gate-induced drain leakage (GIDL) after dc HC stress having the identical stress voltage as DOS. Moreover, it is proved that a WBI procedure with the relevant DOS can screen out weak bits effectively, compared to that with only static stress.     

Design and fabrication of RESURF MOSFETs on 4H-SiC(0001), (112~0), and 6H-SiC(0001)

Design and fabrication of lateral SiC reduced surface field (RESURF) MOSFETs have been investigated. The doping concentration (dose) of the RESURF and lightly doped drain regions has been optimized to reduce the electric field crowding at the drain edge or in the gate oxide by using device simulation. The optimum oxidation condition depends on the polytype: N/sub 2/O oxidation at 1300/spl deg/C seems to be suitable for 4H-SiC, and dry O/sub 2/ oxidation at 1250/spl deg/C for 6H-SiC. The average inversion-channel mobility is 22, 78, and 68 cm/sup 2//Vs for 4H-SiC(0001), (112~0), and 6H-SiC(0001) MOSFETs, respectively. RESURF MOSFETs have been fabricated on 10-/spl mu/m-thick p-type 4H-SiC(0001), (112~0), and 6H-SiC(0001) epilayers with an acceptor concentration of 1/spl times/10/sup 16/ cm/sup -3/. A 6H-SiC(0001) RESURF MOSFET with a 3-/spl mu/m channel length exhibits a high breakdown voltage of 1620 V and an on-resistance of 234 m/spl Omega//spl middot/cm/sup 2/. A 4H-SiC(112~0) RESURF MOSFET shows the characteristics of 1230 V-138 m/spl Omega//spl middot/cm/sup 2/.     

A high current gain 4H-SiC NPN power bipolar junction transistor

This work reports the development of high power 4H-SiC bipolar junction transistors (BJTs) by using reduced implantation dose for p+ base contact region and annealing in nitric oxide of base-to-emitter junction passivation oxide for 2 hours at 1150/spl deg/C. The transistor blocks larger than 480 V and conducts 2.1 A (J/sub c/=239 A/cm/sup 2/) at V/sub ce/=3.4 V, corresponding to a specific on-resistance (R/sub sp on/) of 14 m/spl Omega/cm/sup 2/, based on a drift layer design of 12 /spl mu/m doped to 6/spl times/10/sup 15/cm/sup -3/. Current gain /spl beta//spl ges/35 has been achieved for collector current densities ranging from J/sub c/=40 A/cm/sup 2/ to 239 A/cm/sup 2/ (I/sub c/=2.1 A) with a peak current gain of 38 at J/sub c/=114 A/cm/sup 2/.     

A high-speed 850-nm optical receiver front-end in 0.18-/spl mu/m CMOS

A high-speed optical interface circuit for 850-nm optical communication is presented. Photodetector, transimpedance amplifier (TIA), and post-amplifier are integrated in a standard 0.18-/spl mu/m 1.8-V CMOS technology. To eliminate the slow substrate carriers, a differential n-well diode topology is used. Device simulations clarify the speed advantage of the proposed diode topology compared to other topologies, but also demonstrate the speed-responsivity tradeoff. Due to the lower responsivity, a very sensitive transimpedance amplifier is needed. At 500 Mb/s, an input power of -8 dBm is sufficient to have a bit error rate of 3/spl middot/10/sup -10/. Next, the design of a broadband post-amplifier is discussed. The small-signal frequency dependent gain of the traditional and modified Cherry-Hooper stage is analyzed. To achieve broadband operation in the output buffer, so-called "f/sub T/ doublers" are used. For a differential 10 mV/sub pp/ 2/sup 31/-1 pseudo random bit sequence, a bit error rate of 5/spl middot/10/sup -12/ at 3.5 Gb/s has been measured. At lower bit-rates, the bit error rate is even lower: a 1-Gb/s 10-mV/sub pp/ input signal results in a bit error rate of 7/spl middot/10/sup -14/. The TIA consumes 17mW, while the post-amplifier circuit consumes 34 mW.