Si基外延Ge薄膜中残余应变的检测与分析

研究了Si衬底上外延Ge薄膜中的应变。在超高真空化学气相沉积系统中生长Ge薄膜,采用高精度X射线衍射(XRD)和拉曼散射光谱检测薄膜的组份和应变。结果表明,外延薄膜的组份为纯Ge,没有Si的扩散;Ge薄膜中存在少量应变。Ge薄膜XRD峰位和拉曼散射峰位的偏移是由残余应变引起的。定量计算了热膨胀失配引入的张应变和晶格失配引入的压应变与Ge薄膜生长参数的关系,张应变随着生长温度的升高而近似线性增加,压应变随着生长厚度的增加按反比例减小,Ge薄膜最终应变状态由两者共同决定。理论计算值与实验结果吻合良好。     

Molecular beam epitaxial growth of Si1−xGex/Si pseudomorphic layers using disilane and germanium

Molecular beam epitaxial growth of pseudomorphic Si_1−xGe_x/Si layers using disilane (Si₂H₆) and elemental germanium has been studied for the first time. It is found that at a fixed flow rate of Si₂H₆, the germanium content in the Si_1−xGe_x alloys is a function of the germanium cell temperature. Heterostructures and multi-quantum wells with good surface morphology, excellent crystalline quality, and abrupt interfaces are demonstrated, indicating little or no sourcerelated transient effects.     

Rapid thermal chemical vapor deposition of in-situ boron doped polycrystalline SIxGe1-x

In-situ doped polycrystalline Si_xGe_1-x (x = 0.7) alloys were deposited by rapid thermal chemical vapor deposition (RTCVD) using the reactive gases SiH₂Cl₂, GeH₄ and B₂H₆ in a H₂ carrier gas. The depositions were performed at a total pressure of 4.0 Torr and at temperatures 600° C, 650° C and 700° C and different B₂H₆ flow rates. The conditions were chosen to achieve high doping levels in the deposited films. Our results indicate negligible effect of B₂H₆ flow on the deposition rate. The depositions follow an Arrhenius type behavior with an activation energy of 25 kcal/mole. Boron incorporation in the films was found to follow a simple kinetic model with higher boron levels at lower deposition rates and higher B₂H₆ flow rates. As-deposited resistivities as low as 2 mΩ-cm were obtained. Rapid thermal annealing (RTA) in the temperature range 800-1000° C was found to reduce the resistivity only marginally due to the high levels of boron activation achieved during the deposition process. The results indicate that polycrystalline Si_xGe_1-x films can be deposited by RTCVD with resistivities comparable to those reported for in-situ doped polysilicon.     

Preparation,characterization and application of RF sputter deposited boron doped silicon dioxide thin films

We report the preparation of thin film boron doped silicon dioxide (also called borosilicate–glass or BSG) by RF magnetron and its use as a boron diffusion source, especially for shallow junctions. For this purpose, a sputtering target of BSG was prepared through conventional solid state reaction route. Deposition rates of sputter deposited BSG film at different sputtering parameters were studied. The presence of boron in the deposited film was confirmed by hot probe and sheet resistance techniques on silicon wafer following a diffusion step. The structural evaluation of BSG thin film was performed using Fourier Transform Infrared Spectroscopy (FTIR). Secondary Ion Mass Spectroscopy (SIMS) was used to measure the concentration profile of boron in the BSG film. The effect of sputtering parameters on boron concentration in the deposited BSG film was also studied. A p–n junction diode was fabricated using BSG thin film as diffusion source of boron. The junction depth was measured to be in the range of 0.06–1.0 µm for different sputtering and diffusion parameters.     

Reduced pressure and temperature epitaxial silicon CVD kinetics and applications

In the rapidly advancing VLSI technology the scaling of devices for higher density and better performance imposes new requirements on semiconductor materials and processes. The ability to grow thin Si epitaxial layers with sharp transition widths and of high crystallographic quality is essential for high speed technology. Using a Rapid Thermal Processing system we have studied the kinetic aspects of the most useful reacting gases like: silane, dichlorosilane and disilane. We have obtained significant results specific to the working temperatures (650 to 1100° C) and pressures (around 2 Torr). A comparative study of these systems will be presented in terms of growth rate, selectivity and defect production. We also show the feasibility of some devices and techniques where the thermal budget is of primary importance: (i) epitaxial silicon deposition on porous silicon; (ii) epitaxial silicon growth over the gate structure of a permeable base transistor and (iii) the selective deposition of TiSi₂ with no substrate consumption.     

Micro-raman characterization of molecular-beam epitaxial ge heterolayers on Si substrates

Molecular-beam epitaxial germanium heterolayers on silicon are characterized by micro-Raman spectroscopy. The samples are angle-lapped to probe the near-interface region. A small positive shift in the germanium phonon frequency is observed near the interface compared with the surface of the 1 μm thick layer. This indicates that the misfit stress is not relaxed completely in the as-grown layers. The samples are annealed at 700°C, a temperature higher than the growth temperature, and then the germanium peak shifts toward lower frequency near the interface. This would be due to both thermal stress and formation of an interfacial alloy layer by the interdiffusion. After annealing at 850°C, the germanium peak shifts downward further because of the interdiffusion, and the peak due to the Si−Ge vibration is clearly observed near the interface.     

Deposition,post-deposition annealing,and characterization of epitaxial Ge films grown on Si(100) by pyrolysis of GeH4

As a first step towards developing heterostructures such as GaAs/Ge/Si entirely by chemical vapor deposition, Ge films have been deposited on (100) Si by the pyrolysis of GeH₄. The best films are grown at 700° C and are planar and specular, with RBS minimum channeling yields of ≈4.0% (near the theoretical value) and defect densities of 1.3 x 10⁸ cm⁻². Variations of in-situ cleaning conditions, which affect the nature of the Si substrate surface, greatly affect the ability to get good epitaxial growth at 700° C. The majority of the defects found in the Ge films are extrinsic stacking faults, formed by dissociation of misfit and thermal expansion accommodation dislocations. The stacking fault density is not significantly reduced by post-deposition annealing, as is the case for the dislocations observed in MBE Ge films. It is suggested that lowering the CVD growth temperature through the use of high vacuum deposition equipment would result in dislocation defects like those of MBE films which could then be annealed more effectively than stacking faults. Films with defect densities equivalent to MBE Ge films (~2 x 10⁷ cm⁻²) could then probably be produced.     

采用低温缓冲层技术在Si衬底上生长高质量Ge薄膜

采用低温缓冲层技术,在Si衬底上生长了质量优良的Ge薄膜。利用原子力显微镜（AFM）、双晶X射线衍射（XRD）和拉曼散射等研究了薄膜的晶体质量。结果表明,由于无法抑制三维岛状生长,低温Ge缓冲层的表面是起伏的。然而,Ge与Si间的压应变几乎完全弛豫。当缓冲层足够厚时,后续高温Ge外延层的生长能够使粗糙的表面变得平整。在...     

Low-temperature processing of shallow junctions using epitaxial and polycrystalline CoSi2

Cobalt disilicide is grown epitaxially on (100) Si from a 15 nm Co/2 nm Ti bilayer by rapid thermal annealing (RTA) at 900°C. Polycrystalline CoSi₂ is grown on (100) Si using a 15 nm Co layer and the same annealing condition. Silicide/p⁺-Si/n-Si diodes are made using the silicide as dopant source:¹¹B⁺ ions are implanted at 3.5–7.5 kV and activated by RTA at 600–900°C. Shallow junctions with total junction depth (silicide plus p⁺ region) measured by high-resolution secondaryion mass spectroscopy of 100 nm are fabricated. Areal leakage current densities of 13 nA/cm² and 2 nA/cm² at a reverse bias of -5V are obtained for the epitaxial silicide and polycrystalline silicide junctions, respectively, after 700°C post-implant annealing.     

Growth and characterization of Si doped vapor phase epitaxial GaAs for mesfet

This paper describes the Si-doping of GaAs that was grown using the AsCl₃:H₂:GaAs, Ga Chemical vapor deposition process. The doping sources were AsCl₃:SiCl₄ liquid solutions which proved to be highly reproducible for Si doping within the range, 1×1O¹⁶ to 2×10¹⁹ cm^?3. Incorporation of Si into the GaAs apparently occurs under near equilibrium conditions. This point is considered in detail and the consequences experimentally utilized to grow n, n+ bilayers using a single AsCl₃:SiCl₄ doping solution. Si impurity profiles based upon differential capacitance and SIMS data are presented. These can be very abrupt for n, n⁺ structures with order of magnitude changes occurring within 500 Å. For the 1×10₁₆ to 8×l0¹⁸ cm^?3 doped samples the mobilities at 78 and 298°K are comparable to the higher values reported for GaAs thin films grown by CVD. Power FET devices made from this material have demonstrated an output density of 0.86 watts/mm at 10 GHz.     

SOI基外延纯Ge材料的生长及表征

利用超高真空化学气相沉积系统采用低温-高温两步法外延Ge材料.我们先在低温下生长硅锗作为过渡缓冲层利用其界面应力限制位错的传播,然后在低温下生长的纯锗层,接着高温生长纯锗,最后在SOI基上成功的外延出了高质量的纯锗层,测试结果表明厚锗层的晶体生长质量很好,芯片表面也很平整,表面粗糙度5.5nm.     

Nitrogen doped silicon films heavily boron implanted for MOS structures: Simulation and characterization

In this work we study the boron diffusion and its activation into recrystallized nitrogen doped silicon thin films (NIDOS) and we also discuss the influence of the chemical interaction between boron and nitrogen in NIDOS films. These films are deposited by low pressure chemical vapor (LPCVD) for the development of a P⁺ polysilicon gate for MOS structures. The reduction of boron diffusion with increasing nitrogen content is observed by SIMS profiles. SUPREM IV software is used in order to estimate the boron diffusion coefficients in NIDOS films. FTIR analyses show the appearance of a B–N complex whose density strongly depends on the annealing treatment in terms of temperature and duration. It is deduced through resistivity measurements and SEM observation that the formation of B–N complexes tends to degrade the electrical properties of polysilicon thin layers through the decrease of both electrically active boron and polycrystalline grains growth.     

Structural and electrical analysis of poly-Ge films fabricated by e-beam evaporation for optoelectronic applications

We have investigated the relationship between structural and electrical properties of Ge thin films deposited on single crystal silicon (100) substrates by electron beam evaporation at room temperature. Post-thermal annealing was applied to obtain poly-crystalline Ge thin films. The structural effects of the annealing temperature and annealing time on the crystallization of Ge films were analyzed using Raman and X-ray diffraction measurements. Raman and X-ray diffraction spectra revealed a structural evolution from amorphous to crystalline phase with increasing annealing temperature and annealing time. It was found that high quality poly-crystalline Ge films were obtained with crystallization ratio of 90% at an annealing temperarure of 500 °C following the crystallization threshold of 450 °C. Effects of structural ordering on the electrical properties were investigated through current-voltage characteristics of fabricated heterostructure devices (Ge/p-Si). Smooth cathode-anode interchange in the diode behavior has been clearly observed following the structural ordering as a function of annealing temperature in a systematic way. These outcomes could be exploited for engineering of low-cost Ge based novel electronic and opto-electronic devices.     

外延生长的Gd掺杂CeO2薄膜内位错的透射电子显微学表征

利用脉冲激光沉积（ pulsed laser depositon, PLD）方法在YSZ（ Y2 O3 stabilised zirconia）单晶衬底上外延生长了Gd掺杂的CeO2薄膜（gadolinium doped CeO2,GDC）。利用透射电子显微镜（TEM）对GDC／YSZ界面以及GDC薄膜内部的位错结构进行了表征。实验发现,界面处存在周期性分布的失配位错,界面失配主要通过失配位错释放。 GDC薄膜内部存在两种不同的位错,其中一种为纯刃型位错,另外一种为混合型位错。     

Growth by CVT and characterization of Hg1-xCdxTe epitaxial layers

Single crystal epitaxial layers of Hg_1-x Cd _x Te were grown on CdTe substrates employing the chemical vapor transport technique. Different growth temperatures, substrate orientations, and various pressures of Hgl₂ as a transport agent were used while the source materials had a fixed composition ofx = 0.2. The epilayers are of nearly uniform composition to a depth of about one-half of the layer thickness. Chemical etching of the as-grown epilayers revealed low etch pit densities in the range of 10³–10⁴ cm⁻². Rectangle-shaped etch pits are observed for the first time on the (100) oriented epilayers of this material. The growth temperature and Hgl₂ pressure used for the growth experiments have significant effects on the layer morphology and composition.     

外延CeO2高k栅介质层的结构及介电性能

利用脉冲激光沉积两步生长法在Si(111)衬底上制备了厚度为10～40nm的外延CeO<,2>薄膜,构建了Pt/CeO<,2>/Si MOS结构.研究了CeO<,2>薄膜的界面及介电性能,实验发现,界面处存在的电荷对MOS结构C-V特性的测量有较大影响,采用两步生长法制备的外延CeO<,2>薄膜在保持较大介电常数的同时...     

UHV/CVD法生长硅基低位错密度厚锗外延层

采用超高真空化学气相淀积系统,以高纯Si2 H6和GeH4作为生长气源,用低温缓冲层技术在Si(001)衬底上成功生长出厚的纯Ge外延层.对Si衬底上外延的纯Ge层用反射式高能电子衍射仪、原子力显微镜、X射线双晶衍射曲线和Ra-man谱进行了表征.结果表明在Si基上生长的约550nm厚的Ge外延层,表面粗糙度小于1nm,XRD双晶衍射曲线和Ra-man谱Ge-Ge模半高宽分别为530'和5.5cm-1,具有良好的结晶质量.位错腐蚀结果显示线位错密度小于5×105cm-2可用于制备Si基长波长集成光电探测器和Si基高速电子器件.     

UHV/CVD法生长硅基低位错密度厚锗外延层

采用超高真空化学气相淀积系统,以高纯Si2 H6和GeH4作为生长气源,用低温缓冲层技术在Si(001)衬底上成功生长出厚的纯Ge外延层.对Si衬底上外延的纯Ge层用反射式高能电子衍射仪、原子力显微镜、X射线双晶衍射曲线和Ra-man谱进行了表征.结果表明在Si基上生长的约550nm厚的Ge外延层,表面粗糙度小于1nm,XRD双晶衍射曲线和Ra-man谱Ge-Ge模半高宽分别为530'和5.5cm-1,具有良好的结晶质量.位错腐蚀结果显示线位错密度小于5×105cm-2可用于制备Si基长波长集成光电探测器和Si基高速电子器件.     

Stress and resistivity controls on in situ boron doped LPCVD polysilicon films for high-Q MEMS applications

addition, polysilicon thin films ported approaches avoid the high temperature annealing process (> 1000 ℃), and the promising properties of these films make them suitable for high-Q and high-f MEMS devices.     

应力和电阻率可控的适用于高品质因子MEMS器件的原位掺硼LPCVD多晶硅薄膜

The simultaneous control of residual stress and resistivity of polysilicon thin films by adjusting the deposition parameters and annealing conditions is studied. In situ boron doped polysilicon thin films deposited at 520 ℃ by low pressure chemical vapor deposition （LPCVD） are amorphous with relatively large compressive residual stress and high resistivity. Annealing the amorphous films in a temperature range of 600-800 ℃ gives polysilicon films nearly zero-stress and relatively low resistivity. The low residual stress and low resistivity make the polysilicon films attractive for potential applications in micro-electro-mechanical-systems （MEMS） devices, especially in high resonance frequency （high-f） and high quality factor （high-Q） MEMS resonators. In addition, polysilicon thin films deposited at 570 ℃ and those without the post annealing process have low resistivities of 2-5 mΩ·cm. These reported approaches avoid the high temperature annealing process （〉 1000 ℃）, and the promising properties of these films make them suitable for high-Q and high-f MEMS devices.