首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到20条相似文献,搜索用时 0 毫秒
1.
This paper discusses development, for the 240-GHz region, of whisker contacted diode mixers with LO powers between 10 and 50 µW. Mixer requirements for low parasitic diodes, situated in high-embedding impedance circuits are described and appropriate RF and IF circuit designs presented. A capacitive post RF matching circuit for a full-height waveguide is developed with superior bandwidth characteristics at high impedance levels and greater ease of fabrication than usual matching circuits in reduced height guide. Corroborating experimental results are presented for an X-band model and for a 235-GHz mixer.  相似文献   

2.
When an injection-locked oscillator is used to amplify a frequency division multiplexing-frequency modulation FDM-FM signal, second- and third-order distortions are found to exist. Explicit expressions are derived that give the signal-to-distortion ratio (NPR) as a function of the locking bandwidth, frequency offset, and various modulation parameters. These formulas are believed to be valid within the limits of the assumptions made.  相似文献   

3.
The introduction of a neutral RF signal to a nonlinear resistance diode mixer as a means of reducing the effects of undesired intermodulation is described.  相似文献   

4.
A technique is described which enables the large-signal current and voltage waveforms to be determined for a mixer diode. This technique is applicable to any configuration where the impedance seen by the diode at the local oscillator (LO) frequency and its harmonics is known.  相似文献   

5.
The colocation of high-power communication transmitters and sensitive receivers at a common site frequently causes radio frequency interference due to the generation of spurious intermodulation frequencies in the receiver mixer. These spurious frequencies result from the mixing of the transmitter frequencies with each other and with the receiver local oscillator in the receiver mixer. The problem treated in this paper is that of obtaining an analytical method of predicting the amplitudes of these spurious intermodulation frequencies having been given the amplitude of each of the frequencies at the mixer input.  相似文献   

6.
7.
该文以通信系统中常用的典型微波部件——同轴连接器为研究对象,基于混沌理论对获得的同轴连接器的无源互调(PIM)功率时间序列进行分析,验证了使用混沌理论预测无源互调的有效性.首先通过实验系统获得同轴连接器的3阶无源互调功率时间序列,并对得到的实验数据进行相空间重构,确定该时间序列的最佳嵌入维数m和延迟时间τ.然后,结合最佳嵌入维数和延迟时间,分别构建相图和使用小数据量法计算该时间序列的最大Lyapunov指数,从而从定性和定量角度验证了该无源互调功率时间序列具有混沌特性.在此基础上,基于获得的最大Lyapunov指数对该无源互调功率时间序列进行混沌预测,在最大可预测尺度范围内,理论预测值与实验值最大误差为2.61%,表明采用混沌方法预测无源互调功率效果较好.该文提出的使用混沌理论预测通信系统中微波部件无源互调功率的方法,为开展无源互调抑制技术研究,提高通信系统的性能提供了新思路.  相似文献   

8.
A mathematical model for the input‐output characteristic of an amplifier exhibiting gain expansion and weak and strong nonlinearities is presented. The model, basically a Fourier‐series function, can yield closed‐form series expressions for the amplitudes of the output components resulting from multisinusoidal input signals to the amplifier. The special case of an equal‐amplitude two‐tone input signal is considered in detail. The results show that unless the input signal can drive the amplifier into its nonlinear region, no gain expansion or minimum intermodulation performance can be achieved. For sufficiently large input amplitudes that can drive the amplifier into its nonlinear region, gain expansion and minimum intermodulation performance can be achieved. The input amplitudes at which these phenomena are observed are strongly dependent on the amplifier characteristics.  相似文献   

9.
In any frequency-division-multiple-access (FDMA) satellite communication system the control of intermodulation noise must be considered if all signals are amplified by a single nonlinear power amplifier in the satellite transponder. The subject of this paper is the use of Fourier-Bessel series expansion models in the prediction of the intermodulation performance of both traveling-wave-tube (TWT) amplifiers and solid-state class-C UHF amplifiers. Both theoretical and experimental results are described and compared. It is shown that in the case of the solid-state amplifiers a dynamic characteristic measurement technique must be used before reliable predictions can be achieved. A simple intermodulation noise reduction scheme is described for use with high-power efficient class-C solidstate amplifiers. It is demonstrated that a carrier-carrier-to-intermodulation noise power ratio improvement of 10 dB can be achieved with a minimal decrease in prime-power efficiency.  相似文献   

10.
This paper presents balanced circuit techniques for the reduction and cancellation of the dominating third-order intermodulation tion product generated by broad-band solid-state power amplifiers. These techniques are applicable to collocated transmitters where the interference enters through the output port of the transmitter. A rigorous derivation is presented to prove the validity of the intermodulation canceliation by using a quadrature-hybrid coupling scheme in a balanced circuit configuration. The results are valid for arbitrary nonlinear characteristics exhibited by general classes of amplifiers, as well as isolators.  相似文献   

11.
Tailoring of the doping profile is a powerful tool in reducing the intermodulation distortion (IMD) in GaAs power FET's. Reproducible and uniform preparation of the required profiles is a difficult task for epitaxial techniques. This shortcoming has motivated the present investigation of fabricating highly linear power FET's by ion implantation. An analytical divice model was developed for exploring the relationship between the active layer profile and the IMD. These calculations revealed a complex behavior in the variation of the distortion levels due to partial correlation between the contributions arising from nonlinear transconductance and output conductance. The device model was used to identify implant doses and energies for approaching an optimum active layer profile. Based on the results, a deep Se implant followed by a shallow compensating Be implant to reduce the doping level close to the surface was used in the device fabrication. The IMD of the transistors was measured by the two-tone method. Conventional epitaxial FET's with a flat doping profile were evaluated for comparison purposes. This comparison demonstrated that a 4-dB increase in the intercept point for the third-order intermodulation product can be realized by using the tailored implanted profile. The experiments demonstrated that the tuning conditions for maximum output power and minimum IMD are virtually identical for the implanted transistors, in contrast to the behavior of conventional devices with flat doping profiles. These performance advantages, coupled with the high levels of uniformity and reproducibility of doping parameters, show ion implantation to be a powerful technique in the fabrication of highly linear power FET's.  相似文献   

12.
Intermodulation interference arising from nonlinearities in braided coaxial cables at microwave frequencies is discussed. Detailed investigations have been carried out using a large number of commercially available and specially constructed cables to isolate and assess the relative contributions of different parameters of coaxial cables responsible for the generation of intermodulation products (IP's) at L-, S-, and C-band frequencies centered on 1.5, 3, and 5 GHz. Ambient temperature in the case of polythene dielectric cables and oxides on copper-wire braids affect considerably the IP's generated in a coaxial cable.  相似文献   

13.
高功率单频主振荡光纤功率放大器在相干合束、引力波传感器、自由空间光通信、测距、激光雷达、非线性频率转换等有广泛应用。综述了高功率单频主振荡光纤功率放大器的国内外研究进展,分析了高功率单频光纤放大器关键技术,如种子激光源、受激布里渊散射与放大自发辐射噪声的抑制技术,指出了千瓦量级的主振荡光纤功率放大器未来的研究方向。  相似文献   

14.
提出并设计了一种新型低速振荡器,利用MCU电路内部的主时钟对低速时钟进行测试并且自校准,在几乎不增加功耗的前提下可以大大提高低速振荡器的精度和稳定性。与常规的低速振荡器相比,该结构具有功耗低、精度高、稳定性好的优点。仿真结果表明,此电路结构符合设计预期。  相似文献   

15.
一种超低功耗RC振荡器设计   总被引:1,自引:0,他引:1  
胡安俊  胡晓宇  范军  袁甲  于增辉 《半导体技术》2018,43(7):489-495,516
基于SMIC 55 nm CMOS工艺,设计并制备了工作在1.2V电源电压下的超低功耗RC振荡器.该振荡器主要包括运算放大器、压控振荡器(VCO)、基准电流源、低温漂电阻和可修调开关电容以及非交叠时钟产生电路.该振荡器用工作在亚阈值区的运算放大器和VCO取代了传统单比较器型RC振荡器中的比较器,显著降低了功耗;用开关电容取代了充放电电容,并且将输出时钟的频率转换成了阻抗,与参考电阻进行比较.利用负反馈环路锁定了输出时钟信号频率,从而得到了稳定的时钟信号.测试结果表明,1.2V电源电压、27℃环境下,该RC振荡器的输出时钟信号频率为32.63 kHz,功耗为65 nW;在-10 ~ 100℃,其温度系数为1.95×10-4/℃;在0.7~1.8 V电源电压内,其电源电压调整率为3.2%/V.芯片面积为0.168 mm2.  相似文献   

16.
提出以矩形耦合振荡器阵列为本振阵列,分析了矩形耦合本振阵列的相位控制原理及方法,推导了耦合本振阵列稳定锁相同步时,本振阵列阵元间形成均匀的相位分布,且等相位差只与边界上振荡器的自由振荡频率有关。利用耦合本振阵列阵元间等相位差的这一属性,调节耦合本振阵列边界上的振荡器自由振荡频率,改变耦合本振相邻阵元的等相位差,实现波达方向估计。文中对波达估计算法进行了计算机仿真,验证了其理论分析结果,为注频锁相耦合振荡器阵列应用于天线接收技术提供有力的理论基础。  相似文献   

17.
本文提出了一种利用测量AM-AM、AM-PM特性对微波GaAsFET大信号建模的方法.此外,利用测量或理论求得的AM-AM、AM-PM非线性特性,可进一步分析放大器的增益、互调性能,避免多音(射频)激励下进行测量或理论分析的麻烦.结果表明,理论与实验甚为一致.  相似文献   

18.
In RF amplifiers used in the front ends of VHF receivers which are to be tuned over a wide frequency range, varactor diodes are often used to accomplish the necessary change in tuning capacitance. nce. The variation of capacitance with dc voltage which enables the tuning function to be accomplished results in a nonlinear characteristic stic which, in turn, introduces harmonic and intermodulation dtion.storon. This paper is concerned with the determination of tef12f 1-J2) intermodulation distortion product generated by the varactor diodes and modified by the characteristics of the input tuned circuit. Both third-order and "distortion-on-distortion" second-order intermodulation mechanisms are included in the calculation. An expression is presented for the magnitude of the (2f1-f2) intermodulation intercept which includes the effects of the characteristics of the tuned circuit and the various parameters used to characterize the varactor diode. Design considerations combining both the linear and the intermodulation ation performance of the input circuit are discussed, including design tradeoffs and interrelationships among the circuit parameters and performance variables. Illustrative calculations are given based on the characteristics of the MV3102 varactor diode.  相似文献   

19.
SCPC卫星通信系统中计算互调噪声功率谱的一种快速方法   总被引:1,自引:0,他引:1  
陆锐敏  甘仲民 《通信学报》1995,16(3):110-115
本文利用SCPC的特点,提出和推导了SCPC卫星通信系统中互调噪声功率的一种快速计算方法。对于1300个载波的SCPC系统,在普通的386/33PC机上,利用此法计算时间仅需15min,因此它对SCPC系统设计具有使用价值。  相似文献   

20.
一种基于DDS和PLL技术本振源的设计与实现   总被引:1,自引:2,他引:1  
现代频率合成技术正朝着高性能、小型化的方向发展,应用最为广泛的是直接数字式频率合成器(DDS)和锁相式频率合成器(PLL).介绍直接数字频率合成器和锁相环频率合成器的基本原理,简述用直接数字频率合成器(AD9954)和锁相环频率合成器(ADF4112)所设计的本振源的实现方案,重点阐述了系统的硬件实现,包括系统原理、主要电路单元设计等,并且对系统的相位噪声和杂散性能做了简要分析,最后给出了系统测试结果.  相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号