Ion-beam mixed ultra-thin cobalt suicide (CoSi2) films by cobalt sputtering and rapid thermal annealing

The influence of ion-beam mixing on ultra-thin cobalt silicide (CoSi₂) formation was investigated by characterizing the ion-beam mixed and unmixed CoSi₂ films. A Ge⁺ ion-implantation through the Co film prior to silicidation causes an interface mixing of the cobalt film with the silicon substrate and results in improved silicide-to-silicon interface roughness. Rapid thermal annealing was used to form Ge⁺ ion mixed and unmixed thin CoSi₂ layer from 10 nm sputter deposited Co film. The silicide films were characterized by secondary neutral mass spectroscopy, x-ray diffraction, tunneling electron microscopy (TEM), Rutherford backscattering, and sheet resistance measurements. The experi-mental results indicate that the final rapid thermal annealing temperature should not exceed 800°C for thin (<50 nm) CoSi₂ preparation. A comparison of the plan-view and cross-section TEM micrographs of the ion-beam mixed and unmixed CoSi₂ films reveals that Ge⁺ ion mixing (45 keV, 1 × 10¹⁵ cm⁻²) produces homogeneous silicide with smooth silicide-to-silicon interface.     

The effect of pulsed laser annealing on the nickel silicide formation

The pulsed laser annealing (PLA) is used to assist nickel silicide transformation for Schottky barrier height reduction and tensile strain enhancement and the effect of different laser power are investigated. In this report, a two-step annealing process which combine the conventional rapid thermal annealing with pulsed laser annealing is proposed to achieve a smooth silicon-rich NiSi_x interfacial layer on (1 0 0) silicon. With optimized laser energy, a 0.2 eV Schottky barrier height (SBH) modulation is observed from Schottky diode electrical characterization. Furthermore, PLA provides sufficient effective temperature during silicidation which also lead to increased tensile stress of silicide film than the two-step RTA silicide is also investigated. The SBH modulation and tensile stress enhancement benefits of PLA silicidation are considered as an alternative to the conventional rapid thermal annealing for ultra-scaled devices performance enhancement.     

Impact of surface preparation on nickel-platinum alloy silicide phase formation

Nickel based silicide films were prepared by annealing nickel-platinum layers deposited on n-doped Si substrates. We report on the evolution of the crystallography, the phase formation and the redistribution of contaminants on blanket wafers during silicide formation as a function of the silicon surface preparation prior to Ni(Pt) deposition. In situ argon sputtering etch creates a contamination layer which modifies phase texture during the formation of the first Ni silicide phases. Using remote pre-clean results in a predominant Ni₂Si phase with preferential grain orientation after a first anneal. After a second anneal, the monosilicide forms, regardless of what nickel rich silicide phase was initially formed and regardless of the surface preparation prior to metal deposition.     

The Application of Barrierless Metallization in Making Copper Alloy,Cu(RuHfN), Films for Fine Interconnects

In this study, films of a copper (Cu) alloy, Cu(RuHfN _x ), were deposited on silicon (Si) substrates with high thermal stability by co-sputtering copper and minute amounts of Hf or Hf/Ru in an Ar/N₂ gas mixture. The Cu(RuHfN _x ) films were thermally stable up to 720°C; after annealing at 720°C for 1 h, the thermal stability was great enough to avoid undesired reaction between the copper and the silicon. No copper silicide was formed at the Cu–Si interface for the films after annealing at 720°C for 1 h. The Cu(RuHfN _x ) films appear to be good candidate interconnect materials.     

Electrical and compositional properties of TaSi2 films

Tantalum silicide (TaSi₂) thin films were sputter deposited on p- and n-type silicon substrates using ultrapure TaSi₂ targets. The TaSi₂/Si samples were annealed in nitrogen or forming gas or oxygen containing steam at temperatures in the range of 400–900°C. The sheet resistances of TaSi₂/Si were measured by four-point probe before and after anneal. The structure of these films was investigated using x-ray diffraction (XRD) methods. It has been found that the sheet resistance decreases with the increase in annealing temperature and also with the increase in film thickness. X-ray diffraction patterns show changes in the morphological structure of the films. Oxidation characteristics of the film have been investigated in the temperature range of 400–900°C in oxygen containing steam ambient. The oxidation time ranged from 0.5 to 1.5 h. No oxide formation of the tantalum silicide films was observed in this investigation. This has been attributed to the high purity of TaSi₂ sputter targets used in the preparation of the films.     

Silicide formation in co-deposited TiSix layers: The effect of deposition temperature and Mo

The silicide reaction in co-deposited TiSi_x layers on single crystal and pre-amorphized Si has been studied in detail. Both the co-deposition ratio and the co-deposition temperature were found to have a strong effect on the formation of the C54-TiSi₂ phase in these films. An unusual dependence of the sheet resistance on the co-deposition ratio was observed for films deposited at room temperature and those deposited at 400°C: the C54-TiSi₂ phase forms more easily for layers deposited at 400°C in the co-deposition ranges x∼0 and x>1.5, while it forms more easily for layers deposited at room temperature in the co-deposition ratio range of x∼0.2–1.5. These dependencies are explained by the formation of crystalline silicide phase(s) with composition close to the co-deposition ratio. With a Si rich ratio, the C49-TiSi₂ phase forms at 400°C with very small grain size, which facilitates the C54-TiSi₂ phase formation. The initial reaction of Ti-rich layer deposited at 400°C involves the formation of metal rich silicide, which impedes the formation of the C54-TiSi₂ phase. An ultra-thin MoSi_2.0 layer (<0.5 nm) was found to promote the formation of the C54-TiSi₂ phase in layers co-deposited at room temperature, but it showed little effect on layers co-deposited on pre-amorphized substrates at elevated temperature.     

Amorphous chromium silicide formation in hydrogenated amorphous silicon

The interaction between thin films of hydrogenated amorphous silicon and sputter-deposited chromium has been studied. Following deposition of the chromium films at room temperature, the films were annealed over a range of times and temperatures below 350°C. It was found that an amorphous silicide was formed only a few nanometers thick with the square of thickness proportional to the annealing time. The activation energy for the process was 0.55±0.05 eV. The formation process of the silicide was very reproducible with the value of density derived from the thickness and Cr surface density being close to the value for crystalline CrSi₂ for all films formed at temperatures ≤300°C. The specific resistivity of the amorphous CrSi₂ was ≈600 μΩ·cm and independent of annealing temperature.     

Conductivity changes in tungsten silicide films due to rapid thermal processing

Several limitations of the polysilicon gate in VLSI have led to the development of a silicide/polysilicon material as all alternative to polysilicon. Recently, rapid thermal processing has been investigated for annealing such polycide films. We report here the electrical-conductivity changes during the process of rapid thermal annealing in CVD tungsten silicide films. It is shown that electrical resistivity initially increases due to changes in the silicon to tungsten ratio and then drops to about one-tenth of the initial value, thus suggesting a minimum time and power required for achieving low-resistivity tungsten silicide films in VLSI interconnections.     

Properties of tungsten oxide thin films formed by ion-plasma and laser deposition methods for MOSiC-based hydrogen sensors

Thin-film structures based on gas-sensitive tungsten oxide and catalytic platinum are fabricated by room-temperature deposition on a silicon carbide wafer using pulsed laser and ion-plasma methods. Oxide layer annealing in air to 600°C caused the formation of microstructured and nanostructured crystalline states depending on the deposition conditions. Structural differences affect the electrical parameters and the stability of characteristics. The maximum response to hydrogen is detected in the structure fabricated by depositing a low-energy laser-induced flow of tungsten atoms in oxygen. The voltage shift of the currentvoltage curves for 2% H₂ in air at 350°C was 4.6 V at a current of ∼10 μA. The grown structures’ metastability caused a significant decrease in the shift after long-term cyclic testing. The most stable shifts of ∼2 V at positive bias on the Pt contact were detected for oxide films deposited by ion-plasma sputtering.     

Titanium silicide/germanide formation on submicron features for high mobility SiGe channel field effect transistors

The formation of self-aligned Ti(Si_(1−x)Ge_(x))₂ on submicron lines is described. The silicide/germanide is formed by reacting sputtered Ti with epitaxially grown Si_(1−x)Ge_(x) of composition and thickness relevant to high mobility Si_(1−x)Ge_(x) channel field effect transistors. Ti(Si_(1−x)Ge_(x))₂ formation on narrow lines was carried out on phosphorous doped material, because of the well known difficulties of forming silicide on heavily n-doped silicon. A companion set of boron doped blanket films was also processed. The results show that the process temperature required for the minimization of silicide/germanide sheet resistance is reduced as compared to silicide formation on Si alone. However, the silicide/germanide films agglomerate with increased high temperature processing more easily than pure silicide. The thermal stability is degraded more for films with higher Ge content and is a strong function of dopant type. Silicide/germanide formation on phosphorous doped Si_(1−x)Ge_(x) layers with x = 10% have a line width dependence similar to silicide formation. Formation on phosphorous doped Si_(1−x)Ge_(x) layers with x = 27% display an inverse line width dependence, with higher overall sheet resistance. Formation of silicide/germanide on blanket films of boron doped Si_(1−x)Ge_(x) with x = 27% behaved similar to the formation of silicide on silicon.     

Selective deposition of TiSi2 on oxide patterned wafers using low pressure chemical vapor deposition

The selective deposition of titanium disilicide was investigated using a cold-wall, low pressure chemical vapor deposition (LPCVD) technique with silane and titanium tetrachloride as the silicon and titanium sources, respectively. In-situ hydrogen plasma effectively cleaned the silicon wafer surface for deposition of C54 TiSi₂ at 760‡ C with full selectivity. A new method using a plasma only at the beginning of the deposition of the silicide further decreased the temperature to 680‡ C without losing selectivity. The result was a fine grained film probably due to the enhanced nucleation rate of the silicide. Cross-sectional TEM studies showed that the silicide grew into the silicon substrate, suggesting significant silicon consumption. The silicon substrate, consequently, seems to play a major role in the silicide formation. Silane, on the other hand, plays a minor role as a silicon source but does act as a scavenger of HC1 in the gas or on the silicide surface.     

Ultra-shallow raised p+−n junctions formed by diffusion from selectively depositedIn-situ doped Si0.7Ge0.3

In this paper, a novel raised p⁺−n junction formation technique is presented. The technique makes use ofin- situ doped, selectively deposited Si_0.7Ge_0.3 as a solid diffusion source. In this study, the films were deposited in a tungsten halogen lamp heated cold-walled rapid thermal processor using SiCl₂H₂, GeH₄, and B₂H₆. The microstructure of the Si_0.7Ge_0.3 layer resembles that of a heavily defected epitaxial layer with a high density of misfit dislocations, micro-twins, and stacking faults. Conventional furnace annealing or rapid thermal annealing were used to drive the boron from thein- situ doped Si_0.7Ge_0.3 source into silicon to form ultra-shallow p⁺−n junctions. Segregation at the Si_0.7Ge_0.3/Si interface was observed resulting in an approximately 3:1 boron concentration discontinuity at the interface. Junction profiles as shallow as a few hundred angstroms were formed at a background concentration of 10¹⁷ cm⁻³.     

Surface Diffusion Controlled Formation of Nickel Silicides in Silicon Nanowires

Nickel silicide/silicon contacts used in field-effect transistors (FET) based on silicon nanowires (SiNWs) can be formed by thermally activated axial intrusion of nickel silicides into the SiNW from prepatterned nickel reservoirs located at both ends of the NWs. This method seems promising for future electronic applications. Transformation of the longitudinal NW segments into single-crystalline nickel silicides throughout the entire NWs bulk has been interpreted as evidence of a volume diffusion control process. However, the volume diffusion coefficients of nickel in Ni₂Si at 300°C to 400°C are inconsistent with observable nickel silicide intrusion lengths. The experimental results published so far show a distinct dependence of nickel silicide intrusion length on the silicon NW diameter, which is indicative of a surface diffusion or a surface reaction controlled process. In this work, this problem was considered theoretically in the framework of a model of a diffusion-controlled phase formation. Diffusion growth of a wedge-like new phase in a cylindrical NW was described using a quasistationary approximation. The rate of longitudinal growth depends on the NW radius, R, and decreases with the radius increase as ~R ^−0.75. The dependence of R on annealing time, t, is close to t ^0.5. The profile of the new phase was described for different combinations of two dimensionless parameters: R/δ and D _γ/D _sγ, where δ is the thickness of the high-diffusivity surface layer with diffusion coefficient D _sγ, and D _γ is the volume diffusion coefficient. After the formation of a continuous layer of a new phase, further growth is controlled exclusively by the interface diffusion of Ni along the nickel silicide surface and Si/Ni₂Si interface. The growth kinetics depends on the ratio of diffusion coefficients D _sγ/D _b, where D _b is the interface diffusion coefficient, and may be parabolic or linear. The calculated dependencies were compared with the published experimental results for nickel silicide formation in SiNWs. The analysis performed indicates that surface and interface diffusion of nickel play an important role in the formation of nickel silicides in NWs—a critical finding that should be considered in the design of SiNW FETs.     

Degradation pattern of thin HfO2 films on Si(100) under ultrahigh-vacuum annealing: An investigation by x-ray photoelectron spectroscopy and low-energy ion scattering

The evolution of microstructure and phase structure of ultrathin HfO₂ films on Si(100) under ultrahigh-vacuum annealing is investigated in situ by x-ray photoelectron spectroscopy (XPS) and low-energy ion scattering (LEIS). The onset temperature of degradation is found to depend on film thickness. It is established that, for HfO₂ (4 nm)/SiO₂ (1 nm)/Si(100) specimens, 5-min annealing at about 900°C causes silicon (LEIS evidence) to appear on the surface, the silicon being uncombined with oxygen or the metal (XPS evidence). A longer annealing at the same temperature produces HfSi_x; annealing at 950°C converts the entire HfO₂ film into polycrystalline silicide whose grains are partly oriented as the Si substrate. With respect to annealing in a low-oxygen environment, the experimental results support a model whereby the degradation of an ultrathin HfO₂ film starts with the formation of nanopores by clustering of oxygen vacancies, whose density increases sharply due to partial desorption of oxygen; HfO_x with x < 2 then forms in the vicinity of vacancy clusters. It is concluded that the formation of hafnium silicide, the end product of HfO₂ degradation, starts in Si surface areas at the bottom of nanopores.     

Low-temperature processing of shallow junctions using epitaxial and polycrystalline CoSi2

Cobalt disilicide is grown epitaxially on (100) Si from a 15 nm Co/2 nm Ti bilayer by rapid thermal annealing (RTA) at 900°C. Polycrystalline CoSi₂ is grown on (100) Si using a 15 nm Co layer and the same annealing condition. Silicide/p⁺-Si/n-Si diodes are made using the silicide as dopant source:¹¹B⁺ ions are implanted at 3.5–7.5 kV and activated by RTA at 600–900°C. Shallow junctions with total junction depth (silicide plus p⁺ region) measured by high-resolution secondaryion mass spectroscopy of 100 nm are fabricated. Areal leakage current densities of 13 nA/cm² and 2 nA/cm² at a reverse bias of -5V are obtained for the epitaxial silicide and polycrystalline silicide junctions, respectively, after 700°C post-implant annealing.     

Growth of WSi2 in phosphorous-implanted W/«Si» couples

The thermal reaction of rf-sputter-deposited tungsten films with a (100) silicon substrate is investigated by vacuum furnace annealing and rapid thermal annealing. An irradiation of the W/Si interface by a phosphorous ion beam at room temperature prior to annealing promotes a uniform interfacial growth of WSi₂. The growth of WSi₂ follows diffusion-controlled kinetics during both furnace annealing and rapid thermal processing. A growth law of x² = kt is obtained for furnace annealing between 690 and 740° C, where x is the thickness of the compound, t is the annealing duration after an initial incubation period and k = 62 (cm²/s) exp (−-3.0 eV/kT). The surface smoothness of the suicide films improves with increasing ion dose.     

Anomalous scaling effect of tungsten/titanium nitride/titanium to silicon electrical contact resistance for subquarter micron microelectronic devices

This paper reports the anomalous scaling effect of tungsten/titanium nitride/titanium to (a) n+ and (b) p+ silicon electrical contact resistance in dynamic random access memory (DRAM) devices, upon post heat treatment following rapid thermal silicidation annealing. The electrical measurements on contacts of sizes ranging from 0.54 μm to 0.18 μm reveal that the increase in resistance becomes larger as the contact size decreases. Transmission electron microscopy (TEM) results show that the silicide film agglomeration proceeds more severely as the contact size decreases. To explain the size-dependent degradation of the contact resistance, numerical simulation of the shape evolution of the silicide film is performed. The results show that the poor film coverage, especially at the edge, accelerates the reduction rate in contact area.     

Laser processing of TiSi2 and CoSi2 thin films on silicon (100) substrates

We have investigated the formation of TiSi₂ and CoSi₂ thin films on Si(100) substrates using laser (wave length 248 nm, pulse duration 40 ns and repetition rate 5 Hz) physical vapor deposition (LPVD). The films were deposited from solid targets of TiSi₂ and CoSi₂ in vacuum with the substrate temperature optimized at 600° C. The films were characterized using x-ray diffraction, scanning electron microscopy (SEM), transmission electron microscopy (TEM) and four point probe ac resistivity. The films were found to be polycrystalline with a texture. The room temperature resistivity was found to be 16 μΩ-@#@ cm and 23 μΩ-cm for TiSi₂ and CoSi₂ films, respectively. We optimized the processing parameters so as to get particulate free surface. TEM results show that the silicide/silicon interface is quite smooth and there is no perceptible interdiffusion across the interface.     

Selective silicon epitaxial growth on a submicrometer WSi2 grating: Application to the permeable base transistor

We report the silicon epitaxial growth on top of a tungsten disilicide grating using a rapid thermal processing, low pressure chemical vapor deposition reactor. The epitaxial growth of silicon is shown to proceed two dimensionally from the Si surface without reaction with the underlying WSi₂ grid. Both lateral diffusion over WSi₂ of Si adsorbed species and vertical diffusion of Si through the silicide film are shown to occur with respective weight depending on the width of the WSi₂ lines. This allows silicon selective growth on patterned Si/WSi₂ structure for grating periodicity below 1 μm. Preliminary electrical measurements of the Si/WSi₂/Si overgrown permeable base transistor (PBT) thus fabricated are presented, showing current densities J_max of up to 6000 A/cm² and transconductancesg _m of 5 mS/mm.     

MOCVD fluorine free WSix metal gate electrode on high-k dielectric for NMOS technology

We report material and electrical properties of tungsten silicide metal gate deposited on 12 in. wafers by chemical vapor deposition (CVD) using a fluorine free organo-metallic (MO) precursor. We show that this MOCVD WSi_x thin film deposited on a high-k dielectric (HfSiO:N) shows a N+ like behavior (i.e. metal workfunction progressing toward silicon conduction band). We obtained a high-k/WSi_x/polysilicon “gate first” stack (i.e. high thermal budget) providing stable equivalent oxide thickness (EOT) of ∼1.2 nm, and a reduction of two decades in leakage current as compared to SiO₂/polysilicon standard stack. Additionally, we obtained a metal gate with an equivalent workfunction (EWF) value of ∼4.4 eV which matches with the +0.2 eV above Si midgap criterion for NMOS in ultra-thin body devices.