5Gb/s单片集成GaAs MSM/PHEMT 850nm光接收机前端

采用0.5μm GaAs PHEMT工艺研制出了一种单片集成850nm光接收机前端,它包括金属-半导体-金属(MSM)光探测器和分布放大器.探测器光敏面积为50μm×50μm,电容为0.17pF,4V偏压下的暗电流小于17nA.分布放大器-3dB带宽接近20GHz,跨阻增益约46dBΩ;在50MHz～16GHz范围内,输入、输出电压驻波比均小于2;噪声系数在3.03～6.5 dB之间.光接收机前端在输入2.5和5Gb/s非归零伪随机二进制序列调制的光信号下,得到较为清晰的输出眼图.     

5Gb/s单片集成GaAs MSM/PHEMT 850nm光接收机前端

采用0.5μm GaAs PHEMT工艺研制出了一种单片集成850nm光接收机前端,它包括金属-半导体-金属(MSM)光探测器和分布放大器.探测器光敏面积为50μm×50μm,电容为0.17pF,4V偏压下的暗电流小于17nA.分布放大器-3dB带宽接近20GHz,跨阻增益约46dBΩ;在50MHz～16GHz范围内,输入、输出电压驻波比均小于2;噪声系数在3.03～6.5 dB之间.光接收机前端在输入2.5和5Gb/s非归零伪随机二进制序列调制的光信号下,得到较为清晰的输出眼图.     

短波长OEIC光接收机前端设计及制作

基于国内的材料和工艺技术,研制出850 nm单片集成光接收机前端,集成形式包括PIN/TIA、PIN/DA、MSM/TIA和MSM/DA等.对光探测器和电路分别进行了研究和优化.通过Silvaco软件,建立了探测器器件模型,并通过实验数据验证.分布放大器-3 dB带宽接近20 GHz,跨阻增益约46 dBΩ,输入、输出驻波比均小于2,噪声系数在3.03～6.5 dB之间.跨阻前置放大器-3 dB带宽接近10 GHz,跨阻增益约43 dBΩ,输入、输出驻波比均小于3.5,噪声系数在4～6.5 dB之间.集成芯片最高工作速率达到5 Gb/s.     

基于标准BiCMOS工艺的1.5Gbit/s调节型共源共栅光接收机

基于IBM 0.18μm SiGe Bi CMOS标准工艺设计实现了一种高速、低功耗的光接收机前端模拟电 路。接收机芯片包括调节型共源共栅 (RGC) 跨阻放大器(TIA)、四级限幅放大器(LA)和 输出缓冲 电路(buffer)。采用高跨导SiGe异质结双极晶体管(HBT)作为输入级的RGC TIA有效隔离了 探测器结电容和输入寄生电容的影响,更好地拓展了光接收机的带宽。仿真结果表明,在1.8V电源电 压供电下,驱动50Ω电阻和10pF电容负载时 ,光接收机前端的跨阻增益为76.67dB带宽为2.1GHz 。 测试结果表明,光接收机前端电路的－3dB带宽为1.2GHz,跨阻增 益为72.2dB,在误码率(BER)为10－9的条件 下,光接收机实现了1.5Gbit/s的数据传输速率。在1. 8V电源电压 下,芯片功耗仅为44mW,芯片总面积为800 μm×370μm。     

一种850 nm单片集成光接收机前端

采用0.5μm GaAs PHEMT工艺和台面光刻互连工艺研制了一种850nm光接收机前端单片电路,包括金属-半导体-金属光探测器和跨阻前置放大器。探测器光敏面积约2000μm2,电容小于0.15pF,4V偏压下的暗电流小于14nA。跨阻前置放大器-3dB带宽接近10GHz,跨阻增益约43dBΩ。光接收机前端在输入2.5Gb/s非归零伪随机二进制序列调制的850nm光信号下得到较为清晰的输出眼图。     

基于标准BiCMOS工艺的1.5 Gbit/s调节型共源共栅光接收机

基于IBM 0.18μm SiGe BiCMOS标准工艺设计实现了一种高速、低功耗的光接收机前端模拟电路。接收机芯片包括调节型共源共栅(RGC)跨阻放大器(TIA)、四级限幅放大器(LA)和输出缓冲电路(buffer)。采用高跨导SiGe异质结双极晶体管(HBT)作为输入级的RGC TIA有效隔离了探测器结电容和输入寄生电容的影响,更好地拓展了光接收机的带宽。仿真结果表明,在1.8V电源电压供电下,驱动50Ω电阻和10pF电容负载时,光接收机前端的跨阻增益为76.67dB,-3dB带宽为2.1GHz。测试结果表明,光接收机前端电路的-3dB带宽为1.2GHz,跨阻增益为72.2dB,在误码率(BER)为10-9的条件下,光接收机实现了1.5Gbit/s的数据传输速率。在1.8V电源电压下,芯片功耗仅为44mW,芯片总面积为800μm×370μm。     

1Gb/s CMOS调节型共源共栅光接收机

基于特许0.35μm EEPROM CMOS标准工艺设计了一种单片集成光接收机芯片,集成了双光电探测器(DPD)、调节型共源共栅(RGC)跨阻前置放大器(TIA)、三级限幅放大器(LA,limiting amplifier)和输出电路,其中RGCTIA能够隔离光电二极管的电容影响,并可以有效地扩展光接收机的带宽。测试结果表明,光接收机的3dB带宽为821MHz,在误码率为10-9、灵敏度为-11dBm的条件下,光接收机的数据传输速率达到了1Gb/s;在3.3V电压下工作,芯片的功耗为54mW。     

基于GaAs E/D PHEMT工艺的单片集成光接收芯片

设计并实现了一款适用于广电混合光纤同轴电缆网络(HFC)的高增益单片集成光接收芯片,该芯片主要包括跨阻放大器(TIA)、衰减器(VVA)和输出放大器三部分.跨阻放大器采用差分结构,相较于单端TIA提高了噪声性能,衰减器采用相位相消方式实现信号衰减,输出放大器为芯片补足增益并实现阻抗匹配.使用ADS仿真软件进行电路设计、版图设计、仿真验证,采用GaAs 0.25μm E/D PHEMT工艺进行了流片.测试结果表明,芯片实现了42 dB的最大增益,在0～3V控制电压下,0～28 dB的连续可调增益范围,工作频率为50 MHz～1 GHz,差分输入单端输出,输出负载为75 Ω,芯片面积1 412 μm×1 207 μm,芯片性能符合设计目标.     

2.5Gb/s宽动态范围光接收机前端放大电路设计

基于UMC 0.18μm CMOS工艺,设计了一种2Gb/s传输速率的宽动态范围光接收机前端放大电路。采用对数放大器来增大接收机的输入动态范围,前置放大器采用差分共源跨阻放大器,并使用有源电感做负载来增大带宽。实验结果表明:该接收机前端电路的增益为80dB,3dB带宽为2.3GHz,2.5Gb/s输出眼图良好,输入动态范围为60dB(1μA～1mA)。     

InP基长波长单片集成光接收前端的设计和制备

叙述了利用InP基长波长pin光探测器和异质结双极晶体管(HBT)单片集成实现光接收前端的设计和制备方法.pin光探测器和HBT采用共享层结构,这样的结构不仅性能优于堆叠层结构,而且制备工艺兼容.制备的HBT截止频率达到30GHz,pin光探测器的3dB带宽达到了15GHz,集成光接收前端的3dB带宽达到3GHz,跨阻放大倍数达到800.     

Performance improvement in tensile-strained In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As metamorphic HEMT

This paper proposes a In/sub 0.5/Al/sub 0.5/As/In/sub x/Ga/sub 1-x/As/In/sub 0.5/Al/sub 0.5/As (x=0.3-0.5-0.3) metamorphic high-electron mobility transistor with tensile-strained channel. The tensile-strained channel structure exhibits significant improvements in dc and RF characteristics, including extrinsic transconductance, current driving capability, thermal stability, unity-gain cutoff frequency, maximum oscillation frequency, output power, power gain, and power added efficiency.     

Morphological and electrical characterization of SixCryCzBv thin films

Si_xCr_yC_zB_v thin films with several compositions have been studied for integration of high precision resistors in 0.8 μm BICMOS technology. These resistors, integrated in the back-end of line, have the advantage to provide high level of integration and attractive electrical behavior in temperature, for analog devices. The film morphology and the structure have been investigated through transmission electron microscopy analysis and have been then related to the electrical properties on the base of the percolation theory. According to this theory, and in agreement with experimental results, negative thermal coefficient of resistance (TCR) has been obtained for samples with low Cr content, corresponding to a crystalline volume fraction below the percolation threshold.Samples with higher Cr content exhibit, instead, a variation of the TCR as a function of film thickness: negative TCR values are obtained for thickness lower than 5 nm, corresponding to a crystalline volume fraction below the percolation threshold; positive TCR are obtained for larger thickness, indicating the establishment of a continuous conductive path between the Cr rich grains. This property seems to be determinant in order to assure the possibility to obtain thin film resistors almost independent on the temperature.     

Comparison between Pt/TiO2/Pt and Pt/TaOX/TaOY/Pt based bipolar resistive switching devices

Nonvolatile memories have emerged in recent years and have become a leading candidate towards replacing dynamic and static random-access memory devices. In this article, the performances of TiO₂ and TaO₂ nonvolatile memristive devices were compared and the factors that make TaO₂ memristive devices better than TiO₂ memristive devices were studied. TaO₂ memristive devices have shown better endurance performances (10⁸ times more switching cycles) and faster switching speed (5 times) than TiO₂ memristive devices. Electroforming of TaO₂ memristive devices requires~4.5 times less energy than TiO₂ memristive devices of a similar size. The retention period of TaO₂ memristive devices is expected to exceed 10 years with sufficient experimental evidence. In addition to comparing device performances, this article also explains the differences in physical device structure, switching mechanism, and resistance switching performances of TiO₂ and TaO₂ memristive devices. This article summarizes the reasons that give TaO₂ memristive devices the advantage over TiO₂ memristive devices, in terms of electroformation, switching speed, and endurance.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

Very low-noise Al/sub 0.3/Ga/sub 0.7/As/Ga/sub 0.65/In/sub 0.35/As/GaAs single quantum-well pseudomorphic HEMTs

AlGaAs/GaInAs/GaAs pseudomorphic HEMTs with an InAs mole fraction as high as 35% in the channel has been successfully fabricated. The device exhibits a maximum extrinsic transconductance of 700 mS/mm. At 18 GHz, a minimum noise figure of 0.55 dB with 15.0 dB associated gain was measured. At 60 GHz, a minimum noise figure as low as 1.6 dB with 7.6 dB associated gain was also obtained. This is the best noise performance yet reported for GaAs-based HEMTs.<>     

A 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode array

We report a 12 /spl times/ 12 In/sub 0.53/Ga/sub 0.47/As-In/sub 0.52/Al/sub 0.48/As avalanche photodiode (APD) array. The mean breakdown voltage of the APD was 57.9 V and the standard deviation was less than 0.1 V. The mean dark current was /spl sim/2 and /spl sim/300 nA, and the standard deviation was /spl sim/0.19 and /spl sim/60 nA at unity gain (V/sub bias/ = 13.5 V) and at 90% of the breakdown voltage, respectively. External quantum efficiency was above 40% in the wavelength range from 1.0 to 1.6 /spl mu/m. It was /spl sim/57% and /spl sim/45% at 1.3 and 1.55 /spl mu/m, respectively. A bandwidth of 13 GHz was achieved at low gain.     

Al/sub 0.3/Ga/sub 0.7/As/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) doped-channel field-effect transistors (DCFET's)

The properties of both lattice-matched and strained doped-channel field-effect transistors (DCFET's) have been investigated in AlGaAs/In/sub x/Ga/sub 1-x/As (0/spl les/x/spl les/0.25) heterostructures with various indium mole fractions. Through electrical characterization of grown layers in conjunction with the dc and microwave device characteristics, we observed that the introduction of a 150-/spl Aring/ thick strained In/sub 0.15/Ga/sub 0.85/As channel can enhance device performance, compared to the lattice-matched one. However, a degradation of device performance was observed for larger indium mole fractions, up to x=0.25, which is associated with strain relaxation in this highly strained channel. DCFET's also preserved a more reliable performance after biased-stress testings.<>     

Lanthanum diffusion in the TiN/LaOx/HfSiO/SiO2/Si stack

Band edge Complementary Metal Oxide Semiconductor (CMOS) devices are obtained by insertion of a thin LaO_x layer between the high-k (HfSiO) and metal gate (TiN). High temperature post deposition anneal induces Lanthanum diffusion across the HfSiO towards the SiO₂ interfacial layer, as shown by Time of Flight Secondary Ions Mass Spectroscopy (ToF-SIMS) and Atom Probe Tomography (APT). Fourier Transform Infrared Spectroscopy in Attenuated Total Reflexion mode (ATR-FTIR) shows the formation of La-O-Si bonds at the high-k/SiO₂ interface. Soft X-ray Photoelectron Spectroscopy (S-XPS) is performed after partial removal of the TiN gate. Results confirm La diffusion and changes in the La chemical environment.     

Highly linear Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMTs

We report an Al/sub 0.3/Ga/sub 0.7/N-Al/sub 0.05/Ga/sub 0.95/N-GaN composite-channel HEMT with enhanced linearity. By engineering the channel region, i.e., inserting a 6-nm-thick AlGaN layer with 5% Al composition in the channel region, a composite-channel HEMT was demonstrated. Transconductance and cutoff frequencies of a 1 /spl times/100 /spl mu/m HEMT are kept near their peak values throughout the low- and high-current operating levels, a desirable feature for linear power amplifiers. The composite-channel HEMT exhibits a peak transconductance of 150 mS/mm, a peak current gain cutoff frequency (f/sub T/) of 12 GHz and a peak power gain cutoff frequency (f/sub max/) of 30 GHz. For devices grown on sapphire substrate, maximum power density of 3.38 W/mm, power-added efficiency of 45% are obtained at 2 GHz. The output third-order intercept point (OIP3) is 33.2 dBm from two-tone measurement at 2 GHz.