共查询到20条相似文献,搜索用时 15 毫秒
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为合理利用机箱空间、减少电源芯片使用数量,提出了一种20片模数转换器(Analog-to-Digital Converter,ADC)芯片供电方案,既可减小不同频段ADC芯片因输入相同电源造成信号干扰的可能,也可减少低压差线性稳压器(Low Dropout Linear Regulator,LDO)的使用数量,充分利用电源芯片的供电能力,大大降低了模块开发成本。与传统电源方案相比,该方案中电源芯片使用数量减少一半,电源布局面积缩小60%。同时通过仿真可提前识别出其中一路LDO芯片输出的2.5 V电压在到达ADC芯片时未能达到ADC芯片输入的最小电压要求。结合静态压降公式提出3种优化方法,均可达到ADC芯片输入的最小电压要求。采用第2种优化方法,回板实测结果显示3个芯片接收到的电源电压差值为0.3 V,与仿真结果一致。 相似文献
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VTS雷达信号处理器的设计与实现 总被引:1,自引:1,他引:0
主要研究VTS(船舶交通管理)系统中的雷达信号处理系统。该系统采用基于DSP+CPLD机制的实时信号处理板,两片C6X系列的高性能DSP和一大片大规模逻辑器件,实现对原始的雷达视频信号的各种处理:电子地图屏蔽、双极点滤波、匹配滤波、STC(Sensitivity Time Control)、恒虚警以及雨杂波处理。充分发挥DSP处理的优越性,在各种噪声和杂波中快速而准确地提取出船舶的各种信息,实现港口船舶的实时探测、定位和显示,并生成各种信息的统计报告。该处理器实际使用效果良好。 相似文献
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The advent of silicon chips that operate at 3 V and combine both analog and digital circuitry is discussed, and the engineering issues associated with 3 V mixed signal design are examined. The use of mixed-signal circuitry in communications applications such as the Ethernet interface analog macrocell is considered. Mixed signal simulation and testing are discussed 相似文献
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The rapid expansion of the market in applications of the digital signal processor has unloosed a flood of diverse chips. Design engineers are being inundated with altogether too much information to absorb. Still, the problem does become more manageable once it is decided whether a fixed-point or a floating point math unit should be basic to the digital signal processor (DSP) to be used. Several factors should be taken into account. An important first step is to gain an understanding of how the hardware representations differ and how they affect precision and range. Also needed is a grasp of the types of applications to which particular chips are best suited and which hardware vendors provide these chips. Another consideration is the availability of good development tools and the programming paradigms they support. And finally, since performance is a driving factor behind the use of DSPs, cost, speed and power consumption are key ingredients 相似文献
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The basic characteristics of the light amplifying optical switch (LAOS) are explained. The LAOS, as compared to its electronic counterparts, will substantially reduce the interconnect time between components, chips, PC boards, and machines. The use of the LAOS to implement optical logic circuits with multiple input stages that invert and restore the input signal is discussed. Applications to image and signal processing are examined. Future uses are considered 相似文献
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Wing‐Ying Kwong 《ETRI Journal》2010,32(2):319-326
Photonics offers a solution to data communication between logic devices in computing systems; however, the integration of photonic components into electronic chips is rather limited due to their size incompatibility. Dimensions of photonic components are therefore being forced to be scaled down dramatically to achieve a much higher system performance. To integrate these nano‐photonic components, surface plasmon‐polaritons and/or energy transfer mechanisms are used to form plasmonic chips. In this paper, the operating principle of plasmonic waveguide devices is reviewed within the mid‐infrared spectral region at the 2 µm to 5 µm range, including lossless signal propagation by introducing gain. Experimental results demonstrate that these plasmonic devices, of sizes approximately half of the operating free‐space wavelengths, require less gain to achieve lossless propagation. Through optimization of device performance by means of methods such as the use of new plasmonic waveguide materials that exhibit a much lower minimal loss value, these plasmonic devices can significantly impact electronic systems used in data communications, signal processing, and sensors industries. 相似文献
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以ADI公司高性能浮点DSP芯片TS201为核心处理器,结合Xilinx公司VIRTEX-IIPRO系列FPGA芯片设计的2片DSP数据缓存板和4片DSP主处理板,设计了一种雷达信号处理机。该信号处理机中,DSP芯片仅用链路口完成相互间点对点的通信,各自的数据总线互补相连,存储器空间地址彼此独立。系统具有硬件结构体积小,程序易调试,整体可靠性高的优点。 相似文献
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在基于TVP5147和FPGA的高精度红外视频数据采集系统中,利用行同步信号HS、列同步信号VS、奇偶场信号FID和有效视频信号AVID进行视频采集,一般会造成采集与显示部分不能使用同一个时钟脉冲信号,以至于在不掉电进行视频切换时就会出现视频采集与显示无法同步的现象.介绍了一种基于VPO视频数据流解码来提取视频信号和时钟信号的视频采集方法.由于可使采集和显示部分使用同一个基准信号,该方法有效解决了视频切换时采集与显示不同步的问题,而且在自主研发的采集系统中取得了良好的使用效果. 相似文献
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In this study, DNA sequencing droplet trajectories are observed and analyzed using an application-specific integrated circuit system and a micro-electromechanical system structure jetting chip. We investigate a droplet jetting technique and apply it to biomedical test chips. This use of a sprayed chip structure can reduce sequencing time by two-thirds compared with traditional methods. The structure is a three-dimensional, multi-channel drive system that can control droplets more precisely. The circuit's input control signal was generated and placed on a chip based on the quantitative design of liquid droplets. Delay time and frequency were used to set the LED light sources. In this study, we would use frequencies of 4 kHz, 8 kHz, and 12 kHz combined with two groups of different orifices and frequencies for ink droplet outlet velocity. 相似文献
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采用大规模的TigerSHARC DSP高速并行信号处理板对吊放声呐信号处理系统进行设计与研究.该处理板共有8片ADSP-TS101芯片,整板采用共享外部总线和分布式并行处理相结合的网络互联结构,大大增强了DSP芯片之间的I/O吞吐量和处理速度,在设计中充分利用了ADSP-TS101芯片强大的Link口扩展功能,使各模... 相似文献
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O'Donnell M. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1988,76(9):1106-1114
The application of advanced VLSI circuits to medical imaging is explored. The relationship of both general-purpose signal processing chips and custom devices to medical imaging is discussed using examples of fabricated chips. In addition, advanced-aided design tools for silicon compilation are presented. Particular attention is given to the application of VLSI circuits to 3-D image display with ultrasound systems. It is concluded that devices built with these tools represents a possible alternative to custom devices and general-purpose signal processors for the next generation of medical imaging systems 相似文献
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介绍了一种高速数字信号处理平台的电源设计实现方案,主要是基于FPGA DSP的结构实现高速数字信号处理。该方案采用先进的FPGA,DA转换器和DSP芯片,通过对DSP芯片和FPGA芯片及DA芯片的正确供电和电源监控来实现具有通用性、可扩充性的硬件平台,并对电源设计中的多项关键参数进行分析与阐述。 相似文献
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Analog parallel signal processing systems, like cellular neural networks (CNN's), intrinsically have a high potential for perception-like signal processing tasks. The robust design of analog VLSI requires a good understanding of the capabilities as well as the limitations of analog signal processing. Implementation-oriented theoretical methods are described to compute the effect of all types circuit non-idealities with random or systematic causes on the static and dynamical behavior of CNN's and to derive specifications for the cell circuit building blocks. The fundamental impact of transistor mismatch on the trade-off between the speed, accuracy and power performance of CNN chips is demonstrated. A design methodology taking into account the effect of transistor mismatch is proposed and experimental results of a CNN chip implementation designed with this method are discussed. 相似文献
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Perfecto E.D. Ray S.K. Wassick T.A. Stoller H. 《Advanced Packaging, IEEE Transactions on》1999,22(2):129-135
In multichip modules (MCMs), engineering changes (EC) are required for both repair of defective chip to chip connections within the module, as well as modification of electrical connections for module performance optimization. With the recent use of complementary metal-oxide-semiconductor (CMOS) chips in IBM's latest generation of mainframe machines, EC design has been modified to accommodate chips with a much higher number of signal I/Os. Using the previous design methodology of connecting each signal C4 to an EC pad, a large area of the top surface of the module would be required for EC features. This would force increased chip-to-chip wiring length and impact module performance. In addition, larger size MCMs would be required, driving up cost. The new EC approach utilizes top surface thin film wiring in the X and Y directions, which is not pre-connected to any signal C4 pads. The approach used to make desired EC connections is described. New processes were developed to make micro-connections to customize an EC connection, CMOS based MCMs have more than 5× the signal I/Os per chip compared to bipolar devices. As a result of the evolution in EC technology, CMOS chip based MCMs have been successfully designed, built, tested and debugged quickly. They are being used in IBM's latest generation mainframe machines 相似文献