用于HBT的SiGe合金材料层的腐蚀工艺研究

探索利用反应离子刻蚀(RIE)和湿法腐蚀Si1-xGex合金材料的工艺条件.对两种腐蚀方法的利弊进行了对比,找出腐蚀Si1-xGex合金材料的实用化途径,并且解决了不同Ge含量的Si1-xGex合金材料的腐蚀速度控制.     

SiGe HBT器件特征参数的数值模拟与分析

分别在不同基极掺杂浓度、集电极掺杂浓度、发射极掺杂浓度和不同Ge组分含量的情况下,运用半导体器件模拟软件-MEDICI,对SiGe HBT器件的直流特性和频率特性进行了数值模拟,得出了SiGe HBT器件的集电极电流IC、基极电流IB、电流增益β和截止频率fT变化的初步规律.     

An efficient recursive procedure for evaluating the impedance matrix of linear and planar fractal arrays

The self-similar geometrical properties of fractal arrays are exploited in this paper to develop fast recursive algorithms for efficient evaluation of the associated impedance matrices as well as driving point impedances. The methodology is demonstrated by considering two types of uniformly excited fractal arrays consisting of side-by-side half-wave dipole antenna elements. These examples include a triadic Cantor linear fractal array and a Sierpinski carpet planar fractal array. This class of self-similar antenna arrays become significantly large at higher order stages of growth and utilization of fractal analysis allows the impedance matrix, and hence the driving point impedances, to be obtained much more efficiently than would be possible using conventional analysis techniques.     

Hot electron and hot hole degradation of UHV/CVD SiGe HBT's

We investigate the degradation in current gain and low-frequency noise of SiGe HBT's under reverse emitter-base stress due to hot electrons (forward-collector stress) and hot holes (open-collector stress). Contrary to previous assumptions we show that hot electrons and hot holes with the same kinetic energy generate different amounts of traps and hence have a different impact on device degradation. These results suggest that the accuracy of using forward-collector stress as an acceleration tool and reliability predictor must be carefully examined. We also present, for the first time, the effect of Ge profile shape on the reliability of SiGe HBT's, as well as discuss measurements on SiGe HBT's as a function of device geometry and temperature     

基于SiGe HBT的超宽带低噪声放大器的设计

结合超宽带(UWB)无线通信标准,给出了超宽带低噪声放大器(LNA)的设计思路.依据这个思想,并以高性能硅锗异质结双极型晶体管为核心,设计了一款超宽带低噪声放大器.采用安捷伦的ADS,对设计的放大器进行了仿真验证.结果表明,该放大器在3.1～6 GHz带宽内,S21高于11 dB,且变化不超过3 dB;S11和S22都在-15 dB以下;S12低于-20 dB;放大器的噪声系数在1.3～1.7 dB之间,群延时在整个频带内变化在15 ps左右,且在整个频带内无条件稳定.放大器良好的性能证明了提出的设计思想的正确性.     

Ionizing radiation tolerance and low-frequency noise degradation inUHV/CVD SiGe HBT's

The effect of ionizing radiation on both the electrical and 1/f noise characteristics of advanced UHV/CVD SiGe HBT's is reported for the first time. Only minor degradation in the current-voltage characteristics of both SiGe HBT's and Si BJT's is observed after total radiation dose exposure of 2.0 Mrad(Si) of gamma-radiation. The observed immunity to ionizing radiation exposure suggests that these SiGe HBT's are well suited for many applications requiring radiation tolerance. We have also observed the appearance of ionizing-radiation-induced generation-recombination (G/R) noise in some of these SiGe HBT's     

An electrical method for measuring the difference bandgap acrossthe neutral base in SiGe HBT's

This paper describes an electrical method for measuring the bandgap difference across the neutral base of SiGe heterojunction bipolar transistors (HBT's). It measures the effective bandgap difference due to differences in germanium concentration including the effects of heavy doping on bandgap reduction. Numerical device simulation was used to investigate the use of the proposed technique on high performance transistors with graded and uniform germanium profiles. Experimental verification of the technique is conducted on SiGe HBT devices fabricated using LPCVD     

Measurement of collector-base junction avalanche multiplicationeffects in advanced UHV/CVD SiGe HBT's

This paper presents measurements of the avalanche multiplication factor (M-1) in SiGe HBTs using a new technique capable of separating the avalanche multiplication and Early effect contributions to the increase of collector current with collector-base bias, as well as allowing safe measurements at practical current densities. The impact of collector doping, current density, Ge profile, and operation temperature are reported for the first time using measured and simulated results from a production quality UHV/CVD SiGe HBT technology. Limitations of the technique in the presence of significant self-heating are discussed. By turning on the secondary hole impact ionization, we revealed the difference in impact ionization between strained SiGe and Si in the presence of the “dead space” effect. Despite its smaller bandgap, the compressively strained SiGe layer shows an apparent decrease in the secondary hole impact ionization rate compared to Si     

Error reduction by linear constraints in recursive identification

The use of prior knowledge in the form of linear inequality constraints on the coefficients in recursive identification from short records is discussed. Enforcing steady-state-gain constraints through pseudo-observations is shown to produce useful reductions in mean-square estimation error.     

MBE生长的具有高β,f_T,和f_(max)值的Si/SiGe HBT

Si/SiGe异质结双极晶体管(HBT)已通过采用MBE生长一完整的层结构而制作成功。典型的基区杂质浓度为2×10~(19)cm~(-3),这远远地超过发射区的杂质浓度,结果薄层电阻为1kΩ/□左右。器件显示500V Early电压,室温下最大的电流增益为550,77K下上升到13000。制作在掩埋层衬底上的器件,其f_(max)为40GHz,这是已报道的Si/SiGe HBT的最大值。特征频率达42GHz,这是采用MBE生长的这类晶体管的最高值。     

Determination of the impedance matching domain of impedance matching networks

This paper investigates the impedance boundary of impedance matching networks analytically, graphically representing the resultant impedance matching domains. A set of explicit equations is derived to allow the rapid development of the impedance boundary of such networks. The equations are analyzed thoroughly, such that the impact each component has upon the resultant domain may be obtained. These equations are then developed further to provide a design procedure enabling a matching network to be designed to achieve impedance matching in a specific impedance domain given the source impedance and operating frequency.     

基区不均匀重掺杂对Si/SiGe/Si HBT基区渡越时间的影响

由于发射结（ＥＢ结）价带存在着能量差ΔＥｖ,电流增益β不再主要由发射区和基区杂质浓度比来决定,给ＨＢＴ设计带来了更大的自由度。为减小基区电阻和防止低温载流子冻析,可增加基区浓度。但基区重掺杂导致禁带变窄,禁带变窄的非均匀性产生的阻滞电场使基区渡越时间增加,退桦了频率特性,特别是在低温下更为严重。     

Role of thermal annealing on SiGe thin films fabricated by PECVD

Amorphous Silicon Germanium (a-SiGe) thin films of 500 nm thickness are deposited on silicon substrates using Plasma Enhanced Chemical Vapour Deposition (PECVD). To obtain polycrystalline nature of films, thermal annealing is done at various temperature (450–600 °C) and time (1–10 h). The surface morphology of the pre- and post-annealed films is investigated using scanning electron microscopy (SEM) and atomic force microscopy (AFM). The crystallographic structure of the film is obtained by X-ray diffraction method. Raman spectroscopy is carried out to quantify the Ge concentration and the degree of strain relaxation in the film. Nano-indentation is performed to obtain the mechanical properties of the film. It is found that annealing reduces the surface roughness of the film and increases the Ge concentration in the film. The grain size of the film increases with increase in annealing temperature. The grain size is found to decrease with increase in annealing time up to 5 h and then increased. The results show that 550 °C for 5 h is the critical annealing condition for variation of structural and mechanical properties of the film. Recrystallization starts at this condition and results in finer grains. An increase in hardness value of 7–8 GPa has been observed. Grain growth occurs above this critical annealing condition and degrades the mechanical properties of the film. The strain in the film is only relaxed to about 55% even for 10 h of annealing at 600 °C. Transmission Electron Microscopy (TEM) observations show that the strain relaxation occurs by forming misfit dislocations and these dislocations are confined to the SiGe/Si interface.     

Eliminating sensitivity to voltmeter impedance in DC measurements in a class of linear passive networks

The finite impedance of a voltmeter is a well-known source of error in voltage measurement. A multiple measurement method is presented to eliminate such error in a class of linear passive networks. Most practical cases come under this class.     

The invariance of the ratio of open- and short-circuit impedance in linear networks, and a relation for the reflection coefficient

It is shown that the invariance of the ratio of open- and short-circuit impedances of a linear two-port can be proved in a straightforward way using the scattering matrix. This leads also to an invariant relation concerning the reflection coefficient.     

Carbon-doped base GaAs-AlGaAs HBT's grown by MOMBE and MOCVDregrowth

High-quality GaAs-AlGaAs heterojunction bipolar transistors (HBTs) in which the carbon-doped base layers (p=10¹⁰-10²⁰ cm^-3, 400-800 Å thick) and Sn-doped collector and subcollector layers are grown by metalorganic molecular-beam epitaxy (MOMBE) and a subsequent regrowth using metalorganic chemical vapor deposition (MOCVD) is used to provide the n⁺ AlGaAs emitter and GaAs/InGaAs contact layers are discussed. A current gain of 20 was obtained for a base doping of 10¹⁹ cm^-3 (800 Å thick) in a 90-μm-diameter device, with ideality factors of 1.0 and 1.4 for the base-collector and emitter-base junctions, respectively, demonstrating the excellent regrowth-interface quality. For a base doping of 10²⁰ cm^-3 (400 Å thick), the current gain decreased to 8     

Driving-point impedance of a linear cylindrical antenna

A new approach is presented for evaluation of driving-point impedance, requiring only one component of the dyadic Green's function through replacement of the equivalent surface magnetic current at the aperture by an equivalent volume polarisation current. The analysis is applied to a cylindrical antenna at a general position between parallel plates.     

Minimizing thermal resistance and collector-to-substratecapacitance in SiGe BiCMOS on SOI

We describe a low fabrication cost, high-performance implementation of SiGe BiCMOS on SOL The use of high-energy implant allows the simultaneous formation of the subcollector and an additional n-type region below the buried oxide. The combination of buried oxide layer and floating n-type region underneath results in a very low collector-to-substrate capacitance. We also show that this process option achieves a much lower thermal resistance than using SOI with deep trench isolation, both reducing cost and curbing self-heating effects