Two-level switching pattern deadbeat DSP controlled PWM inverter

A two-level switching algorithm of the deadbeat controlled PWM inverter is presented. Two levels, instead of three levels, are used in the pulse pattern. This scheme allows the use of higher switching frequency for a given computation time delay, which results in lower total harmonic distortion (THD) at the output. Control algorithms are derived. The proposed control scheme is implemented using a TI TMS320C14 DSP controlling an inverter to produce a very low THD sinusoidal output voltage. Simulation and experimental results are presented to verify the performance     

Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple

This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.     

Four-wire dynamic voltage restorer based on a three-dimensional voltage space vector PWM algorithm

A modified voltage space vector pulse-width modulated (PWM) algorithm for a four-wire dynamic voltage restorer (DVR) is described. The switching strategy based on a three-dimensional (3-D) /spl alpha//spl beta/O voltage space is applicable to the control of three-phase four-wire inverter systems such as the split-capacitor PWM inverter and the four-leg PWM inverter. In contrast to the conventional voltage space vector PWM method, it controls positive, negative and zero sequence components of the terminal voltages instantaneously. Three 3-D modulation schemes are analyzed with respect to total harmonic distortion (THD), weighted total harmonic distortion (WTHD), neutral line ripple and switching loss over the whole range of the modulation index when the DVR experiences both balanced and unbalanced sags with phase angle jumps. Experimental results from a 9 kW DVR system using a split-capacitor PWM inverter are presented to validate the simulation results.     

Parallel resonant DC link circuit-a novel zero switching losstopology with minimum voltage stresses

A parallel resonant DC link (PRDCL) circuit topology is proposed as an approach to realizing zero switching loss DC-AC high switching frequency power conversion. The proposed circuit is used as an interface between the DC voltage supply and a voltage source pulse width modulated (PWM) inverter to provide a short zero voltage period in the DC link of the inverter to allow zero voltage switchings to take place in the PWM inverter. The peak voltage stress on the PWM inverter switches is limited to the DC supply voltage. Another significant advantage of the circuit is that the inverter can be controlled by the conventional PWM strategy. The proposed circuit is systematically analyzed and its operation principle is explained. Design considerations and design formulas are presented. A complete zero voltage switching DC-AC system consisting of the proposed circuit and a PWM inverter was simulated on a computer     

Space vector pulse width modulation of three-level inverter extending operation into overmodulation region

Multilevel voltage-fed inverters with space vector pulse width modulation have established their importance in high power high performance industrial drive applications. The paper proposes an overmodulation strategy of space vector PWM of a three-level inverter with linear transfer characteristic that easily extends from the undermodulation strategy previously developed by the authors for neural network implementation. The overmodulation strategy is very complex because of large number of inverter switching states, and hybrid in nature, that incorporates both undermodulation and overmodulation algorithms. The paper describes systematically the algorithm development, system analysis, DSP based implementation, and extensive evaluation study to validate the modulator performance. The modulator takes the command voltage and angle information at the input and generates symmetrical PWM waves for the three phases of an IGBT inverter that operates at 1.0 kHz switching frequency. The switching states are distributed such that the neutral point voltage always remains balanced. An open loop volts/Hz controlled induction motor drive has been evaluated extensively by smoothly varying the voltage and frequency in the whole speed range that covers both undermodulation and overmodulation (nearest to square-wave) regions, and performance was found to be excellent. The PWM algorithm can be easily extended to vector-controlled drive. The algorithm development is again fully compatible for implementation by a neural network.     

Real-Time Calculation of Switching Angles Minimizing THD for Multilevel Inverters With Step Modulation

Multilevel inverters have been widely applied in industries. A family of optimal pulsewidth modulation (PWM) methods for multilevel inverters, such as step modulation, can generate output voltage with less harmonic distortion than popular modulation strategies, such as the carrier-based sinusoidal PWM or the space vector PWM. However, some drawbacks limit the application of optimal PWM. One of such crucial drawback is that the optimal switching angles could not be calculated in real-time and one has to rely on lookup tables with precalculated angles. We propose a novel real-time algorithm for calculating switching angles that minimizes total harmonic distortion (THD) for step modulation. We give a mathematical proof that the output voltage has the minimum THD. We implemented the algorithm on a digital signal processor and provide experimental results that verify the performance of the proposed algorithm.      

A dual two-level inverter scheme with common mode voltage elimination for an induction motor drive

Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.     

Virtual stage pulse-width modulation technique for multilevelinverter/converter

The main theme of this paper is to present a new pulse-width modulation (PWM) technique for multilevel inverter/converter control, which provides more degrees of freedom for specifying the cost function than that for step modulation technique, for a given hardware. Therefore, the presented technique eliminates more specified low order harmonics without resorting to the increase of hardware. In comparison with the selective harmonic elimination PWM technique, for the same number of eliminated low order harmonics, the presented technique provides the advantages of both lower total harmonic distortion (THD) and less switching. Simulation and experimental results are presented to confirm the above-mentioned claims     

Prediction of 2-level PWM inverter efficiency using MATLAB/Simulink

This article proposes a direct approach for the prediction of inverter efficiency using MATLAB/Simulink, instead of an indirect loss calculation approach based on analytical models. In analytical approach, efficiency is obtained by calculating individual losses separately, such as switching losses, conduction losses and harmonic losses using analytical models. However, this approach requires accurate analytical models and complicated calculations, due to the variation in the switching frequency, switching transient and modulation techniques. In the proposed approach, the actual waveform of the inverter system is directly generated using MATLAB/Simulink. The instantaneous voltage and current waveform including switching transients are generated. Thus, the proposed approach is very simple and convenient for efficiency prediction. The proposed approach also works for any system parameters or control methods, such as various pulse-width modulation (PWM) techniques, different switching frequencies, switching devices and load types. The proposed approach can be adopted for the efficiency prediction of any switching strategies and any types of inverters such as neutral-point-clamped (NPC) inverters, H bridge inverters and H5 topology, since the topologies are modelled as circuits in the MATLAB/Simulink program and no analytical model is required for the proposed approach. Furthermore, the proposed approach can provide operation techniques and conditions such as PWM techniques and switching frequency that offer high efficiency. In this article, inverter performance is evaluated for various PWM techniques and switching frequencies. The PWM technique and switching frequency that offer high efficiency is obtained. Finally, the proposed approach is verified by experimental results.     

FM/PWM control scheme in class DE inverter

This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.     

A novel approach to practical matrix converter motor drive system with reverse blocking IGBT

This paper proposes a novel control strategy and a protection circuit and shows the advantage of utilizing a newly developed reverse blocking insulated gate bipolar transistor (RB-IGBT), to solve several practical problems of the matrix converter. The proposed control strategy is based on a virtual indirect control method with a virtual rectifier and a virtual inverter. Pulse-width modulated (PWM) pulses for the matrix converter are obtained by combining PWM pulses for the virtual rectifier and inverter. As a result, the control part of the input current and output voltage can be clearly separated. Thus, the conventional inverter control algorithms can be applied to the virtual inverter control. The advantage of this method is confirmed by experimental results with a 22-kW induction motor drive system. Good sinusoidal waveforms are obtained for the input and output currents, and the total harmonic distortion (THD) of the input and output current are 5.1% and 1.4%, respectively. The conduction loss of the RB-IGBT is decreased to about two-thirds of the conventional ac switch with series connection diode. Thus, the converter loss is about a half to the conventional PWM rectifier-inverter system with the same capacity. Furthermore, the protection problem is solved by a dynamic clamp method without an electrolytic capacitor. This protection circuit directly dissipates reactive load energy by dynamic clamp operation of an IGBT.     

A new pulse-width modulation (PWM) scheme for modular structured multilevel voltage source inverter

This work proposes a new switching scheme for a particular multilevel topology, known as the modular structured multilevel inverter (MSMI). The proposed scheme is based on symmetric regular sampled unipolar PWM, with multiple modulating waveforms and a single carrier. Mathematical equations that define the PWM switching instants are derived. These equations are suitable for digital implementation. An experimental five-level MSMI test-rig is built to implement the proposed algorithm. The derived equations are implemented by a low-cost fixed-point microcontroller. Several tests to quantify the performance of the inverter under the proposed modulation scheme are carried out.     

Natural Harmonic Elimination of Square-Wave Inverter for Medium-Voltage Application

In this paper, a low-frequency square-wave inverter with a series-connected pulsewidth modulation (PWM) inverter is investigated for high-power applications. The series compensators produce only the desired harmonic voltages to make the net output voltage sinusoidal with small PWM switching harmonics only. An open-loop control strategy for the series compensator is proposed in this paper. This strategy indirectly sets the compensator DC bus voltage to the desired level. No external DC source or active power at fundamental frequency is required to control this dc bus voltage. Different variations of this basic strategy are presented in this paper for medium-voltage applications. Theoretical analysis of this strategy is presented in this paper with simulation and experimental results.     

A robust hysteresis current-controlled PWM inverter for linear PMSMdriven magnetic suspended positioning system

Hysteresis current-controlled pulsewidth modulation (PWM) is very robust but it possesses nonconstant switching frequency, and it is difficult to use for high-performance position servo applications. This paper presents a robust hysteresis current-controlled PWM scheme for a magnetic suspended positioning system driven by an inverter-fed linear permanent-magnet synchronous motor having improved performance in these two areas. In the proposed control scheme, the conventional hysteresis PWM mechanism is augmented by a robust harmonic spectrum-shaping controller. The error signal, which represents the switching frequency deviated from the set one, is detected using a notching filter inverse model. Then, the current command is adjusted by a robust compensation signal. The hysteresis band can be equivalently varied to let the dominant harmonic frequency of inverter output be constant, wherein the frequency can easily be changed by tuning the center frequency of the notch filter. The gating signal of switches is not needed to be sensed for making the proposed control. The constant-frequency control performance yielded by the proposed controller is rather insensitive to the system disturbances and the neutral voltage variation due to isolated Y connection. Through applying the proposed PWM inverter, satisfactory position control requirements can be achieved by properly setting the dominant harmonic frequency according to the electromechanical model of the positioning system     

Improved PWM Control Strategy for Inverters and Induction Motor Drives

This paper develops a novel pulse-width modulation (PWM) strategy for application in uninterruptible power supply (UPS) and ac motor drive systems. The voltage/current harmonic spectra and other properties of this PWM scheme are thoroughly investigated. This modulation strategy is compared with other modulation techniques, especially with the commonly used sinusoidal modulation scheme, from the standpoints of simplicity, inverter switching losses, motor losses, and other output performance features. This novel modulation scheme produces an acceptable motor curent waveform while keeping the number of inverter commutations low. Implementation of this scheme is quite simple in hardware-based as well as microprocessor-based systems.     

Narrow Pulse Elimination PWM for Multilevel Digital Audio Power Amplifiers Using Two Cascaded H-Bridges as a Nine-Level Converter

This paper presents a methodology to reduce total harmonic distortion (THD) in digital audio power amplifiers, using two new approaches: 1) a multilevel converter made of two cascaded full-bridges, with suitable power supplies to operate as a nine-level hybrid type converter and 2) a new pulsewidth modulation (PWM) technique called narrow pulse elimination (NPE) PWM. The proposed nine-level converter uses only eight MOSFETs. Unlike conventional PWM, the NPE PWM does not generate excessively narrow pulses, so that power semiconductors nonideal delays and switching times are still negligible. Therefore, the nine-level output voltage THD, mostly introduced in the power stage, is strongly reduced. With the NPE technique, the resolution of the generated PWM is no longer limited by the switching speed of the output switches, but only by the frequency of digital processing circuit. Simulation and experimental results from a laboratory prototype are presented in order to show the effectiveness of the proposed approaches     

Active damping control of a high-power PWM current-source rectifier for line-current THD reduction

The use of active damping to reduce the total harmonic distortion (THD) of the line current for medium-voltage (2.3-7.2 kV) high-power pulsewidth-modulation (PWM) current-source rectifiers is investigated. The rectifier requires an LC filter connected at its input terminals, which constitutes an LC resonant mode. The lightly damped LC filter is prone to series and parallel resonances when tuned to a system harmonic either from the utility or from the PWM rectifier. These issues are traditionally addressed at the design stage by properly choosing the filter resonant frequency. This approach may result in a limited performance since the LC resonant frequency is a function of the power system impedance, which usually varies with power system operating conditions. In this paper, an active damping control method is proposed for the reduction in line current THD of high-power current-source rectifiers operating at a switching frequency of only 540 Hz. Two types of LC resonances are investigated: the parallel resonance excited by harmonic currents drawn by the rectifier and the series resonance caused by harmonic pollution in the source voltage. It is demonstrated through simulation and experiments that the proposed active damping control can effectively reduce the line-current THD caused by both parallel and series resonances.     

Switching frequency optimal PWM control of a three-level inverter

A pulse-width-modulation (PWM) method for the control of a three-level inverter is described. The switching frequency optimal-PWM method (SFO-PWM) works with a constant carrier frequency not synchronized with fundamental stator frequency. SFO-PWM gives an optimal utilization of the mean thyristor switching frequency permitted; therefore, PWM carrier frequency may be chosen to a value of two times the permitted mean thyristor switching frequency. The signal processing structure is simple. Many applications of three-level inverter work with a DC-link neutral point not stabilized from the power input converter. A neutral-point potential control is described, which is capable of stabilizing potential by varying the switching sequences of the three-level inverter itself. Results from computer simulation and practical experience show the good performance of SFO-PWM     

Two novel synchronized bus-clamping PWM strategies based on spacevector approach for high power drives

Two synchronized bus-clamping pulse width modulation (PWM) strategies based on the space vector approach are proposed for high-power induction motor drives. The two strategies together can produce PWM waveforms with any odd pulse number, preserving the waveform symmetries. The proposed strategies operate upto the six-step mode, maintaining the proportionality between the reference magnitude and the fundamental voltage generated throughout. These two strategies lead to lesser harmonic distortion as well as lesser peak current over the conventional space vector strategy (CSVS) in the high speed ranges of constant V/F drives. The reduction in the harmonic distortion over CSVS subject to a given maximum switching frequency (F_SW(MAX)) of the inverter is demonstrated theoretically as well as experimentally for F_SW(MAX)=750 Hz and 450 Hz, both with and without overmodulation. The best reduction in the distortion is as high as 30% to 50% in the different cases considered. Further, these two PWM strategies are also useful in reducing the switching frequency of the inverter over sine-triangle PWM and CSVS subject to an upper limit on the harmonic distortion     

级联型多电平逆变器中多载波PWM控制方法的改进

级联型多电平逆变器由于其模块化结构、便于生产高度、更换容易等特点，受到电力电子工程技术人员的广泛关注。本文通过对于级联型多电平逆变器几种典型的控制方法的分析比较，提出了一种改进多载波PWM控制方法。该方法通过改变载波的幅值，使级联逆变器的各个逆变单元开关规律相同，并使所有的开关器件的损耗一致，有利于逆变单元的统一设计和可靠运行。