High‐mobility self‐aligned top‐gate oxide TFT for high‐resolution AM‐OLED

High‐mobility and highly reliable self‐aligned top‐gate oxide thin‐film transistor (TFTs) were developed using the aluminum reaction method. Al diffusion to the oxide semiconductor and homogenization of the oxygen concentration in the depth direction after annealing were confirmed by laser‐assisted atom probe tomography. The high mobility of the top‐gate TFT with amorphous indium tin zinc oxide channel was demonstrated to be 32 cm²/V s. A 9.9‐in. diagonal qHD active‐matrix organic light‐emitting diode (AM‐OLED) display was fabricated using a five‐mask backplane process to demonstrate an applicable solution for large‐sized and high‐resolution AM‐OLEDs.     

Oxide‐TFT technologies for next‐generation AMOLED displays

Abstract— High‐mobility high‐reliability low‐RC‐delay oxide TFTs have been developed. Their performances are good enough for AMOLED displays even for the large‐sized super‐high‐resolution, or high‐frame‐rate displays. In this paper, the status of oxide‐TFT development and the issues for the mass‐production of next‐generation AMOLED displays will be discussed, and three types of AMOLED displays using different oxide materials and TFT structures will be demonstrated.     

Highly reliable oxide‐semiconductor TFT for AMOLED displays

Abstract— The stability and reliability of oxide‐semiconductor TFTs were investigated. The contact material to the oxide semiconductor affected the thermal stability of the TFT, and a molybdenum‐contact source/drain showed good stability. And the passivating film and TFT structure affected the stability against bias stress and humidity stress, and dc‐sputtered Al²O³ passivation and fully covered channel structure with an etching stopper or source/drain showed good reliability. Moreover, high photo‐stability was confirmed by the bias‐enhanced photo‐irradiation stress test. An 11.7‐in.‐diagonal qHD AMOLED display was demonstrated to provide an applicable solution for a large‐sized OLED and an ultra‐high‐definition LCD‐TV mass production.     

Characteristics improvement of top‐gate self‐aligned amorphous indium gallium zinc oxide thin‐film transistors using a dual‐gate control

In this work, we have reported dual‐gate amorphous indium gallium zinc oxide thin‐film transistors (a‐IGZO TFTs), where a top‐gate self‐aligned TFTs has a secondary bottom gate and the TFT integration comprises only five mask steps. The electrical characteristics of a‐IGZO TFTs under different gate control are compared. With the enhanced control of the channel with two gates connected together, parameters such as on current (I_ON), sub‐threshold slope (SS^?1), output resistance, and bias‐stress instabilities are improved in comparison with single‐gate control self‐aligned a‐IGZO TFTs. We have also investigated the applicability of the dual‐gate a‐IGZO TFTs in logic circuitry such as 19‐stage ring oscillators.     

Novel top‐gate zinc oxide thin‐film transistors (ZnO TFTs) for AMLCDs

Abstract— High‐performance top‐gate thin‐film transistors (TFTs) with a transparent zinc oxide (ZnO) channel have been developed. ZnO thin films used as active channels were deposited by rf magnetron sputtering. The electrical properties and thermal stability of the ZnO films are controlled by the deposition conditions. A gate insulator made of silicon nitride (SiN_x) was deposited on the ZnO films by conventional P‐CVD. A novel ZnO‐TFT process based on photolithography is proposed for AMLCDs. AMLCDs having an aperture ratio and pixel density comparable to those of a‐Si:H TFT‐LCDs are driven by ZnO TFTs using the same driving scheme of conventional AMLCDs.     

Amorphous‐oxide TFT backplane for large‐sized AMOLED TVs

Abstract— Amorphous‐oxide thin‐film‐transistor (TFT) arrays have been developed as TFT backplanes for large‐sized active‐matrix organic light‐emitting‐diode (AMOLED) displays. An amorphous‐IGZO (indium gallium zinc oxide) bottom‐gate TFT with an etch‐stop layer (ESL) delivered excel lent electrical performance with a field‐effect mobility of 21 cm²/V‐sec, an on/off ratio of >10⁸, and a subthreshold slope (SS) of 0.29 V/dec. Also, a new pixel circuit for AMOLED displays based on amorphous‐oxide semiconductor TFTs is proposed. The circuit consists of four switching TFTs and one driving TFT. The circuit simulation results showed that the new pixel circuit has better performance than conventional threshold‐voltage (VTH) compensation pixel circuits, especially in the negative state. A full‐color 19‐in. AMOLED display with the new pixel circuit was fabricated, and the pixel circuit operation was verified in a 19‐in. AMOLED display. The AMOLED display with a‐IGZO TFT array is promising for large‐sized TV because a‐IGZO TFTs can provide a large‐sized backplane with excellent uniformity and device reliability.     

Power saving through state retention in IGZO‐TFT AMOLED displays for wearable applications

We present a qHD (960 × 540 with three sub‐pixels) top‐emitting active‐matrix organic light‐emitting diode display with a 340‐ppi resolution using a self‐aligned IGZO thin‐film transistor backplane on polyimide foil with a humidity barrier. The back plane process flow is based on a seven‐layer photolithography process with a CD = 4 μm. We implement a 2T1C pixel engine and use a commercial source driver IC made for low‐temperature polycrystalline silicon. By using an IGZO thin‐film transistor and leveraging the extremely low off current, we can switch off the power to the source and gate driver while maintaining the image unchanged for several minutes. We demonstrate that, depending on the image content, low‐refresh operation yields reduction in power consumption of up to 50% compared with normal (continuous) operation. We show that with the further increase in resolution, the power saving through state retention will be even more significant.     

Circuits and AMOLED display with self‐aligned a‐IGZO TFTs on polyimide foil

A process to make self‐aligned top‐gate amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field‐effect mobility of 12.0 cm²/(V.s), sub‐threshold slope of 0.5 V/decade, and current ratio (I_ON/OFF) of >10⁷. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (?1.0 MV/cm) bias direction after extended stressing time of 10⁴ s. We achieve a stage‐delay of ~19.6 ns at V_DD = 20 V measured in a 41‐stage ring oscillator. A top‐emitting quarter‐quarter‐video‐graphics‐array active‐matrix organic light‐emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage (V_DD), the brightness of the display exceeds 150 cd/m².     

Letter: Mechanisms for on/off currents in dual‐gate a‐Si:H thin‐film transistors using indium‐tin‐oxide top‐gate electrodes

Abstract— Two types of dual‐gate a‐Si:H TFTs were made with transparent indium‐tin‐oxide (ITO) top‐gate electrodes of different lengths to investigate the static characteristics of these devices. By changing the length of the ITO top gate, we found that the variations in the on‐currents of these dual‐gate TFTs with dual‐gate driving are due to the high resistance of the parasitic intrinsic a‐Si:H regions between the back electron channel and the source/drain contact. In the off‐state of the dual‐gate‐driven TFTs, the Poole‐Frenkel effect is also enhanced due to back‐channel hole accumulation in the vicinity of the source/drain contact. Furthermore, we observed for the first time that under illumination the dual‐gate‐driven a‐Si:H TFTs exhibit extremely low photo‐leakage currents, much lower than that of single‐gate‐driven TFTs in a certain range (reverse subthreshold region) of negative gate voltages. The high on/off current ratio under backside illumination makes dual‐gate TFTs suitable devices for use as switching elements in liquid‐crystal displays (LCDs) or for other applications.     

Comparison of a‐Si and Poly‐Si for AMOLED displays

Abstract— The characteristics of OLED backplanes including the intrinsic properties of a‐Si TFTs and LTPS TFTs will be reviewed. While LTPS TFTs reveal satisfactory stability in AMOLED‐display applications, a‐Si AMOLEDs show better uniformity and are capable of driving OLEDs. However, the stability of a‐Si TFTs under long‐term operation is still unacceptable and remains to be the key issue constraining the commercialization of a‐Si TFT AMOLEDs.     

High‐mobility oxide TFT for circuit integration of AMOLEDs

Abstract— A high‐mobility and high‐reliability oxide thin‐film transistor (TFT) that uses In‐Sn‐Zn‐O (ITZO) as a channel material has been developed. The mobility was 30.9 cm²/V‐sec and the threshold voltage shift after 20,000 sec of a bias‐temperature‐stress (BTS) test (with a stress condition of Vg = 15 V, Vd = 15 V, and T = 50°C) was smaller than 0.1 V. In addition, a method of obtaining a stable enhancement‐type TFT, which realizes circuit integration for active‐matrix organic light‐emitting diode (AMOLED) displays has been developed.     

High refresh rate and low power consumption AMOLED panel using top‐gate n‐oxide and p‐LTPS TFTs

A pixel circuit and a gate driver on array for light‐emitting display are presented. By simultaneously utilizing top‐gate n‐type oxide and p‐type low‐temperature polycrystalline silicon (LTPS) thin‐film transistors (TFTs), the circuits provide high refresh rate and low power consumption. An active‐matrix LED (AMOLED) panel with proposed circuits is fabricated, and driving at various refresh rate ranging from 1 to 120 Hz could be achieved.     

Impact of source/drain contacts formation of self‐aligned amorphous‐IGZO TFTs on their negative‐bias‐illumination‐stress stabilities

In this study, we have compared the performance of self‐aligned a‐IGZO thin‐film transistors (TFTs) whereby the source/drain (S/D) region's conductivity enhanced in three different ways, that is, using SiN_x interlayer plasma (hydrogen diffusion), using calcium (Ca as reducing metal) and using argon plasma (changing the atomic ratio). All these TFTs show comparable characteristics such as field‐effect mobility (μ_FE) of over 10.0 cm²/(V.s), sub‐threshold slope (SS^‐1) of 0.5 V/decade, and current ratio (I_ON/I_OFF) over 10⁸. However, under negative‐bias‐illumination‐stress (NBIS), all these TFTs showed strong degradation. We attributed this NBIS stability issue to the exposed S/D regions and changes in the conductivity of S/D contact regions. The hydrogen plasma‐treated TFTs showed the worst NBIS characteristics. This is linked to increased hydrogen diffusion from the S/D contact regions to the channel.     

Novel a‐Si:H TFT pixel circuit for electrically stable top‐anode light‐emitting AMOLEDs

Abstract— A novel pixel circuit for electrically stable AMOLEDs with an a‐Si:H TFT backplane and top‐anode organic light‐emitting diode is reported. The proposed pixel circuit is composed of five a‐Si:H TFTs, and it does not require any complicated drive ICs. The OLED current compensation for drive TFT threshold voltage variation has been verified using SPICE simulations.     

Solution‐processed oxide semiconductors for low‐cost and high‐performance thin‐film transistors and fabrication of organic light‐emitting‐diode displays

Abstract— High‐performance solution‐processed oxide‐semiconductor (OS) thin‐film transistors (TFTs) and their application to a TFT backplane for active‐matrix organic light‐emitting‐diode (AMOLED) displays are reported. For this work, bottom‐gated TFTs having spin‐coated amorphous In‐Zn‐O (IZO) active layers formed at 450°C have been fabricated. A mobility (μ) as high as 5.0 cm²/V‐sec, ?0.5 V of threshold voltage (VT), 0.7 V/dec of subthreshold swing (SS), and 6.9 × 10⁸ of on‐off current ratio were obtained by using an etch‐stopper (ES) structure TFT. TFTs exhibited uniform characteristics within 150 × 150‐mm² substrates. Based on these results, a 2.2‐in. AMOLED display driven by spin‐coated IZO TFTs have also been fabricated. In order to investigate operation instability, a negative‐bias‐temperature‐stress (NBTS) test was carried out at 60°C in ambient air. The IZO‐TFT showed ?2.5 V of threshold‐voltage shift (ΔVT) after 10,800 sec of stress time, comparable with the level (ΔVT = ?1.96 V) of conventional vacuum‐deposited a‐Si TFTs. Also, other issues regarding solution‐processed OS technology, including the instability, lowering process temperature, and printable devices are discussed.     

Performance of high‐efficiency AMOLED displays

Abstract— In this paper, the performance of active‐matrix‐driven small‐molecule OLED displays incorporating high‐efficiency electrophosphorescent dopants were analyzed. These enable triplet excitons to contribute to light emission and have led to pixel efficiencies of over 40 lm/W. By considering a conventional two TFT per pixel addressing scheme, we show how this OLED design enables the fabrication of very‐low‐power‐consumption displays (lower than AMLCDs). We simulate display performance and perform a trade‐off analysis comparing the power consumption of displays driven by both amorphous‐silicon and low‐temperature poly‐Si TFTs.     

PECVD‐based nanocrystalline‐silicon TFT backplanes for large‐sized AMOLED displays

Abstract— A 14.1‐in. AMOLED display using nanocrystalline silicon (nc‐Si) TFTs has been developed. Nanocrystalline silicon was deposited using conventional 13.56‐MHz plasma‐enhanced chemical vapor deposition (PECVD). Detailed thin‐film characterization of nc‐Si films was followed by development of nc‐Si TFTs, which demonstrate a field‐effect mobility of about 0.6–1.0 cm²/V‐sec. The nc‐Si TFTs show no significant shift in threshold voltage when over 700 hours of constant current stress is applied, indicating a stable TFT backplane. The nc‐Si TFTs were successfully integrated into a 14.1‐in. AMOLED display. The display shows no significant current decrease in the driving TFT of the 2T‐1cap circuit because the TFTs are highly stable. In addition to the improved lifetime of AMOLED displays, the development of nc‐Si TFTs using a conventional 13.56‐MHz PECVD system offers considerable cost advantages over other laser and non‐laser polysilicon‐TFT technologies for large‐sized AMOLEDs.     

Experimental decomposition of the positive bias temperature stress‐induced instability in self‐aligned coplanar InGaZnO thin‐film transistors and its modeling based on the multiple stretched‐exponential functions

Decomposition of the positive gate‐bias temperature stress (PBTS)‐induced instability into contributions of distinct mechanisms is experimentally demonstrated at several temperatures in top‐gate self‐aligned coplanar amorphous InGaZnO thin‐film transistors by combining the stress‐time‐divided measurements and the subgap density‐of‐states (DOS) extraction. It is found that the PBTS‐induced threshold voltage shift (ΔV_T) consists of three mechanisms: (1) increase of DOS due to excess oxygen in the active region; (2) shallow; and (3) deep charge trapping in the gate insulator components. Corresponding activation energy is 0.75, 0.4, and 0.9 eV, respectively. The increase of DOS is physically identified as the electron‐capture by peroxide. Proposed decomposition is validated by reproducing the PBTS time‐evolution of I–V characteristics through the technology computer‐aided design simulation into which the extracted DOS and charge trapping are incorporated. It is also found that the quantitative decomposition of PBTS‐induce ΔV_T accompanied with the multiple stretched‐exponential models enables an effective assessment of the complex degradation nature of multiple PBTS physical processes occurring simultaneously. Our results can be easily applied universally to any device with any stress conditions, along with guidelines for process optimization efforts toward ultimate PBTS stability.     

Vt Compensated voltage‐data a‐Si TFT AMOLED pixel circuits

Abstract— Active‐matrix organic light‐emitting‐diode (AMOLED) displays are now entering the marketplace. The use of a thin‐film‐transistor (TFT) active matrix allows OLED displays to be larger in size, higher in resolutions and lower in power dissipation than is possible using a conventional passive matrix. A number of TFT active‐matrix pixel circuits have been developed for luminance control, while correcting for initial and electrically stressed TFT parameter variations. Previous circuits and driving methods are reviewed. A new driving method is presented in which the threshold‐voltage (V_t) compensation performance, along with various circuit improvements for amorphous‐silicon (a‐Si) TFT pixel circuits using voltage data, are discussed. This new driving method along with various circuit improvements is demonstrated in a state‐of‐the‐art 20‐in. a‐Si TFT AMOLED HDTV.     

Investigation of the hysteresis phenomenon of an a‐Si:H TFT at an elevated temperature for AMOLED displays

Abstract— The temperature dependence of the hysteresis of an a‐Si:H TFT has been investigated. An a‐Si:H TFT pixel driving scheme has been proposed and investigated. This scheme can eliminate changes in the organic light‐emitting diode (OLED) current caused by hysteresis of an a‐Si:H TFT. The VTH of the a‐Si:H TFT was changed according to the gate‐voltage sweep direction because of the hysteresis of the a‐Si:H TFT. The variation of VTH for a a‐Si:H TFT decreased from 0.41 to 0.17 V at an elevated temperature of 60°C because the sub‐threshold slope (s‐slope) of the a‐Si:H TFT, in the reverse voltage sweep direction, increased more than in the forward voltage sweep direction due to a greater increase in the initial electron trapped charges than the hole charges. Although the OLED current variation caused by hysteresis decreased (～14%) as the temperature increased, the error in the OLED current needed to be improved in order to drive the pixel circuit of AMOLED displays. The proposed pixel circuit can apply the reset voltage (?10 V) before the data voltage for the present frame that was written to fix the sweep direction of the data voltage. The variation in the OLED current caused by hysteresis of the a‐Si:H TFT was eliminated by the fixed voltage sweep direction in the proposed pixel circuit regardless of operating temperature.