Variable energy positron beam characterization of defects in as-grown and annealed low temperature grown GaAs

Variable energy positron annihilation measurements on as-grown and annealed GaAs grown by molecular beam epitaxy at temperatures between 230 and 350°C have been performed. Samples were subjected to either isochronal anneals to temperatures in the range 300 to 600°C or rapid thermal anneals to 700, 800, and 900°C. A significant increase in the S-parameter was observed for all samples annealed to temperatures greater than 400°C. The positron annihilation characteristics of the defect produced upon annealing are consistent with divacancies or larger vacancy clusters. The concentration of as-grown and anneal generated defects is found to decrease with increasing growth temperature.     

Rapid thermal annealing of ion implanted 6H-SiC by microwave processing

Rapid thermal processing utilizing microwave energy has been used to anneal N, P, and Al ion-implanted 6H-SiC. The microwaves raise the temperature of the sample at a rate of 200°C/min vs 10°C/min for conventional ceramic furnace annealing. Samples were annealed in the temperature range of 1400-1700°C for 2-10 min. The implanted/annealed samples were characterized using van der Pauw Hall, Rutherford backscattering, and secondary ion mass spectrometry. For a given annealing temperature, the characteristics of the microwave-annealed material are similar to those of conventional furnace anneals despite the difference in cycle time.     

Correlation between chemical and electrical profiles in Si+, Se+ and S+ implanted bulk and epitaxial GaAs

We compare the chemical profiles of Cr, Mn, Si and Se with the electron concentration profiles in Si, Se and S implanted semi-insulating Cr-O doped bulk GaAs substrates and undoped VPE buffer layers annealed with and without a SiO₂ encapsulant in a H₂-As₄ atmosphere. A higher activation efficiency in the net electron concentration and the gateless saturated channel current is measured for SiO₂ encapsulated wafers annealed under arsine overpressure than for capless annealed ones using Cr-O doped bulk GaAs substrates. On the other hand, the net donor concentration peak is higher for implanted buffer epi layers capless annealed under arsine overpressure than for SiO₂ encapsulated ones. Secondary ion mass spectrometry (SIMS) studies of the Cr decoration of the implant damage indicate that the damage from the 100 keV Si implant anneals out at 840°C while a temperature of 900°C is required to anneal out the 260 keV Se implant damage. An explanation of these differences is provided using an impurity redistribution model and charge neutrality considerations. Excellent Hall electron mobilities at liquid nitrogen temperature of 5400–9200 cm²/V-sec are measured for Si-implanted buffer epi substrates.     

Electrical and optical activation studies of Si-implanted GaN

Comprehensive and systematic electrical and optical activation studies of Si-implanted GaN were made as a function of ion dose and anneal temperature. Silicon ions were implanted at 200 keV with doses ranging from 1×10¹³ cm^?2 to 5×10¹⁵ cm^?2 at room temperature. The samples were proximity-cap annealed from 1050°C to 1350°C with a 500-Å-thick AlN cap in a nitrogen environment. The optimum anneal temperature for high dose implanted samples is approximately 1350°C, exhibiting nearly 100% electrical activation efficiency. For low dose (≤5×10¹⁴ cm^?2) samples, the electrical activation efficiencies continue to increase with an anneal temperature through 1350°C. Consistent with the electrical results, the photoluminescence (PL) measurements show excellent implantation damage recovery after annealing the samples at 1350°C for 20 sec, exhibiting a sharp neutral-donor-bound exciton peak along with a sharp donor-acceptor pair peak. The mobilities increase with anneal temperature, and the highest mobility obtained is 250 cm²/Vs. The results also indicate that the AlN cap protected the implanted GaN layer during high-temperature annealing without creating significant anneal-induced damage.     

Rapid thermal annealing of si implanted gaas

Rapid thermal annealing (RTA) technology offers potential advantages for GaAs MESFET device technology such as reducing dopant diffusion and minimizing the redistribution of background impurities. LEC semi-insulating GaAs substrates were implanted with Si at energies from 100 to 400 keV to doses from 1 × 10¹² to 1 × 10¹⁴/cm². The wafers were encapsulated with Si₃N₄ and then annealed at temperatures from 850-1000° C in a commercial RTA system. Wafers were also annealed using a conventional furnace cycle at 850° C to provide a comparison with the RTA wafers. These implanted layers were evaluated using capacitance-voltage and Hall effect measurements. In addition, FET’s were fabricated using selective implants that were annealed with either RTA or furnace cycles. The effects of anneal temperature and anneal time were determined. For a dose of 4 × 10¹²/cm² at 150 keV with anneal times of 5 seconds at 850, 900, 950 and 1000° C the activation steadily increased in the peak of the implant with overlapping profiles in the tail of the profiles, showing that no significant diffusion occurs. In addition, the same activation could be obtained by adjusting the anneal times. A plot of the equivalent anneal times versus 1/T gives an activation energy of 2.3 eV. At a higher dose of 3 × 10¹³ an activation energy of 1.7 eV was obtained. For a dose of 4 × 10¹² at 150 keV both the RTA and furnace annealing give similar activations with mobilities between 4700 and 5000 cm²/V-s. Mobilities decrease to 4000 at a dose of 1 × 10¹³ and to 2500 cm²/V-s at 1 × 10¹⁴/cm². At doses above 1 × 10¹³ the RTA cycles gave better activation than furnace annealed wafers. The MESFET parameters for both RTA and furnace annealed wafers were nearly identical. The average gain and noise figure at 8 GHz were 7.5 and 2.0, respectively, for packaged die from either RTA or furnace annealed materials.     

Co-Implantation and autocompensation in close contact rapid thermal annealing of Si-implanted GaAs:Cr

Close contact rapid thermal annealing of semi-insulating GaAs:Cr implanted with Si, Si + Al, and Si + P has been studied using variable temperature Hall effect measurements and low temperature (4.2K) photoluminescence (PL) spectroscopy. Isochronal (10 sec) and isothermal (1000° C) anneals indicate that As is lost from the surface during close contact annealing at high anneal temperatures and long anneal times. Samples which were implanted with Si alone show maximum activation at an annealing temperature of 900° C, above which activation efficiency decreases. Low temperature Hall and PL measurements indicate that this reduced activation is due to increasing auto-compensation of Si donors by Si acceptors at higher anneal temperatures. However, co-implantation of column V elements can increase the activation of Si implants by reducing Si occupancy of As sites and increasing Si occupancy of Ga sites, and therebyoffset the effects of As loss from the surface. For samples implanted with Si + P, activation increases continuously up to a maximum at an anneal temperature of 1050° C, and both low temperature Hall and PL measurements indicate that autocompensation does not increase in this case as the anneal temperature increases. In contrast, samples implanted with Si + Al show very low activation and very high compensation at all anneal temperatures, as expected. The use of column V co-implants in conjunction with close contact RTA can produce excellent donor activation of Si implanted GaAs.     

不同温度退火的HfTiON栅介质MOS电容电特性研究

在N2/O2气氛中,使用Ti、Hf靶共反应溅射在衬底Si上淀积一种新型栅介质材料HfTiON,随后分别在N2气氛中600°C和800°C退火2min。电容电压(C-V)特性和栅极漏电流特性测试结果表明,800°C快速热退火(RTA)样品表现出更低的界面态密度、更低的氧化物电荷密度和更好的器件可靠性,这是由于在800°C下的RTA能有效地消除溅射生长过程中导致的损伤,形成高质量、高可靠性的介质/Si界面。     

Tellurium-implanted N+ layers in GaAs

Ion implantation of Te was investigated as a doping process for the fabrication of submicron n-type layers in GaAs. The implantation was performed with substrates held at 350°C. After implantation, a protective overcoat of AIN or Si₃N₄ was sputtered on the samples to prevent the GaAs from disassociating during anneal (900°C). The electrical characteristics of the n-type implants were then measured. Current-voltage and capacitance-voltage characteristics of implanted diodes indicated that the junctions were linearly graded and that there was no intrinsic layer present after anneal. Sheet resistivity and Hall effect measurements were used to determine the surface carrier concentration and effective mobility in the implanted layers. Ionized impurity profiles extending beyond the implanted junction depth were calculated by matching differential Hall effect data with junction capacitance-voltage data. A peak electron concentration of 7 × 10¹⁸ electrons/cm³ was observed. However, the profiles exhibited penetrating tails that resulted in junction depths being much deeper than the LSS range theory would predict.     

A comparison between atomic concentration profiles and defect density profiles in GaAs annealed after implantation with beryllium

Semi-insulating chromium-doped GaAs was implanted with 100 keV Be ions to fluences of 5 × 10¹³ and 1 × 10¹⁵ ions/cm². Specimens were annealed at 800°C for thirty minutes. Beryllium atomic concentration profiles, as determined by secondary ion mass spectrometry (SIMS), were compared to the defect density profiles obtained from transmission electron stereomicroscopy techniques for the annealed samples. A major redistribution of Be was observed compared to the as-implanted distribution after annealing at the higher fluence, whereas only a slight redistribution of Be occurred for the lower fluence. A major difference in the defect density profiles was observed with the fluences used for this study in the region where the annealed specimens were compared. The distribution of defects throughout the implanted-annealed layer was examined in GaAs annealed after implantation with the higher fluence using sectioned specimens. The relationships between the atomic Be concentration profile, the defect density profile, and the distribution of some specific defects were compared in these sectioned layers. The distribution and size of defects appear to be directly influenced by the Be concentration and its associated implantation induced damage.     

The dissolution mechanism of oxide precipitates in czochralski silicon degenerately doped with boron during high temperature annealing

The morphology of oxide precipitation induced defects in Czochralski silicon degenerately doped with boron and annealed at 800° and 1050°C, respectively, was examined using a transmission electron microscope. After an extended annealing at 800°C, the predominantly observed defects were the oxide precipitate platelets having the {001}-type habit planes and sides parallel to <110> and <112> crystallographic directions. The morphology of the oxide precipitates as derived from the residual oxygen calculation is suggested to be that of a thin octahedral shape. During a subsequent high temperature annealing, the octahedral precipitate platelets became thermodynamically unstable and dissolved. Based upon the defect morphology observed after a 1050°C anneal, it is suggested that the dissolving precipitate introduces a tensile strain into the surrounding silicon lattice. Contrary to precipitate growth, the lattice strain introduced by precipitate dissolution is relieved primarily through mechanisms involving vacancy injection from the precipitate interface and a condensation of excess silicon interstitials via a formation of an interstitial-type dislocation loop.     

Diode structures from amorphous low-temperature GaAs

The effect of annealing on the electrical properties of a GaAs diode structure, which incorporated a nominally undoped low-temperature (LT) layer on top of conventionally grown p-type GaAs, is examined. Unannealed GaAs grown by molecular beam epitaxy at substrate temperatures below 250°C is amorphous and highly resistive. Annealing at high temperatures converts the undoped LT-GaAs from amorphous to single crystal material. The annealed material is n-type. The current-voltage characteristics of the LT on p-type GaAs structures showed greater asymmetry, with lower reverse leakage currents, as the anneal temperature was increased above 400°C. This reflects the improved crystal quality of the LT layer.     

Evidence of a thermally stable carbon-nitrogen deep level in carbon-doped,nitrogen-implanted,GaAs and AIGaAs

Nitrogen ion implantation is shown to form high resistivity regions (p_s ≥ 1 × 10¹⁰ Ω/) in C-doped GaAs and Al_0.35Ga_0.65As that remains compensated after a 900°C anneal. This is in contrast to oxygen or fluorine implantation in C-doped GaAs which both recover the initial conductivity after a sufficiently high temperature anneal (800°C for F and 900°C for O). In C-doped Al_0.35Ga_0.65As N- and O-implant isolation is thermally stable but F-implanted samples regain the initial conductivity after a 700°C anneal. A dose dependence is observed for the formation of thermally stable N-implant compensation for both the GaAs and AIGaAs samples. A C-N complex is suggested as the source of the compensating defect level for the N-implanted samples. Sheet resistance data vs anneal temperature and estimates of the depth of the defect levels are reported. This result will have application to heterojunction bipolar transistors and complementary heterostructure field effect transistor technologies that employ C-doped AIGaAs or GaAs layers along with high temperature post-implant isolation processing.     

Incoherent annealing of implanted layers in GaAs

Incoherent light from filament lamps focused by elliptical mirrors has been used to activate implanted layers in GaAs. 4 × 10¹⁴Si⁺cm^-2and 2 × 10¹⁴Zn⁺cm^-2implants were annealed with Si3N4deposited by CVD at 400°C providing a surface protective layer. By taking advantage of the focusing properties of elliptical mirrors, most of the emitted light could be concentrated onto the GaAs to give annealing times × 1 sec. Differential Hall measurements show peak carrier concentrations of 6.5 × 10¹⁸cm^-3and 50% activation for the n+ layers. The Zn implants were completely activated and doped to ∼ 2 × 10¹⁹cm^-3. These results, together with the short annealing times, suggest the present approach to be an attractive alternative to both laser and conventional thermal annealing.     

Si-implantation activation annealing of GaN up to 1400°C

Implant activation annealing of Si-implanted GaN is reported for temperatures from 1100 to 1400°C. Free electron concentrations up to 3.5×10²⁰ cm⁻³ are estimated at the peak of the implanted profile with Hall mobilities of ∼60 cm²/Vs for annealing at 1300°C for 30 s with an AIN encapsulant layer. This mobility is comparable to epitaxial GaN doped at a similarly high level. For annealing at ≥1300°C, the sample must be encapsulated with AIN to prevent decomposition of the GaN layer. Channeling Rutherford backscattering demonstrates the partial removal of the implant damage after a 1400°C anneal with a minimum channeling yield of 12.6% compared to 38.6% for the as-implanted spectrum. Scanning electron microscope images show evidence of decomposition of unencapsulated GaN after a 1300°C anneal and complete sublimation after 1400°C. The use of AIN encapsulation and annealing at temperatures of ∼1300°C will allow the formation of selective areas of highly doped GaN to reduce the contact and access resistance in GaN-based transistors and thyristors.     

Structural stability of low temperature grown InGaAs/GaAs heterostructure

InGaAs/GaAs superlattice was grown by molecular beam epitaxy (MBE) on GaAs (100) substrate at low substrate temperature (250°C). The as-grown superlattice sample was then annealed at various temperatures for 10 min. The as-grown superlattice was pseudomorphic and stable up to 800°C annealing. Annealing at 850°C or higher temperatures, however, caused strain relaxation accompanying with dislocation generation at the As precipitate. Dislocation generation at the As precipitate was influenced by two factors. The one is lattice mismatch between GaAs and As precipitate, and the other is elastic interaction force acting on the As precipitate.     

Beryllium and sulfur ion-implanted profiles in gaas

Atomic profiles of ion-implanted Be and S in GaAs have been measured as a function of implant fluence and annealing temperature. Concentration versus depth profiles were ob-tained by means of secondary ion mass spectrometry (SIMS) techniques. Pyrolytically deposited and sputter-coated Si0₂ and Si₃N₄ films were used as encapsulants for the 500 to 900° annealing study. Semi-insulating GaAs was implanted with 200 keV³⁴S⁺ to fluences of 1 × 10¹⁴ and 5₂× 10¹⁴/cm², and 100 keV⁹Be⁺ in the 1 × 10¹³ to 1 × 10¹⁵/cm² fluence range. The S profiles did not change significantly after annealing at 800°C, although there was some skewing after annealing above 600°C. In contrast, the Be profiles showed significant changes and a decrease in the peak concentration for the ≥ 5 × 10^T4/cm² implants after a 700°C anneal. After a 800°C anneal the Be profile was essentially flat with a monotonic decrease from the surface into the implanted re-gion and a 900°C anneal caused a further decrease in the Be concentration. Profiles of Be implants of ≤ 1 × 10¹⁴/cm² did not change significantly after annealing indicating that the higher fluence cases were related to solubility effects. This work supported by the Naval Electronic Systems Command and the Office of Naval Research.     

Electrical properties and photoluminescence studies of Ge-implanted GaAs

Thedata presented here show that Ge- implanted GaAs has a complex amphoteric behavior which is controlled by the implantation dose, implantation temperature, and anneal temperature. Annealing was performed with rf plasma deposited Si₃N₄ as the encapsulant. Implantations at-100° C resulted in p-layers, while those performed at 100° C and above resulted in n-layers regardless of the dose and anneal temperature. Room temperature implants resulted in p- or n-layers depending on the combination of dose and anneal temperature. Electrical activation and carrier mobilities were low for anneal temperatures ≤ 850°C. Low temperature (6 K) photoluminescence indicated that a significant amount of residual damage remained after annealing. Atomic Ge distribution profiles, carrier con-centration profiles, and junction characteristics of Ge-implanted GaAs planar diodes are also presented. This work was supported by the Joint Services Electronics Program (U.S. Army, U.S. Navy, U.S. Air Force) under contract N00014-79-C-0424, and by the Office of Naval Research under contract N00014-76-C-0806.     

Near-interface trapped charge induced by Fowler-Nordheim injection in hydrogen or argon annealed MOS capacitors

By applying Fowler-Nordheim stress to a metal-oxide-semiconductor capacitor, we studied the relationship between hydrogen anneal temperature and near-interface trapped positive charge. Wet oxides annealed with hydrogen at temperatures between 400 and 1000°C exhibited a maximum near-interface charge density after the 800°C anneal. A similar set of oxides annealed in Ar showed only a continual decrease with increased anneal temperature. Based on our understanding of earlier nuclear reaction analysis studies by Myers, we suggest that hydrogen in the form of O-H is associated with the increase in the near-interfacial positive charge density.     

Surface condition of Si implanted GaAs revealed by the noncontact laser/microwave method

The surface recombination of GaAs which has a heavily doped surface layer formed by Si implantation and subsequent annealing has been investigated using the noncontact laser/microwave evaluation method. The experimental results of the samples implanted with doses ranging from 1.0 × 10¹¹ to 3.9 × 10¹² cm⁻² at an energy of 100 keV indicate that the effective surface recombination velocity decreases with dosage because of the heavily doped layer formed after the annealing. On the other hand, the results of the samples implanted with a dose of 3.9 × 10¹² cnr⁻² at energies raging from 50 to 180 keV indicate that the effective surface recombination velocity increases with energy. This is mainly due to the decrease in the peak carrier concentration in the heavily doped layer.     

Electrical and optical characterization studies of lower dose Si-implanted AlxGa1−xN

Electrical and optical activation studies of lower dose Si-implanted Al_xGa_1?xN (x=0.14 and 0.24) have been made systematically as a function of ion dose and anneal temperature. Silicon ions were implanted at 200 keV with doses ranging from 1×10¹³ cm^?2 to 1×10¹⁴ cm^?2 at room temperature. The samples were proximity cap annealed from 1,100°C to 1,350°C with a 500-Å-thick AlN cap in a nitrogen environment. Nearly 100% electrical activation efficiency was obtained for Al_0.24Ga_0.76N implanted with a dose of 1 × 10¹⁴ cm^?2 after annealing at an optimum temperature around 1,300°C, whereas for lower dose (≤5×10¹³ cm^?2) implanted Al_0.24Ga_0.76N samples, the electrical activation efficiencies continue to increase with anneal temperature up through 1,350°C. Seventy-six percent electrical activation efficiency was obtained for Al_0.14Ga_0.86N implanted with a dose of 1 × 10¹⁴ cm^?2 at an optimum anneal temperature of around 1,250°C. The highest mobilities obtained were 89 cm²/Vs and 76 cm²/Vs for the Al_0.14Ga_0.86N and Al_0.24Ga_0.76N, respectively. Consistent with the electrical results, the photoluminescence (PL) intensity of the donor-bound exciton peak increases as the anneal temperature increases from 1,100°C to 1,250°C, indicating an increased implantation damage recovery with anneal temperature.