Isothermal DC and microwave characterizations of power RF siliconLDMOSFETs

Presented in this paper are two new approaches for the acquisition of both isothermal DC current-voltage (I-V) characteristics and microwave S-parameters of power RF LDMOSFETs. In the first approach, a 3D tensor product B-spline representation is used to extract isothermal DC I-V characteristics from DC I-V characteristics measured at various substrate temperatures. The average device surface temperature is measured using an infrared sensor. A single effective thermal resistance is found to map the entire electrothermal profile of the device, justifying the isothermal DC I-V definition used. In the second approach, isothermal I-V and microwave data are directly measured with an efficient procedure that keeps the average device surface temperature constant. Excellent agreement is obtained between the numerical extraction and the direct measurement approach. Finally, the comparison of the transconductance extracted from the isothermal DC I-V and microwave data confirms the presence of a small low-frequency dispersion in LDMOSFETs not due to self-heating     

共振隧穿晶体管的反相器统一模型

综合分析了各种不同结构的共振隧穿晶体管(RTT),将其等效为一反相器电路,建立了一个统一的RTT模型.在此模型中,按照处理反相器的方法来分析RTT的I-V特性,对各种不同类型的I-V特性给出了统一的解释.该模型所导出的结果与相应的电路模拟和电路模拟实验结果相一致.此RTT反相器统一模型可成为分析和设计各种RTT器件的有力工具.     

An improved multipeak resonant tunneling diode model for nine-stateresonant tunneling diode memory circuit simulation

A simple Spice equivalent circuit model for simulating current-voltage (I-V) characteristics and logic operation waveforms of an eight-peak resonant tunneling diode is presented. The simulated results agreed well with experimental data measured from an eight-peak resonant tunneling diode device fabricated by Seabaugh's experiment. This is shown through PSpice simulation     

Direct extraction of an empirical temperature-dependent InGaP/GaAs HBT large-signal model

A new empirical InGaP/GaAs heterojunction bipolar transistor (HBT) large-signal model including self-heating effects is presented. The model accounts for the inherent temperature dependence of the device characteristics due to ambient-temperature variation as well as self-heating. The model is accompanied by a simple extraction process, which requires only dc current-voltage (I-V) and multibias-point small-signal S-parameter measurements. All the current-source model parameters, including the self-heating parameters, are directly extracted from measured forward I-V data at different ambient temperatures. The distributed base-collector capacitance and base resistance are extracted from measured S-parameters using a new technique. The extraction procedure is fast, accurate, and inherently minimizes the average squared-error between measured and modeled data, thereby eliminating the need for further optimization following parameter extraction. This modeling methodology is successfully applied to predict the dc, small-signal S-parameter, and output fundamental and harmonic power characteristics of an InGaP/GaAs HBT, over a wide range of temperatures.     

A new approach to determine the effective channel length and thedrain-and-source series resistance of miniaturized MOSFET's

A new decoupled C-V method is proposed to determine the intrinsic (effective) channel region and extrinsic overlap region for miniaturized MOSFET's. In this approach, a unique channel-length-independent extrinsic overlap region is extracted at a critical gate bias, so bias-independent effective channel lengths (L_eff) are achieved. Furthermore, the two-dimensional (2D) charge sharing effect is separated from the effective channel region. Based on this L_eff and the associated bias-dependent channel mobility, μ_eff , the drain-and-source series resistance (R_DS) can be derived from the I-V characteristics for each device individually. For the first time, the assumption or approximation for R_DS and μ_eff can be avoided, thus the difficulties and controversy encountered in the conventional I-V method can be solved. The 2D charge sharing effect is incorporated into the bias-dependent R_DS. This bias dependence is closely related to the drain/source doping profile and the channel dopant concentration. The proposed L_eff and R_DS extraction method has been verified by an analytical I-V model which shows excellent agreements with the measured I-V characteristics     

Proposal and analysis of resonant tunnelling diode with singlepeaked I-V characteristics

A novel resonant tunnelling diode with single peaked I-V characteristics is proposed. In this diode, the resonant tunnelling effect in a vertical double barrier structure is coupled with the pinch-off effect in a lateral collector just beneath the structure. Using a one-dimensional distributed parameter model, the dependence of the I-V characteristics on the device parameters (emitter width and collector thickness) is investigated systematically     

探测器中扩散结深对光响应度影响的研究

研究了InGaAs/InP PIN探测器中扩散结深对光响应度的影响,对不同扩散条件下的光电探测器进行了对比实验,测量了不同结深下器件的Ⅰ-Ⅴ特性和光响应度.结果表明:扩散结深对器件的Ⅰ-Ⅴ特性影响不大,而对光响应度影响很大,当结深处在InGaAs吸收层上表面时,光响应度最大值出现在波长1.55um处;而当结深进入衬底InP层后,光响应度最大值则出现在波长1um处.另外,在闭管扩散实验中,严格控制温度和扩散时间是控制结深的关键,研究了不同扩散温度和扩散时间下的结深,为器件的制备提供了参考.     

RTD的器件模型和模拟——共振隧穿器件讲座(9)

阐述了电路模拟在设计和研制大规模集成过程中的必要性和重要意义,器件模型在电路模拟中的重要性以及器件模拟与器件模型的关系;在器件模拟通用软件形成过程的基础上重点讨论了RTD的器件模型、器件模拟和电路模拟软件SPICE三个课题;介绍了基于物理参数I-V方程RTD模型和高斯函数、指数函数RTD直流模型;利用ATLAS器件模拟通用软件对RTD进行了器件模拟,得到了势垒和势阱宽度、E区掺杂浓度等对RTDI-V特性的影响;以包含RTD电路的SPICE电路模拟中的文字逻辑门为例,通过电路模拟验证了其逻辑功能,对设计该电路起到指导和参考作用。     

基于聚乙烯咔唑的非挥发型阻变存储特性分析

采用聚乙烯咔唑作为活性层构建了ITO/PVK/Al的三明治结构阻变存储元件,并对其阻变特性进行了测量。结果表明其具有明显的非挥发型双稳态阻变特性, 具有WORM存储特性。该元件具有良好的数据保持能力和耐久能力,开关态电流比可达103,且具有较低的阈值转换电压。分别对低阻态和高阻态的载流子传输机制进行了拟合, 低阻态为欧姆传导机制,高阻态为空间电荷限制电流发射机制。根据载流子传输机制, 对阻变特性进行了解释。     

碳纳米管场发射显示器特性测试方法的研讨

通过低压化学气相沉积法在硅片上制作碳纳米管薄膜阴极,用真空荧光显示器的封装工艺,制备了碳纳米管场发射显示器样管。改变常用的驱动电源电压测试为器件电压测试,得到非常理想的伏安特性曲线和发光特性曲线。从测试结果分析可知,直接测量碳纳米管场发射显示器的器件电压和测试电源驱动电压所得结果是不同的,用后者代替前者不够合理。从电子场发射的角度看,实际的碳纳米管场发射伏安特性曲线应比测试的伏安曲线更陡。     

应变Si/SiGe沟道功率UMOSFET的模拟分析

提出一种应变Si/SiGe UMOSFET结构,并与Si-UMOSFET器件的电流-电压特性进行比较;对SiGe区域在UMOSFET器件中的不同厚度值进行静态电学仿真。应变Si/SiGe异质结能够有效地提高沟道区载流子的迁移率,增大IDS,降低Vth及器件的Ron;且应变异质结与载流子有效传输沟道距离的大小,对器件的Vth、Isat、V(BR)DSS及电流-电压特性都有较大的影响。因此在满足击穿电压要求的基础上,应变Si/SiGe沟道异质结的UMOSFET相对Si-UMOSFET在I-V特性和Ron方面有较大的改进。     

单电子晶体管的I-V特性数学模型及逻辑应用

基于正统单电子理论，提出了单电子晶体管的I-V特性数学算法改进模型。该模型的优点是：考虑了背景电荷的影响，可由实际物理参数直接获得，支持双栅极工作，便于逻辑电路的分析。研究了背景电荷和各物理参数对I-V特性及跨导的影响，讨论了双栅极单电子晶体管的逻辑应用：简化了“异或”逻辑电路，改进了二叉判别图电路的逻辑单元。     

一种新型结构的InGaP/GaAs负阻异质结晶体管

利用硅双基区晶体管（DUBAT）产生负阻的原理,针对HBT器件结构和MBE材料结构的特点,设计并研制出一种基区刻断结构的负阻型HBT (NDRHBT) . 经过特性和参数测试,证明此种NDRHBT具有显著的微分负阻效应,并发现负电流区负阻效应和光照可改变其I-V特性,器件模拟结果和测试结果基本一致.     

Simulation of deep submicron SOI N-MOSFET considering the velocityovershoot effect

A set of numerical simulations were performed on 0.22 μm SOI MOSFET's with relatively uniform channel field and charge using the hydrodynamic model, the energy transport model, and the drift-diffusion model. The simulation results based on the advanced models (hydrodynamic and energy transport) show nearly identical results for the I-V characteristics and they agreed quite well with the experimental results, while the results from drift-diffusion model do not. Also the simulation results show that both the hydrodynamic and energy transport models handle the effect of velocity overshoot on the I-V characteristic of the 0.12 μm device well     

4H-SiC MESFET直流I-V特性解析模型

提出一种改进的4H-SiC MESFET非线性直流解析模型,该模型基于栅下电荷的二维分布进行分析,在分析电场相关迁移率、速度饱和的基础上,考虑沟道长度调制效应对饱和区漏电流的影响,建立基于物理的沟道长度调制效应模型,模拟结果与实测的I-V特性较为吻合。在器件设计初期,可以有效地预测器件的工作状态。     

An analytic I—V model for lightly doped drain (LDD) MOSFET devices

An analytic I-V model for lightly doped drain (LDD) MOSFET devices is presented. In this model, the n^-region is considered to be a modified buried-channel MOSFET device, and the channel region is considered to be an intrinsic enhancement-mode MOSFET device. Combining the models of these two regions, the drain current in the linear/saturation regions and the saturation voltage can be calculated directly from the terminal voltages. In addition, the parameters used in the channel region can be extracted by a series of least square fittings. According to comparisons between the experimental data measured from the test transistors and the theoretical calculations, the developed I-V model is shown to be valid for wide ranges of channel lengths.     

Capacitance–Voltage and Current–Voltage Measurements of Nitride Light-Emitting Diodes

Capacitance-voltage (C-V ) and current-voltage (I-V) characteristics of nitride light-emitting diodes were measured. The apparent carrier distributions obtained from the C-V curves yielded much information about the samples, including information about the presence of acceptor-like defects in the active layer and the problem of electron overflow. The inconsistency between the experimental and simulated I-V curves also supported the presence of the defects. After compensating the acceptor-like defects by Si dopants and adjusting the overlap between the depletion region and the light-emitting structure, device performance was improved.     

新颖的IGBT SPICE模型及非破坏参数提取和验证

提出并优化了一种和现有SPICE软件如HSPICE完全兼容的IGBT等效电路模型.该模型摒弃了双极晶体管的所谓准静态假设而用精确的双极输运理论进行分析,更符合IGBT的实际工作条件.利用电压控制可变电阻模型等效IGBT的n-外延层的电导调制效应,取得了很好的效果.基于器件的非破坏实测参数以器件物理方程为基础的模型参数提取,计算依据正确,物理意义明确.用该模型计算了IGBT的I-V特性、开关特性等,与实测符合较好,误差不超过8%,此结果比已报道的同类模型要好,且更为简单方便.     

新颖的IGBT SPICE模型及非破坏参数提取和验证

提出并优化了一种和现有SPICE软件如HSPICE完全兼容的IGBT等效电路模型.该模型摒弃了双极晶体管的所谓准静态假设而用精确的双极输运理论进行分析,更符合IGBT的实际工作条件.利用电压控制可变电阻模型等效IGBT的n- 外延层的电导调制效应,取得了很好的效果.基于器件的非破坏实测参数以器件物理方程为基础的模型参数提取,计算依据正确,物理意义明确.用该模型计算了IGBT的I- V特性、开关特性等,与实测符合较好,误差不超过8% ,此结果比已报道的同类模型要好,且更为简单方便.     

Theory of switching in p-n-insulator (tunnel)-metal devices: Part I: Punchthrough mode

The four-layered structure (M-I(leaky)-n-p⁺) is found to exhibit a current-controlled negative resistance region in its I-V characteristics. In this paper, a quantitative physical model of the device in the punch-through mode is presented. The negative resistance behaviour is due to a positive feedback mechanism between the tunnel MIS and the n-p⁺ junction parts of the device. The effect of the device parameters on its I-V characteristics is studied.