A new ZVS bidirectional DC-DC converter for fuel cell and battery application

This paper presents a new zero-voltage-switching (ZVS) bidirectional dc-dc converter. Compared to the traditional full and half bridge bidirectional dc-dc converters for the similar applications, the new topology has the advantages of simple circuit topology with no total device rating (TDR) penalty, soft-switching implementation without additional devices, high efficiency and simple control. These advantages make the new converter promising for medium and high power applications especially for auxiliary power supply in fuel cell vehicles and power generation where the high power density, low cost, lightweight and high reliability power converters are required. The operating principle, theoretical analysis, and design guidelines are provided in this paper. The simulation and the experimental verifications are also presented.     

Active-clamp snubbers for isolated half-bridge DC-DC converters

In conventional isolated half-bridge dc-dc converters, the leakage-inductance-related losses degrade converter efficiency and limit the ability to increase the converters' switching frequencies. In this paper, a novel active-clamp snubber circuit for half-bridge dc-dc converters is proposed to recycle the energy stored in the leakage inductance by transferring this energy to a capacitor with zero-voltage zero-current-switching switched auxiliary switches, such that body-diode conduction of primary-side main switches are prevented and primary side ringing are attenuated resulting in improved converter efficiency. Principles of operation and simulation analysis are presented and supported by experimental results that show significant improvement in efficiency.     

A Bidirectional Isolated DC–DC Converter as a Core Circuit of the Next-Generation Medium-Voltage Power Conversion System

This paper describes a bidirectional isolated dc-dc converter considered as a core circuit of 3.3-kV/6.6-kV high-power-density power conversion systems in the next generation. The dc-dc converter is intended to use power switching devices based on silicon carbide (SiC) and/or gallium nitride, which will be available on the market in the near future. A 350-V, 10-kW and 20 kHz dc-dc converter is designed, constructed and tested. It consists of two single-phase full-bridge converters with the latest trench-gate insulated gate bipolar transistors and a 20-kHz transformer with a nano-crystalline soft-magnetic material core and litz wires. The transformer plays an essential role in achieving galvanic isolation between the two full-bridge converters. The overall efficiency from the dc-input to dc-output terminals is accurately measured to be as high as 97%, excluding gate drive and control circuit losses from the whole loss. Moreover, loss analysis is carried out to estimate effectiveness in using SiC-based power switching devices. Loss analysis clarifies that the use of SiC-based power devices may bring a significant reduction in conducting and switching losses to the dc-dc converter. As a result, the overall efficiency may reach 99% or higher     

A Bidirectional DC–DC Converter for an Energy Storage System With Galvanic Isolation

This paper addresses a bidirectional dc-dc converter suitable for an energy storage system with an additional function of galvanic isolation. An energy storage device such as an electric double layer capacitor is directly connected to a dc side of the dc-dc converter without any chopper circuit. Nevertheless, the dc-dc converter can continue operating when the voltage across the energy storage device drops along with its discharge. Theoretical calculation and experimental measurement reveal that power loss and peak current impose limitations on a permissible dc-voltage range. This information may be useful in design of the dc-dc converter. Experimental results verify proper charging and discharging operation obtained from a 200-V, 2.6-kJ laboratory model of the energy storage system. Moreover, the dc-dc converter can charge the capacitor bank from zero to the rated voltage without any external precharging circuit.     

Low-voltage-swing monolithic dc-dc conversion

A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic power dissipation of a dc-dc converter is reduced by lowering the voltage swing of the power transistor gate drivers. A comprehensive circuit model of the parasitic impedances of a monolithic buck converter is presented. Closed-form expressions for the total power dissipation of a low-swing buck converter are proposed. The effect of reducing the MOSFET gate voltage swings is explored with the proposed circuit model. A range of design parameters is evaluated, permitting the development of a design space for full integration of active and passive devices of a low-swing buck converter on the same die, for a target CMOS technology. The optimum gate voltage swing of a power MOSFET that maximizes efficiency is lower than a standard full voltage swing. An efficiency of 88% at a switching frequency of 102 MHz is achieved for a voltage conversion from 1.8 to 0.9 V with a low-swing dc-dc converter based on a 0.18-/spl mu/m CMOS technology. The power dissipation of a low-swing dc-dc converter is reduced by 27.9% as compared to a standard full-swing dc-dc converter.     

Small Signal Analysis of Energy Factor and Mathematical Modeling for Power DC–DC Converters

Mathematical modeling for power dc-dc converters is a historical problem accompanying dc-dc conversion technology since the 1940s. The traditional mathematical modeling is not available for complex structure converters since the differential equation order increases very high. We have to search for other ways to establish mathematical modeling for power dc-dc converters. We have defined energy factor (EF) and new mathematical modeling for power dc-dc converters that have attracted much attention in recent years. This paper describes the small signal analysis of EF and mathematical modeling for power dc-dc converters in continuous conduction mode and discontinuous conduction mode. EF and the subsequential parameters can illustrate the unit-step response and interference recovery. This investigation may be helpful for system design and dc-dc converters characteristics. Two dc-dc converters: Buck converter and super-lift Luo-converter as the samples, are analyzed in this paper to demonstrate the applications of EF, pumping energy, stored energy (SE), capacitor/inductor SE ratio, energy losses, time constant tau, and damping time constant tau_d     

A New Approach to Reducing Output Ripple in Switched-Capacitor-Based Step-Down DC–DC Converters

Rapidly dropping power supply voltages and tight voltage regulation requirements for integrated circuits challenges power supply designers. A novel interleaved discharging (ID) approach is presented to reduce the output ripple in step-down switched-capacitor (SC) dc-dc converters. Simulation and experimental results of a four-stage SC dc-dc converter show that the ID approach can reduce the output ripple by a factor of three. The proposed approach also improves the converter efficiency by 7%. The ID method provides flexibility in the design optimization of step-down SC dc-dc converters     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

Design and Implementation of an Accurately Regulated Multiple Output ZVS DC–DC Converter

An accurately regulated multiple-output zero-voltage switching (ZVS) DC-DC converter is proposed. The converter is composed of three outputs altogether. The first and second outputs are regulated through the duty cycle control of two asymmetrical half bridge converters, while the third output is regulated through the phase shift of the two asymmetrical half bridge converters. The characteristic of this multiple-output dc-dc converter is analyzed and design process is investigated. ZVS is realized for all the main switches. Therefore this multiple-output dc-dc converter can operate with higher efficiency at higher switching frequency. The operation stages, ZVS condition and control detail are also presented. A 400 V input, 48 V/10 A, 5 V/20 A, 12 V/5 A outputs prototype is built to verify the design. The efficiency at rated input voltage full load is 93.36%.     

High-Power Density Design of a Soft-Switching High-Power Bidirectional dc–dc Converter

A bidirectional dc-dc converter typically consists of a buck and a boost converters. In order to have high-power density, the converter can be designed to operate in discontinuous conducting mode (DCM) such that the passive inductor can be minimized. The DCM operation associated current ripple can be alleviated by interleaving multiphase currents. However, DCM operation tends to increase turnoff loss because of a high peak current and its associated parasitic ringing due to the oscillation between the inductor and the device output capacitance. Thus, the efficiency is suffered with the conventional DCM operation. Although to reduce the turnoff loss a lossless capacitor snubber can be added across the switch, the energy stored in the capacitor needs to be discharged before device is turned on. This paper adopts a gate signal complimentary control scheme to turn on the nonactive switch and to divert the current into the antiparalleled diode of the active switch so that the main switch can be turned on under zero-voltage condition. This diverted current also eliminates the parasitic ringing in inductor current. For capacitor value selection, there is a tradeoff between turnon and turnoff losses. This paper suggests the optimization of capacitance selection through a series of hardware experiments to ensure the overall power loss minimization under complimentary DCM operating condition. According to the suggested design optimization, a 100-kW hardware prototype is constructed and tested. The experimental results are provided to verify the proposed design approach.     

A unified approach to the design of PWM-based sliding-mode voltage controllers for basic DC-DC converters in continuous conduction mode

This paper presents a simple unified approach to the design of fixed-frequency pulsewidth-modulation-based sliding-mode controllers for dc-dc converters operating in the continuous conduction mode. The design methodology is illustrated on the three primary dc-dc converters: buck, boost, and buck-boost converters. To illustrate the feasibility of the scheme, an experimental prototype of the derived boost controller/converter system is developed. Several tests are performed to validate the functionalities of the system.     

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package

We demonstrate an integrated buck dc-dc converter for multi-V/sub CC/ microprocessors. At nominal conditions, the converter produces a 0.9-V output from a 1.2-V input. The circuit was implemented in a 90-nm CMOS technology. By operating at high switching frequency of 100 to 317 MHz with four-phase topology and fast hysteretic control, we reduced inductor and capacitor sizes by three orders of magnitude compared to previously published dc-dc converters. This eliminated the need for the inductor magnetic core and enabled integration of the output decoupling capacitor on-chip. The converter achieves 80%-87% efficiency and 10% peak-to-peak output noise for a 0.3-A output current and 2.5-nF decoupling capacitance. A forward body bias of 500 mV applied to PMOS transistors in the bridge improves efficiency by 0.5%-1%.     

Sustained Slow-Scale Oscillation in Higher Order Current-Mode Controlled Converter

DC-DC converters under current-mode control have been known to exhibit slow-scale oscillation as a result of a Hopf-type bifurcation as one or more of the parameters of the outer voltage loop are varied. In the absence of the outer voltage loop (i.e., open loop), slow-scale oscillation was generally not observed in simple low-order dc-dc converters, i.e., buck, buck-boost, and boost converters. In this paper, slow-scale bifurcation in a higher order current-mode controlled converter is studied. It has been found experimentally that, even in the absence of a closed outer voltage loop, a current-mode controlled Cuk converter can exhibit a slow-scale Hopf-type bifurcation. The phenomenon was observed in a commercial low-ripple dc-dc converter which has been designed using the Cuk converter and the LM2611 controller. Such slow-scale oscillation of the inner current loop can also be observed in full-circuit SPICE simulations. An averaged model has been developed and implemented in SPICE to find the Hopf bifurcation boundaries. With this averaged model, the Hopf bifurcation can be explained conveniently using the traditional loop gain analysis. Specifically, the extra degrees of freedom in higher order dc-dc converters have opened up a new possible mode of instability which has not been found in simple low-order dc-dc converters.     

Multiphase voltage-mode hysteretic controlled DC-DC converter with novel current sharing

Today's on-board high-density, low-output-voltage, high-output-current, fast transient point-of-load (POL) dc-dc converters design requirements for the new generation of integrated circuits, digital signal processors, and microprocessors are increasingly becoming stricter than ever. This is due to the demand for high dynamic performance dc-dc conversion with tight dynamic tolerances for supply voltages coupled with very high power density. In this paper, a multiphase voltage-mode hysteretic controlled POL dc-dc converter with new current sharing is presented. Theoretical analysis is provided for multiphase and interleaved dc-dc converters with new current sharing method. The simulation and experimental results are compared based on a specific design example.     

A Multistage Interleaved Synchronous Buck Converter With Integrated Output Filter in 0.18 μm SiGe Process

The design and analysis of a fully integrated multistage interleaved synchronous buck dc-dc converter with on-chip filter inductor and capacitor is presented. The dc-dc converter is designed and fabricated in 0.18 mum SiGe RF BiCMOS process technology and generates 1.5 V-2.0 V programmable output voltage supporting a maximum output current of 200 mA. High switching frequency of 45 MHz, multiphase interleaved operation, and fast hysteretic controller reduce the filter inductor and capacitor sizes by two orders of magnitude compared to state-of-the-art converters and enable a fully integrated converter. The fully integrated interleaved converter does not require off-chip decoupling and filtering and enables direct battery connection for integrated applications. This design is the first reported fully integrated multistage interleaved, zero voltage switching synchronous buck converter with monolithic output filters. The fully integrated buck regulator achieves 64% efficiency while providing an output current of 200 mA.     

High-Frequency Resonant Transistor DC-DC Converters

Transistor dc-dc converters which employ a resonant circuit are described. A resonant circuit is driven with square waves of current or voltage, and by adjusting the frequency around the resonant point, the voltage on the resonant components can be adjusted to any practical voltage level. By rectifying the voltage across the resonant elements, a dc voltage is obtained which can be either higher or lower than the input dc voltage to the converter. Thus, the converter can operate in either the step-up or step-down mode. In addition, the switching losses in the inverter devices and rectifiers are extremely low due to the sine waves that occur from the use of a resonant circuit (as opposed to square waves in a conventional converter); also, easier EMI filtering should result. In the voltage input version, the converter is able to use the parasitic diode associated with an FET or monolithic Darlington, while in the current input version, the converter needs the inverse blocking capability which can be obtained with an IGT or GTO device. A low-power breadboard operating at 200-300 kHz has been built. Two typical application areas are switching power supplies and battery chargers. The converter circuits offer improvements over conventional circuits due to their high efficiency (low switching losses), small reactive components (high-frequency operation), and their step-up/stepdown ability.     

Zero-voltage and zero-current-switching full-bridge PWM converterusing secondary active clamp

A new zero-voltage and zero-current-switching (ZVZCS) full-bridge (FB) pulse width modulation (PWM) power converter is proposed to improve the performance of the previously presented ZVZCS FB PWM power converters. By adding a secondary active clamp and controlling the clamp switch moderately, ZVS (for leading-leg switches) and ZCS (for lagging-leg switches) are achieved without adding any lossy components or the saturable reactor. Many advantages, including simple circuit topology, high efficiency and low cost, make the new power converter attractive for high-voltage and high-power (>10 kW) applications. The principle of operation is explained and analyzed. The features and design considerations of the new power converter are also illustrated and verified on a 1.8 kW 100 kHz IGBT-based experimental circuit     

Output ripple analysis of switching DC-DC converters

State space averaging methods are used to derive time-invariant models that bound the envelope of trajectories of pulsewidth modulated (PWM) dc-dc converters. The results are compared to conventional averaging methods used in power electronics, and it is shown that, at times, designing a dc-dc converter based on the averaged output of a converter can be ineffective because peak output values sometimes significantly deviate from the averaged output. This paper attempts to quantify this deviation by using both small-signal transfer functions and nonlinear models to model the maximum and minimum values of outputs of PWM converters. Issues in simulation and control loop design are also mentioned.     

Calculation and stability investigation of periodic steady states of the voltage controlled Buck DC-DC converter

A new method for investigating the complex dc-dc converters dynamics is suggested in this paper. The method is based on the formulation of a nonlinear difference equation with respect to the duty cycle. This equation embodies the nonlinear and discrete-time characteristics of dc-dc converters and allows both the calculation of normal and subharmonic steady states and their local stability analysis. The method is presented through the analysis of a voltage controlled Buck dc-dc converter.     

高压大功率变频器的谐波分析

当电动机容量较大时,大功率变频器的输入谐波对电网的影响以及输出谐波对电动机的影响成为了交流变频系统中突出的问题。为了减小大功率变频器的谐波,普遍采用多脉动整流、变压器耦合输出、多电平和单元级联技术,形成了以多脉动整流拓扑或多电平拓扑为输入级、以变压器耦合输出或多电平输出拓扑为输出级的大功率变频器主电路,以及多重化结构的大功率变频器主电路。本文对目前几种有代表性的高压变频器主电路拓扑及输入输出谐波进行了分析,并与IEEE-519标准进行比较,研究了变频器的谐波特性。