Synchronization Techniques for Various Switching Network Topologies

This paper examines the network timing and synchronization requirements for various network topologies. Both centralized and decentralized topologies are considered. Although the prime emphasis is on circuit switching networks, other networks involving message switches, packet switches, and integrated voice/data nodal configurations are also considered.     

水分红外测量原理及方法

介绍了几种水分测量方法的测量原理和优缺点。对离线式测量和在线式测量进行了对比。讨论了红外辐射吸收式水分测量法,叙述了双波长和三波长红外水分仪,并对二者进行了比较,同时展望了水分测量的未来。     

基于RFID标签的定位原理和技术

识别和定位是用于室内服务的关键信息,常见方法是估计RFID标签的位置。而在室内环境下,信号遭受严重的损耗,标签的性能也会受到一定的限制。针对这些问题,文中对现存的RFID定位技术和定位原理加以总结,在对RFID定位技术进行阐释和分类分析的基础上,讨论了在此领域的未来发展趋势。     

LTE关键技术原理及其应用探讨

分析了LTE的两大无线关键技术———MIMO和频率复用的技术原理;结合理论分析、系统仿真和实验室及外场测试,证明了采用MIMO和频率复用技术可以显著提高LTE系统性能;同时介绍了关键技术的相关应用。     

多谐振软开关全桥Boost变换器

提出一种利用多谐振实现开关管软开关的全桥Boost变换器.其将变压器漏感作为谐振电感,利用电感与电容谐振实现桥臂开关管和箝位开关管的软开关.桥臂开关管工作于零电流开通与零电压关断状态.有源箝位电路既可抑制变换器工作时可能出现的振荡电压,又可将箝位电容吸收的能量返还回主电路,且箝位开关管工作于零电压开通与零电流关断状态.最后利用硬件实验验证了其多谐振软开关特性.     

高效率单相全桥软开关整流器

单相全桥整流器工作在硬开关状态时,随着开关频率和输出功率的增大,开关损耗会显著增大,影响整流器效率的提高.为解决这一问题,提出了一种单相全桥软开关整流器,在整流器处于死区状态时,将要开通的主开关并联的谐振电容的电压能减小至零,主开关动作时能完成零电压软切换,双向辅助开关动作时能完成零电流软切换.分析了整流器的换流过程,实验结果表明主开关和辅助开关完成了软切换动作.因此,该单相全桥软开关整流器在高开关频率下能实现高效率运行.     

数据中心网络拓扑探讨

文章认为数据中心网络的拓扑结构确定其硬件设备的选取标准、设备之间的协同和互联方式、以及数据中心的运行和维护机制。针对各种新的服务需求对数据中心网络提出的更高的结构性要求,业界提出了一些新的数据中心网络拓扑结构。文章介绍并分析了这些拓扑结构,主要有改进树形结构(如Fat-tree、VL2)、递归层次结构(如DCell、FiConn、BCube)、能量比例结构、矩阵结构。摘要:     

软开关逆变器在电动汽车中的应用

对软开关逆变器在电动汽车电气驱动系统中的应用现状和发展方向进行了综述。指出由于电动汽车用逆变器功率多在几千瓦以上，功率器件多采用IGBT，且对体积、重量、冷却及成本有着严格要求，目前的软开关逆变技术尚未能在这些方面取得明显的综合优势。高功率密度、高效率以及高度集成和低成本的软开关逆变器将在电动汽车中占据重要地位。     

新型三相谐振极软开关逆变器

为提高三相逆变器的转换效率,提出了一种新型三相谐振极软开关逆变器拓扑结构,通过在每相桥臂上增加结构简单的辅助电路,实现了主开关的零电压软开通和零电流软关断.逆变器主开关采用金属氧化物半导体场效应晶体管（Metal Oxide Semiconductor Field Effect Transistor,MOSFET）或者绝缘栅双极型晶体管（Insulated Gate Bipolar Transistor,IGBT）时,都能实现无损耗切换,解决了MOSFET内部结电容造成的容性开通损耗问题和IGBT拖尾电流造成的关断损耗问题.分析了电路的工作过程,实验结果表明开关器件完成了软切换.因此,该拓扑结构对于提高逆变器的性能具有重要意义.     

新型单相全桥无源软开关逆变器

为改善单相全桥逆变器的运行效率,设计出了一种新型单相全桥无源软开关逆变器,在每个开关周期的换流过程中,利用逆变器的低损耗辅助谐振电路,使开关器件实现软切换以节约电能.辅助谐振电路只含有电感、电容和二极管等无源器件,不会使逆变器的控制变复杂.此外,在逆变器处于死区状态下,负载电流可通过辅助电路进行续流,减小了死区状态对逆变器输出电流波形的不利影响.文中分析了电路的工作过程,在功率为3kW的单相样机上的实验结果表明开关器件能实现软开关,逆变器输出电流波形的畸变率得到了改善.因此,该拓扑结构对于研发高性能单相全桥逆变器具有重要参考价值.     

软开关技术的分析研究

在对市场及研究领域中最受青睐的软开关技术进行分析的基础上,根据软开关表现出来的优良特性以及结构特点,对变换器进行了整合研究。     

一种无源软开关技术的研究

开关电源的高频化使得功率开关的损耗加大,采用软开关技术是减小损耗的有效手段。文中提出了一种采用无源器件构成无损耗吸收回路的结构,可以实现PWM开关电源中开关管的零电流开通和零电压关断,而且不会给开关管带来过大的附加电压应力和电流应力。文中对该电路工作原理和能量转移关系进行了分析,给出了关键参数的选取原则。最后利用saber软件对电路进行了仿真。     

组合软开关功率变换器的理论和应用

在吸收技术和谐振式软开关技术的基础上提出了组合软开关功率变换器的理论,并将此理论应用到各种变换器,获得了四种组合软开关功率拓扑.在此基础上具体讨论一实用的单相全桥组合软开关逆变电路.该电路结构简单,控制容易.实验结果证明了理论分析的正确性.     

现代通信系统原理技术与DSP实验平台的研制

介绍了现代通信系统原理技术与DSP实验平台的功能和软硬件没计。     

Proposal of a Soft-Switching Single-Phase Three-Level Rectifier

This paper is concerned with the study of a single-phase boost-type three-level rectifier. The converter is supposed to present high input power factor, low current harmonics, low total harmonic distortion, and simple control scheme. In order to minimize switching losses, a passive nondissipative snubber is associated with the aforementioned converter. The theoretical analysis, design procedure, and analytical results regarding a 1.2-kW prototype are presented to validate the proposal.     

利用FPGA实现多种串行拓扑结构

对更大带宽的需求在典型的太位级(Terabit)系统中，瓶颈通常存在于系统互联一级，即系统内不同器件间互相通信以及与外部其它系统通信的速度。业界曾试图通过生产越来越快的CPU来克服这一问题。然而这一方法，似乎已陷入了僵局，因为用户已经不能再感受到与CPU性能直接成比例的巨大系统性能提升。正如莫尔定律所表明的，处理器带宽每18个月翻一翻，但PC总线的性能却要每三年才能提高一倍。很明显，这是无法仅仅通过继续提高CPU速度来克服的巨大性能缺口。现在处理器速度已经达到2GHz，并将很快达到10GHz，需要一种新的系统互连技术来…     

Research on Hybrid-Clamped Multilevel-Inverter Topologies

The concept of hybrid clamped is proposed in multilevel-inverter topologies, and a hybrid-clamped multilevel-inverter topology comprising active and passive clamping devices is presented in this paper. In this topology, the dc-link capacitor voltages can be balanced without additional circuitry or separated dc voltage sources, regardless of load characteristics. It can be used in real and reactive power conversion applications. The topology structure, operating principle, and self-voltage balancing ability are analyzed. In addition, the validity is confirmed by simulations and experiments based on a five-level inverter. Finally, the functions of different clamping devices are compared     

3-D Topologies for Networks-on-Chip

Several interesting topologies emerge by incorporating the third dimension in networks-on-chip (NoC). The speed and power consumption of 3D NoC are compared to that of 2D NoC. Physical constraints, such as the maximum number of planes that can be vertically stacked and the asymmetry between the horizontal and vertical communication channels of the network, are included in speed and power consumption models of these novel 3D structures. An analytic model for the zero-load latency of each network that considers the effects of the topology on the performance of a 3D NoC is developed. Tradeoffs between the number of nodes utilized in the third dimension, which reduces the average number of hops traversed by a packet, and the number of physical planes used to integrate the functional blocks of the network, which decreases the length of the communication channel, is evaluated for both the latency and power consumption of a network. A performance improvement of 40% and 36% and a decrease of 62% and 58% in power consumption is demonstrated for 3D NoC as compared to a traditional 2D NoC topology for a network size of N = 128 and N = 256 nodes, respectively.     

Source and Load Adaptive Design for a High-Power Soft-Switching Inverter

The operating range of a zero-voltage switched inverter is typically constrained by the source and load variation. This paper adopts a variable turns ratio coupled magnetic type soft-switching inverter for a wide-range source and load adaptability. The operating principle and design guideline are described in detail. Design examples have been verified with computer simulation and hardware implementation. Experimental results of a 120-kW hardware prototype are presented to show superiority of the proposed soft-switching inverter design and significant reduction on loss and dv/dt