共查询到20条相似文献,搜索用时 0 毫秒
1.
A CMOS voltage reference generator, based on the difference between the gate-source voltages of two NMOS transistors, has been implemented with AMS 0.35 μm CMOS technology (Vthn=0.45 and at 0 °C). The minimum and maximum supply voltages that ensure the correct operation of the reference voltage generator, are 1.5 and 4.3 V, respectively. The supply current at the maximum supply voltage and at 80 °C is 2.4 μA. A temperature coefficient of 25 ppm/°C and a line sensitivity of 1.6 mV/V are achieved. The power supply rejection ratios without any filtering capacitor at 100 Hz and 10 MHz are larger than −74 and −59 dB, respectively. The occupied chip area is 0.08 mm2. 相似文献
2.
《Solid-State Circuits, IEEE Journal of》1980,15(6):1070-1076
A 5 V internally temperature regulated voltage reference integrated circuit, which achieves 0.3 ppm//spl deg/C TC over the temperature range -55/spl deg/C to 125/spl deg/C, is described. It is built using a buried zener reference in a dielectrically isolated complementary bipolar process which employs laser trimmed NiCr thin film resistors and a high thermal resistance epoxy die attach. 相似文献
3.
4.
5.
一种光电式电压传感器及其温度漂移补偿方法 总被引:1,自引:1,他引:0
提出了一种利用发光二极管(LED)电致发光(EL)效 应的光电式电压传感器,其传感单元仅由一个电阻器和 两个LED组成。被测交流电压施加于一个高阻值(例如100MΩ)的电 阻器,产生μA级的泄漏电流并驱动 两个LED发光,用两根塑料光纤将此光强传输至光电探测器,则通过测量光强度即可获知被 测电压。选用 阻值约为100MΩ的电阻器,在室温条件下实验测量了0.2~5.5kV的工频电压,传感器输出与被测电压有效 值之间存在较好的线性关系,其非线性误差低于 3.1%。同时,提出并 实验验证了一种利用两路光传感信号 实现电压传感器输出随温度漂移的补偿方法,在5.5kV的被测电压范 围及-40~+60℃的温度范围内,补偿 后传感器输出的温度漂移约为±2.1%。本文的光电式电压传感器不需 要额外光源,并具有结构简单、成本低等优点。 相似文献
6.
This paper presents the design and experimental performance of a second-order bandgap voltage reference integrated circuit (IC). Experimentally observed nominal reference voltage at room temperature is 1.150 V with best temperature performance of 3 mV variation over −40 to 120 °C. A 5-bit resistor trimming is used to compensate the variation of reference voltage due to layout mismatch and process variation. A trimming methodology is described in this paper to optimize both the temperature performance and reduce the variation of the room temperature voltage over different samples. Even with best temperature performance trim-code, the absolute variation in reference voltage over 20 samples is 85 mV which is trimmed to ±11 mV (1.3%) using the proposed trimming methodology. The second-order bandgap circuit is designed in a 0.5 μm BiCMOS process with less than 50 μA current consumption. 相似文献
7.
基于标准N阱CMOS工艺设计了一种带隙基准电压产生及输出驱动转换电路。该电路采用0.6μmCSMC-HJN阱CMOS工艺验证,HSPICE模拟仿真结果表明电路输出基准电压为1.25V左右;在–55℃~125℃温度范围内的典型工艺参数条件下,电路温度系数仅为7×10-6/℃;电源电压范围为4V ̄6V,在产生标称1.25V基准电压的同时,可以为负载提供1mA ̄2mA的电流驱动能力。 相似文献
8.
9.
10.
Liangbo Xie Jiaxin Liu Yao Wang Yu Han Guangjun Wen 《Analog Integrated Circuits and Signal Processing》2014,81(1):313-324
A low power CMOS voltage reference with process compensation is presented in TSMC 0.18-μm standard CMOS technology. Detailed analysis of the process compensation technique is discussed. The circuit is simulated with Spectre. Simulation results show that, without any trimming procedure, the output voltage achieves a maximum deviation of 0.35 % across different process corners. The temperature coefficient of the proposed circuit is 12.7 ppm/°C in a temperature range from ?40 to 85 °C and the line sensitivity is 0.036 mV/V with a supply voltage range from 1.2 to 2.5 V under typical condition. The maximum supply current is 390.4 nA at maximum supply voltage and ?40 °C. The power supply rejection ratio is ?68.3 dB at 100 Hz and 2.5 V without any filtering capacitor. 相似文献
11.
电压基准在模拟电路中提供一个受电源或温度等影响较小的参考电压,以保证整个电路正常工作.设计了一种低温漂低功耗带隙基准电压源,采用不受电源影响的串联电流镜做偏置,利用PTAT电压的正向温度系数和基极发射极电压的负向温度系数特性,以适当的系数加权构造零温度系数的电压量.该设计避开了运放的应用,结构简易,原理清晰,便于入门级的同学在短时间内学习掌握.0~70℃范围内,温漂系数为16.4 ppm/℃.供电电压在5~6V 范围内变化时,电源抑制比达57.7 dB.总输出噪声为140.3 μV,功耗为300.6 μW. 相似文献
12.
电压基准在模拟电路中提供一个受电源或温度等影响较小的参考电压,以保证整个电路正常工作。设计了一种低温漂低功耗带隙基准电压源,采用不受电源影响的串联电流镜做偏置.利用PTAT电压的正向温度系数和基极发射极电压的负向温度系数特性,以适当的系数加权构造零温度系数的电压量。该设计避开了运放的应用.结构简易,原理清晰,便于入门级的同学在短时间内学习掌握。0-70℃范围内,温漂系数为16.4ppm/℃。供电电压在5-6V范围内变化时,电源抑制比达57.7dB。总输出噪声为140.3μV,功耗为300.6μW。 相似文献
13.
14.
Tien-Yu Lo Chung-Chih Hung Mohammed Ismail 《Analog Integrated Circuits and Signal Processing》2010,62(1):9-15
A fully CMOS based voltage reference circuit is presented in this paper. The voltage reference circuit uses the difference
between gate-to-source voltages of two MOSFETs operating in the weak-inversion region to generate the voltage with positive
temperature coefficient. The reference voltage can be obtained by combining this voltage difference and the extracted threshold
voltage of a saturated MOSFET which has a negative temperature coefficient. This circuit, implemented in a standard 0.35-μm
CMOS process, provides a nominal reference voltage of 1.361 V at 2-V supply voltage. Experimental results show that the temperature
coefficient is 36.7 ppm/°C in the range from −20 to 100°C. It occupies 0.039 mm2 of active area and dissipates 82 μW at room temperature. With a 0.5-μF load capacitor, the measured noise density at 100 Hz
and 100 kHz is 3.6 and
2 5 \textnV/?{\textHz} , 2 5\,{\text{nV}}/\sqrt {\text{Hz}} , respectively. 相似文献
15.
This paper proposes a new pulse-frequency-modulation (PFM) digital pixel sensor (DPS) with a variable reference voltage. An
in-pixel variable reference voltage generator is employed to ramp the reference voltage of the comparator locally such that
the comparison of photo diode current and the reference voltage can take place earlier. This expands the dynamic range of
the pixel sensor when the level of illumination is low. The complexity of routing of the proposed pixel sensor are comparable
to that of digital pixel sensor with a constant reference voltage. The additional hardware cost of the proposed digital pixel
sensor is only a capacitor and two static inverters, resulting in a fill factor that is comparable to those of digital pixel
sensors with a constant global reference voltage. Factors that are critically to the performance of the proposed pixel sensor
are examined in detail. The proposed digital pixel sensor has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed
using Spectre with BSIM3V3 device models. Simulation results demonstrate that the proposed PFM digital pixel has a dynamic
range of 120 dB when the integration time is set to 60 μs, approximately 40 dB more than the corresponding PFM digital pixel
sensor with a constant reference voltage. The fill factor of the proposed pixel sensor is 20%, comparable to that of pixel
sensors with a constant reference voltage. 相似文献
16.
In this work a low power consumption reference voltage in commercial 40 nm technology is proposed. It adopts a new approach to produce a temperature invariant reference voltage for outdoor RFID applications. To do so, the positive temperature coefficient (TC) of the produced output voltage of a Dickson charge pump is used to cancel out the negative temperature coefficient of the threshold voltage (Vth) of CMOS devices. The result is, according to the post-layout Cadence simulation, a 1.224 V reference voltage with a TC of 60 ppm°C−1 in the temperature range of −10 °C to 125 °C. The circuit consumes 7 nW with an active area of 0.00033 mm2. 相似文献
17.
18.
设计了一种带温度补偿的无运放低压带隙基准电路。提出了同时产生带隙基准电压源和基准电流源的技术,通过改进带隙基准电路中的带隙负载结构以及基准核心电路,基准电压和基准电流可以分别进行温度补偿。在0.5μmCMOS N阱工艺条件下,采用spectre进行模拟验证。仿真结果表明,在3.3V条件下,在-20~100℃范围内,带隙基准电压源和基准电流源的温度系数分别为35.6ppm/℃和37.8ppm/℃,直流时的电源抑制比为-68dB,基准源电路的供电电压范围为2.2~4.5V。 相似文献
19.
20.
Nancovska I. Jeglic A. Fefer D. Todorovski L. 《Industrial Electronics, IEEE Transactions on》2000,47(1):186-192
In this paper, we use predictive models for voltage correction in a high-precision DC voltage reference source (DCVRS) based on Zener diodes. Voltage reference elements, which compose the DCVRS, are improved by implementing a control loop with built-in predictors. Thus, the sensitivity of the system is reduced and, thereby, the stability of the DCVRS is improved. The predictive abilities of two different paradigms, neural-network-based predictors and difference equation predictors obtained by equation discovery system LAGRAMGE, are compared 相似文献