基于非延时积分器Delta-Sigma调制的电容传感器探测电路

研究一种基于非延时积分器Delta-Sigma调制的差分电容探测接口电路,该电路的Delta-Sigma调制使用非延时积分器将采样与积分同时进行,减小普通Delta-Sigma调制型电容探测电路中积分保持阶段的电荷泄露效应,仿真结果表明该结构可明显提高探测较小电容的信噪比,增加了调制器可探测电容的动态范围.     

差分电容电压转换电路噪声性能分析及测试

本文对电容检测式加速度计系统中广泛采用的差分电容电压转换电路建立了电容电压转换电路的等效噪声模型,并对双运放集成电路芯片所构成的差分电容电压转换电路的本底噪声以及仪表放大器输出端的噪声进行了测试,将电容电压转换电路本底噪声中的差模噪声分量和共模噪声分量进行了分离.测试结果表明影响加速度计系统噪声性能的差模噪声分量占电容...     

电容式力平衡加速度计的设计

电容式微机械加速度计是一种将加速度转换成差分电容、通过检测差分电容的变化来检测加速度大小的一类高精度的惯性传感器.利用开关电容电路实现C-V变换,利用反馈静电力实现力平衡闭环控制,设计了一种电容式微机械加速度计.通过构建电容式加速度传感器及外围电路的数学模型,推导了闭环工作的系统函数.并对实际系统进行研制,最后给出了整个系统的测试结果.     

基于电容桥的差动电容检测方法

数字闭环石英挠性加速度计系统主要由石英挠性加速度计表头和数字检测电路组成,其极限精度取决于差动电容检测电路的灵敏度。针对数字闭环石英挠性加速度计前端差动电容检测的需求,给出了一种基于电容桥的差动电容检测方法。利用数字电路产生高频方波进行单载波调制,同时利用交流电容桥结构对载波信号进行处理,并设计后续的差分放大电路对载波信号进一步处理最终实现对微弱差动电容变化的检测。经过实验验证,检测电路对电容的检测最终实现最小分辨率约为1. 8 f F(对应加速度变化1μgn)。     

非硅MEMS电容式微加速度计的测控电路设计

为了提高MEMS微加速度计的量程和抗过载能力,设计了基于UV-LIGA技术的非硅MEMS电容式微加速度计。针对该加速度计,设计了基于相敏解调的差分电容测控电路。检测通道主要由前置级电荷积分放大电路、带通滤波电路、相敏解调器、低通滤波以及电平转换电路组成,反馈通道由低通滤波和加法电路组成。完成了微加速度计测控电路的调试和检测通道的标定实验,实验表明:检测通道的量程约为±6 pF,灵敏度为89.3 mV/pF,线性度为2.59%,满足加速度计检测通道的要求。     

磁悬浮转子微陀螺的电容检测系统分析和实现

介绍了一种新型磁悬浮转子微陀螺的电容检测方案,其特点是检测定子上径向分布的电容极板和悬浮转子形成差动电容的变化.检测电路为基于相关检测原理的交流电容电桥的方法.电路实现中采用积分电荷放大器作为前置级,对其输出和噪声进行了深入的分析.之后,前置级的输出信号经过低噪声放大器进行放大,再通过带通滤波以及相关解调等电路实现检测系统需要的输出幅值和信噪比.实验证明,实现的检测系统对角度输入有较好的线性响应,角度分辨率达到0.1°,即可检测到的电容变化约为1fF.     

用于差动电容传感器的高分辨率电路的研究

本文提出了一种用于差动电容传感器的电路 ,采用弱信号检测技术 ,将被测微小电容变化量转换成直流电压信号 .输出电压与差动电容变化量成线性关系 ,经过单片机处理后能自动补偿偏差电容和电路的漂移 .实验表明 ,最小被测电容变化量可达 8f F,灵敏度可达 3.82× 10 1 1 V/ F.实验结果和理论分析具有良好的一致性     

一个16位高性能音频Sigma-Delta调制器

设计了一个适用于音频信号系统的sigma-delta调制器.针对24KHz的音频信号,比较了各种调制器结构,选择了二阶一位的采样型结构.sigma-delta调制器工作在1.8V电源电压下,采用全差分开关电容电路,功耗为6.5mW.仿真结果显示在256倍的过采样率,12.288MHz的采样频率下,信噪比(SNR)可达到98dB,实现16位的精度.该调制器采用UMC 0.18μm混合信号工艺实现,电容采用MIM结构,有效面积为0.209mm2.完全可用于设计低成本、高性能芯片.     

基于红外热效应的电容式气体传感器研究

提出了一种利用气体吸收红外并产生热效应现象检测气体的方法,设计并制造了一种红外电容式气体传感器.该气体传感器采用在密封气室中密封纯净的被测气体,利用被测气体吸收红外的热效应并由此产生压力变化,该压力变化转换为弹性应变膜的应变致使平板电容器的电容变化,由于环境中被测气体与密封气室中被测气体对红外的差分吸收,使得电容的变化...     

单载波调制型加速度计差分电容检测电路

单载波调制型差分电容检测电路是为满足微机械加速度计高线性度、高分辨率的需要而设计的,本文给出了检测电路的原理图,分析了寄生电阻、电容模型,从理论上证明该电路可有效消除寄生电阻和电容的影响,并推导了各关键功能模块的传递函数;此外,从电路的各个局部环节研究了会对电路性能造成影响的因素,包括放大电路的噪声源、载波信号稳定性、两路电荷放大器一致性、调制信号与参考信号相位同步等.经理论推导,通过改进和避免不利因素的影响即可保证电路的稳定性,适用于微机械加速度计检测领域.     

Delta-sigma (ΔΣ) frequency synthesizers for wireless applications

This paper describes the state-of-the-art design approaches to delta-sigma (ΔΣ) frequency synthesizers for wireless transceiver applications. Various synthesizer architectures, including the integer and fractional-N synthesizers, and frequency-to-digital converters (FDC) based digital frequency synthesizers are described. Design specifications for several loop parameters such as noise shaper order in the feedback modulator, loop filter bandwidth, VCO phase noise are based on modulation accuracy and frequency resolution specifications. Advantages of digital loop filter based ΔΣ frequency synthesizers are analyzed.     

跳频通信宽频段频率合成器的分析与实现

设计和实现了一种高分辨率、低相位噪声、可用于快速跳频的基于∑-Δ调制的小数分频宽频段跳频频率合成器。主工作频率范围为1 800 MHz～1 900 MHz,辅助工作频率范围为600 MHz～820MHz,在偏离主频10 kHz时相位噪声优于-80 dBc/Hz,非谐波杂散小于-60 dBc,频率分辨率小于100Hz,换频时间小于50μs,这种新型频率合成器简单实用、性价比高,有广阔的应用前景。     

Deterministic Importance Sampling with Error Diffusion

This paper proposes a deterministic importance sampling algorithm that is based on the recognition that delta-sigma modulation is equivalent to importance sampling. We propose a generalization for delta-sigma modulation in arbitrary dimensions, taking care of the curse of dimensionality as well. Unlike previous sampling techniques that transform low-discrepancy and highly stratified samples in the unit cube to the integration domain, our error diffusion sampler ensures the proper distribution and stratification directly in the integration domain. We also present applications, including environment mapping and global illumination rendering with virtual point sources.     

Behavioral modeling of clock feed-through and channel charge injection non-ideal effects in SIMULINK for switched-capacitor integrator

Sigma–Delta modulator ADCs used in signal processing applications usually, are implemented by switched-capacitor (SC) circuits and CMOS transmission gates due to its simplicity for implementation. Channel charge injection (CCI) and clock feed-through (CFT) are two major non-ideal effects existing in TG switches and SC integrators reducing modulator total SNR, its linearity and its total gain. This paper presents a precise model for SC integrator including CCI and CFT non-ideal effects in MATLAB SIMULINK environment which allows designers to perform time-domain behavioral simulations of switched-capacitor (SC) Sigma–Delta modulators. Evaluation and validation of extracted models were performed via behavioral and transistor-level simulations for modeled SC integrator, second and third order modulators using SIMULINK and Agilent ADS environments with a generic 0.18 μm CMOS technology. Non-idealities and nonlinearities effects are apparently observed by comparing the ideal modulator in behavioral analysis and actual modulator in circuit-level environment.     

一种高性能数字滤波器的ASIC设计方法与Matlab仿真验证

介绍一种用于高性能ΔΣ模数转换器的数字滤波器的设计方法,分析其频率特性和高通滤波特性,给出频率仿真结果.依靠Matlab软件的语言环境验证设计方法,编程实现数字滤波器的行为级仿真,这与其它数字滤波器的设计中利用Matlab信号处理工具箱中专门用于滤波器设计与分析的工具完全不同.按照这种设计思想实现的滤波器通过Matlab仿真获得了很好的性能.该方法适用于对硬件面积有严格要求的数字滤波模块的ASIC设计.     

高性能开关电流存储单元的设计及应用

对第一代开关电流存储单元产生的时钟馈通误差做了合理的近似分析,设计了一种高性能开关电流存储单元。该电路仅在原存储单元的基础上增加了一个MOS管,使误差降为原来的4%,是同类研究中最简单的结构。用它构造的双线性积分器性能良好,可作为滤波器、Σ-△调制器等系统的基本模块。     

The dynamic behaviour of data-driven Δ-M and ΔΣ-M in sliding mode control

In recent years, delta (Δ-M) and delta-sigma modulators (ΔΣ-M) are increasingly being used as efficient data converters due to numerous advantages they offer. This paper investigates various dynamical features of these modulators/systems (both in continuous and discrete time domain) and derives their stability conditions using the theory of sliding mode. The upper bound of the hitting time (step) has been estimated. The equivalent mode conditions, i.e. where the outputs of the modulators are equivalent to the inputs, are established. The results of the analysis are validated through simulations considering a numerical example.     

机场噪声实时监测系统的设计与应用

机场噪声对周边社区居民的健康生活影响越来越突出，解决噪声问题首先要对飞机噪声进行监测。机场噪声实时监测系统采用双核 24 位Δ-Σ方式的 AD 采集技术，利用 DSP 的计算能力，实现飞机噪声数据的高速采集和实时计算。利用计算得到的时间-声级曲线等参数识别飞机噪声事件，并将声暴露级、声压等参数通过网络发送到云端进行处理，得到有利于机场噪声管理所需参考文件。     

An equal-ripple pulse frequency modulator in control systems

The design of an equal-ripple modulator for regulator systems with type o plants is presented in this paper. The goal of this design is to produce an equal-ripple steady-state response. To conserve the control effort, rids modulator drives the system output towards the desired level and lets it relax naturally to the zero-state. A number of systems using this modulator were simulated on a digital computer and the results are presented. It can be seen from these results, that the modulator achieves an equal.ripple steady-state response regardless of system parameter values. To employ the modulator in a control system requires only a noncritical choice of the pulse height and width. Large pulse sizes will decrease the transient rise time but will increase the magnitude of the steady-state error. As the modulator threshold level is obtained recursively from information gained from the system error, it possesses "adaptive" qualities. Therefore, it particularly recommends itself to situations in which system parameter variations are expectecd.