Design and Evaluation of Cascode GaN FET for Switching Power Conversion Systems

In this paper, we present the design and characterization analysis of a cascode GaN field‐effect transistor (FET) for switching power conversion systems. To enable normally‐off operation, a cascode GaN FET employs a low breakdown voltage (BV) enhancement‐mode Si metal‐oxide‐semiconductor FET and a high‐BV depletion‐mode (D‐mode) GaN FET. This paper demonstrates a normally‐on D‐mode GaN FET with high power density and high switching frequency, and presents a theoretical analysis of a hybrid cascode GaN FET design. A TO‐254 packaged FET provides a drain current of 6.04 A at a drain voltage of 2 V, a BV of 520 V at a drain leakage current of 250 μA, and an on‐resistance of 331 mΩ. Finally, a boost converter is used to evaluate the performance of the cascode GaN FET in power conversion applications.     

寄生电感对低压增强型GaN HEMT开关行为的影响

寄生电感是影响功率管开关特性的重要因素之一,开关频率越高,寄生电感对低压增强型氮化镓高电子迁移率晶体管(GaN HEMT)的开关行为影响越深,使其无法发挥高速开关的性能优势。通过建立数学模型,理论分析了考虑各部分寄生电感后增强型GaN HEMT的开关过程,并推导了各阶段的持续时间和影响因素,然后通过建立双脉冲测试平台,对各部分寄生电感对开关特性的具体影响进行了实验验证。实验结果表明,寄生电感会使开关过程中的电流、电压出现振荡,影响开关速度和可靠性,并且各部分寄生电感对增强型GaN HEMT的开关过程影响程度不同,在实际PCB布局受到物理限制时,需要根据设计目标优化布局,合理分配各部分寄生电感以获得最优的开关性能。     

A New Strained‐Si Channel Power MOSFET for High Performance Applications

We propose a novel power metal oxide semiconductor field effect transistor (MOSFET) employing a strained‐Si channel structure to improve the current drivability and on‐resistance characteristic of the high‐voltage MOSFET. A 20 nm thick strained‐Si low field channel NMOSFET with a 0.75 µm thick Si_0.8Ge_0.2 buffer layer improved the drive current by 20% with a 25% reduction in on‐resistance compared with a conventional Si channel high‐voltage NMOSFET, while suppressing the breakdown voltage and subthreshold slope characteristic degradation by 6% and 8%, respectively. Also, the strained‐Si high‐voltage NMOSFET improved the transconductance by 28% and 52% at the linear and saturation regimes.     

Ultra‐Low‐Power Differential ISFET/REFET Readout Circuit

A novel ultra‐low‐power readout circuit for a pH‐sensitive ion‐sensitive field‐effect transistor (ISFET) is proposed. It uses an ISFET/reference FET (REFET) differential pair operating in weak‐inversion and a simple current‐mode metal‐oxide semiconductor FET (MOSFET) translinear circuit. Simulation results verify that the circuit operates with excellent common‐mode rejection ability and good linearity for a single pH range from 4 to 10, while only 4 nA is drawn from a single 1 V supply voltage.     

寄生电感对碳化硅MOSFET开关特性的影响

相比于传统的Si IGBT功率器件而言,碳化硅MOSFET可达到更高的开关频率、更高的工作温度以及更低的功率损耗.然而,快速的暂态过程使开关性能对回路的寄生参数更加敏感.因此,为了评估寄生电感对碳化硅MOSFET开关性能的影响,基于回路电感的概念,将栅极回路寄生电感、功率回路寄生电感以及共源极寄生电感等效成3个集总电感,并且从关断过电压、开通过电流及开关损耗等3个方面,对这3个电感对SiC MOSFET开关性能的影响进行了系统的对比研究.研究表明:共源极寄生电感对开关的影响最大,功率回路寄生电感次之,而栅极回路寄生电感影响最小.最后,基于实验分析结果,为高速开关电路的布局提出了一些值得借鉴的意见.     

SiC和GaN电力电子器件的研究进展

与传统的Si基器件相比,SiC和GaN器件具有工作温度高、击穿电压高、开关速度快等优势,因此SiC和GaN材料是制备电力电子器件的理想材料。总结了近年来SiC和GaN电力电子器件的研究进展,包括二极管,MOSFET,JFET和BJT结构的SiC器件,以及SBD,PN结二极管,HEMT和MOSFET结构的GaN器件。     

采用分段式自适应PWM/PFM调制的Buck型DC-DC转换器设计北大核心

为了在轻重负载条件下获得更高的转换效率，采用分段式结构和导通电阻更小的NMOS作为输入级，并采用PWM/PFM双调制方式，设计了一种Buck型DC-DC转换器。为解决PWM/PFM调制信号切换问题，采用零电流检测方式进行切换。利用断续导通模式(DCM)和连续导通模式(CCM)下端NMOS管导通时电感电压的不同，检测下端NMOS在导通时电感电压大于零的周期。当电感电压大于零的周期大于2时，则处于DCM模式并自动采用PFM调制模式，关闭一部分功率管以减小开关频率和功率管寄生电容，优化轻载效率；反之则处于CCM模式并采用PWM调制。仿真结果表明，在负载电流10～1 000 mA范围内，该电路可以在两种调制模式平稳切换，在800 mA时峰值效率可提升到96%以上。     

GaN功率器件栅驱动电路技术综述

第三代宽禁带半导体GaN晶体管具有低导通阻抗、低寄生参数和更快的开关速度,有望取代传统Si MOSFET,成为未来高性能电源系统实现方案。GaN器件的优势在400 V以上高压系统中更为明显,可以实现更高的开关频率和功率密度,显著提高系统的转换效率,特别适合电源模块小型化发展趋势。介绍了200 V以下低压GaN驱动电路的应用和关键技术。分析了从低压系统拓展到400 V以上高压系统时需要作出的优化与改进。详细介绍了高压GaN系统中基于无磁芯变压器耦合隔离的隔离驱动技术和耗尽型GaN负压栅驱动技术。最后,总结了目前高压GaN驱动电路在工业领域的具体应用。     

中小功率单相全桥节能型谐振极逆变器

中小功率单相全桥逆变器常以金属氧化物半导体场效应晶体管（Metal Oxide Semiconductor Field Effect Transistor,MOSFET）作为开关器件,为实现逆变器在高开关频率下的节能运行,本文提出了一种单相全桥节能型谐振极逆变器拓扑结构,其桥臂上分别并联相同的辅助谐振电路.桥臂上的主开关开通前,其并联的谐振电容的电压能周期性变为零,使主开关完成零电压软开通,可消除MOSFET的容性开通损耗,有利于逆变器的节能运行.本文分析了电路的工作模态,实验结果表明主开关器件处于零电压软切换.因此,该拓扑结构对于研发高性能的中小功率单相全桥逆变器具有参考价值.     

High voltage output circuit using n- and n-LDMOSFET with thick gate oxide for PDP driver IC

A novel high voltage output circuit with thick-gated LDMOSFETs is proposed to reduce the chip size and to improve the switching speed for the plasma display panels (PDP) driver IC. The chip size of the PDP driver IC using the proposed output circuit is reduced by 35% with a similar falling time compared with the conventional one. The falling time of the proposed output circuit is about 2.5 times faster than that of the conventional one under the same size when the supply voltage and load capacitance are 180 V and 100 pF, respectively.     

基于FDSOI的TFET和MOSFET总剂量效应仿真

对基于全耗尽绝缘体上硅(FDSOI)的隧穿场效应晶体管(TFET)器件和金属氧化物半导体场效应晶体管(MOSFET)器件进行了总剂量(TID)效应仿真,基于两种器件不同的工作原理,研究了总剂量效应对两种器件造成的电学影响,分析了辐照前后TFET和MOSFET的能带结构、载流子密度等关键因素的变化。仿真结果表明:两种器件在受到较大辐射剂量时(1 Mrad (Si)),TFET受辐射引起的固定电荷影响较小,仍能保持较好的开关特性、稳定的阈值电压;而MOSFET则受固定电荷的影响较大,出现了背部导电沟道,其关态电流增加了几个数量级,开关特性发生了严重退化,阈值电压也严重地向负电压偏移。此外,TFET的开态电流会随着辐照剂量的增加而减小,这与MOSFET的表现恰好相反。因此TFET比MOSFET有更好的抗总剂量效应能力。     

中小功率三相高频节能型谐振直流环节逆变器

为使中小功率三相逆变器实现在高开关频率下的节能运行,首次提出了一种新型三相谐振直流环节逆变器拓扑结构.设置在逆变器直流环节的辅助电路参与换流过程时,桥臂输入端的直流环节电压能周期性形成零电压状态,主开关和辅助开关都能完成零电压软切换.在高频金属氧化物半导体场效应晶体管（Metal Oxide Semiconductor Field Effect Transistor,MOSFET）作为该逆变器的开关器件时,实现零电压软切换能消除MOSFET的容性开通损耗,有利于优化逆变器效率.文中分析了电路的工作流程.2.5kW样机上的实验结果表明开关器件都处于零电压软切换.因此,该拓扑结构对于研发高性能的中小功率三相逆变器具有参考价值.     

Double gate lateral IGBT on partial membrane

A new SOI LIGBT(lateral insulated-gate bipolar transistor)with cathode-and anode-gates on partial mem-brahe is proposed.A low on-state resistance is achieved when a negative voltage is applied to the anode gate.In the blocking state,the cathode gate is shortened to the cathode and the anode gate is shortened to the anode,leading to a fast switching speed.Moreover,the removal of the partial silicon substrate under the drift region avoids collecting charges beneath the buried oxide,which releases potential lines below the membrane,yielding an enhanced breakdown voltage(BV).Furthermore,a high switching speed is obtained due to the absence of the drain-substrate capacitance.Lastly,a combination of uniformity and variation in lateral doping profiles helps to achieve a high BV and low special on-resistance.Compared with a conventional LIGBT,the proposed structure exhibits high current capability,low special on-resistance,and double the BV.     

SiC MOSFET栅极驱动电路研究综述

凭借碳化硅(SiC)材料的宽禁带、高击穿电场、高电子饱和速率和高导热性等优点,SiC MOSFET广泛应用在高压、高频等大功率场合。传统基于硅(Si)MOSFET的驱动电路无法完全发挥SiC MOSFET的优异性能,针对SiC MOSFET的应用有必要采用合适的栅驱动设计技术。目前,已经有很多学者在该领域中有一定的研究基础,为SiC MOSFET驱动电路的设计提供了参考。对现有基于SiC MOSFET的PCB板级设计技术进行了详细说明,并从开关速度、电磁干扰噪声以及能量损耗等方面对其进行了总结和分析,给出了针对SiC MOSFET驱动电路的设计考虑和建议。     

Design and simulation of a novel E-mode GaN MIS-HEMT based on a cascode connection for suppression of electric field under gate and improvement of reliability

We proposed a novel AlGaN/GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT) with a dual-gate structure and carried out the detailed numerical simulation of device operation using Silvaco Atlas. The dual-gate device is based on a cascode connection of an E-mode and a D-mode gate. The simulation results show that electric field under the gate is decreased by more than 70% compared to that of the conventional E-mode MIS-HEMTs (from 2.83 MV/cm decreased to 0.83 MV/cm). Thus, with the discussion of ionized trap density, the proposed dual-gate structure can highly improve electric field-related reliability, such as, threshold voltage stability. In addition, compared with HEMT with field plate structure, the proposed structure exhibits a simplified fabrication process and a more effective suppression of high electric field.     

Polarization Engineering on Buffer Layer in GaN-Based Heterojunction FETs

To improve the pinched-off characteristics of an AlGaN/GaN heterojunction field effect transistor (HJFET), the conduction band potential of an incorporated AL_xGa_1-xN buffer is designed to be upwardly convex in a band diagram. This approach utilizes the polarization effects specific to GaN-based materials by lowering the Al content x from 30% to 5% almost linearly toward the front side. Fabricated field effect transistors (FETs) adopting the designed buffer have demonstrated the following advanced characteristics in comparison to those of a FET adopting a conventional GaN buffer: less than one-tenth of the buffer leakage current, a gate-to-drain breakdown voltage BV_gd twice or more as high, and remarkably improved carrier confinement and pinched-off behavior. The FETs are operated in an enhancement mode with a gate-to-channel distance thick enough to prevent tunneling current through the gate.     

Lossless broad-band monolithic microwave active inductors

Lossless broadband microwave active inductors for general-purpose use in microwave circuits are proposed, and their characteristics are discussed. These active inductors are composed of a common-source cascode FET and a feedback FET, and operate in a wide frequency range with very low series resistance. Their low-loss characteristics are demonstrated by simulation and experimental results. A maximum Q factor of 65 is obtained. Theoretically, it can reach infinity. The inductance value can be controlled by an external voltage control     

中小功率三相高频节能型谐振极逆变器

作为中小功率发电系统重要环节的三相逆变器的开关频率增大时,开关损耗也显著增大,不利于节能。为实现中小功率三相逆变器的高频化和节能化,提出了一种三相零电压开关谐振极逆变器拓扑结构.当桥臂上的辅助谐振电路处于工作状态时,开关器件并联的电容的电压能周期性变化到零,使开关器件完成零电压软切换,这有利于高频金属氧化物半导体场效应晶体管（Metal Oxide Semiconductor Field Effect Transistor,MOSFET）作为逆变器的开关器件.分析了电路的工作流程,实验结果表明开关器件处于零电压软切换.因此,该拓扑结构对于研发高性能的中小功率三相逆变器具有参考价值.     

一种新型的常通型GaN HEMT器件

对新型常通型GaN HEMT器件的特性和参数进行了研究。阐述了其静态特性、动态特性及电流崩塌问题。针对其动态特性,与相近规格的Si MOSFET器件（TK2Q60D）在开通、关断时间与栅源电压的关系方面进行了对比,探讨了常通型GaN HEMT器件在不同输入电压和不同开关频率下的电流崩塌现象,并采用Boost电路,对常通型GaN HEMT器件和Si MOSFET器件的最高工作频率能力进行了对比。实验结果表明,常通型GaN HEMT器件具有更高的工作频率,且工作频率的升高不影响电流崩塌现象。     

The SINFET—A Schottky injection MOS-gated power transistor

A new MOS-gated power device, the Schottky injection FET (SINFET), is described in this paper. The device offers 6 times higher current handling capability than conventional n-channel power LDMOS transistors of comparable size and voltage capability and still maintains a comparable switching speed. The low on-resistance is obtained by conductivity modulation of the high-resistivity n- drift region using a Schottky injector. Since only a small number of minority carriers are injected, the speed of the device is not degraded substantially and high latchup resistance is achieved. Breakdown voltages and specific on-resistance observed on typical devices are 170 V and 0.01 Ω . cm², respectively. Gate-turn off times are of the order of 30 ns. Two-dimensional simulation and experimental results comparing the SIN-FET with the LDMOST and lateral insulated gate transistor (LIGT) are presented.