24 Gbit/s regenerating demultiplexer IC in silicon bipolar technology

A 1:2 regenerating demultiplexer IC has been realised in an advanced self-aligned silicon bipolar technology using 0.8 mu m lithography. The circuit can be operated up to 24 Gbit/s at 5 V supply voltage. This is by far the highest data rate reported for a demultiplexer in any IC technology.<>     

10 Gbit/s monolithic integrated bipolar demultiplexer for optical-fibre transmission systems fabricated in BICMOS technology

A very-high-speed bipolar multiplexer for optical-fibre transmission systems is described, which operates at up to above 10 Gbit/s. This is the highest operating speed of monolithic integrated demultiplexers reported to date. The circuit was realised in a self-aligning double-polysilicon BICMOS technology with 1.5 mu m lithography.<>     

25 Gbit/s decision circuit, 34 Gbit/s multiplexer, and 40 Gbit/s demultiplexer IC in selective epitaxial Si bipolar technology

A 25 Gbit/s decision circuit, a 34 Gbit/s multiplexer, and a 40 Gbit/s demultiplexer IC have been realised with selective epitaxial silicon bipolar technology using 0.8 mu m lithography. The data rates achieved are the highest values reported for these types of circuit in any IC technology.<>     

4-bit multiplexer/demultiplexer chip set for 40-Gbit/s optical communication systems

We have designed and fabricated a low-power 4:1 multiplexer (MUX), 1:4 demultiplexer (DEMUX) and full-clock-rate 1:4 DEMUX with a clock and data recovery (CDR) circuit using undoped-emitter InP-InGaAs HBTs. Our HBTs exhibit an f/sub T/ of approximately 150 GHz and an f/sub max/ of approximately 200 GHz at a collector current density of 50 kA/spl mu/m/sup 2/. In the circuit design, we utilize emitter-coupled logic and current-mode logic series gate flip-flops and optimized the collector current density of each transistor to achieve low-power operation at required high bit rates. Error-free operation at bit rates of up to 50 Gbit/s were confirmed for the 4:1 MUX and 1:4 DEMUX, which dissipates 2.3 and 2.5 W, respectively. In addition, the full-clock-rate 1:4 DEMUX with the CDR achieved 40-Gbit/s error-free operation.     

Submicron silicon bipolar master-slave D-type flip-flop for use as 8.1 Gbit/s decision circuit and 11.2 Gbit/s demultiplexer

The authors have designed and implemented a submicron silicon bipolar master-slave D-type flip-flop integrated circuit which can be used either as a decision circuit or a demultiplexer, operating at data rates as high as 8.1 and 11.2 Gbit/s, respectively. The circuit was fabricated using a 0.6 mu m, nonpolysilicon emitter technology, occupying an area of 0.8 mm*0.9 mm, and dissipating 410 mW of power.<>     

Monolithic integrated 4:1 multiplexer and demultiplexer operating up to 4.8 Gbit/s

The letter describes the high-speed performance of a 4:1 time-division MSI multiplexer and demultiplexer, which are fabricated using advanced super self-aligned process technology (SST). The maximum operation speed of the multiplexer is 5.02 GHz under 576 mW power dissipation. The system, which is composed of a multiplexer and a demultiplexer, operates at up to 4.80 GHz. The demultiplexer has a power dissipation of 1148 mW. Interchannel interference is also examined.     

1 Gbit/s bipolar optical FSK transmission experiment over 121 km offibre

Bipolar direct modulation has been used to overcome the nonuniform low-frequency modulation response of a DFB laser transmitter in a 1 Gbit/s optical FSK transmission system. The heterodyne receiver sensitivity (nP¯) was -39 dBm for a 2²³-1 bit pseudorandom pattern, with no degradation in receiver sensitivity after transmission through 121 km of fibre     

Multi-gigabit-per-second silicon bipolar ICs for futureoptical-fiber transmission systems

Basic silicon bipolar ICs for use in systems operations at bit rates of about 2.5 Gb/s are described. Examples are multiplexers, demultiplexers, amplifiers, decision circuits, etc. It is shown that the speed requirements can be met (for nearly all circuits) by today's standard technologies, provided that appropriate circuit concepts are used and the circuits are designed carefully. Applying today's advanced bipolar technologies with self-aligning polysilicon processes, bit rates well above 10 Gb/s are achievable in several cases     

10 Gb/s silicon bipolar 8:1 multiplexer and 1:8 demultiplexer

High-speed multiplexer and demultiplexer circuits are key components in high-speed optical communication systems such as SONET. As optical communication link speeds increase, faster electronic interface circuitry is required. The use of multiplexer circuits allows most of the electronic circuitry to operate on parallel data at a lower speed, reducing the speed requirements of much of the system. A retimed 8:1 multiplexer and a 1:8 demultiplexer which operate at 10 Gb/s are described. These circuits were fabricated in high-speed silicon bipolar process. Design optimization techniques were used to achieve maximum performance. The retimed multiplexer and the demultiplexer dissipate 3.8 and 4.3 W, respectively     

20 Gbit/s soliton transmission using alternating dispersionarrangement in standard fibre systems

An alternating dispersion arrangement is proposed for soliton systems with dispersion compensation to improve soliton stabilisation. A transmission experiment at 20 Gbit/s over 2600 km long singlemode fibre was successfully demonstrated by employing this novel dispersion arrangement     

Very-high-speed InP/InGaAs HBT ICs for optical transmission systems

High-speed ICs for 20-40-Gbit/s time-division multiplexing (TDM) optical transmission systems have been designed and fabricated by using InP/InGaAs heterojunction-bipolar-transistor (HBT) technology. This paper describes four analog ICs and four digital ICs: a five-section cascode distributed amplifier with a gain of 9.5 dB and a bandwidth of 50 GHz, a three-section single-end-to-differential converter with a bandwidth of 40 GHz, a cascode differential amplifier with a gain of 10.5 dB and a bandwidth of 64 GHz, a preamplifier with a gain of 41.9 dBΩ and a bandwidth of 39 GHz, a modulator driver with an output voltage swing of 3.2 V peak-to-peak and rise and fall times of 16 and 15 ps, a 40-Gbit/s selector, a 20-Gbit/s D-type flip-flop, and a static frequency divider with an operating range of 2.0-44.0 GHz. All the ICs were measured with on-wafer RF probes     

A 10 Gbit/s OCDMA system based on electric encoding and optical transmission

An electric encoded/optical transmission system of code division multiple access （CDMA） is proposed. It encodes the user signal in electric domain, and transfers the different code slice signals via the different wavelengths of light. This electric domain encoder/decoder is compared with current traditional encoder/decoder. Four-user modula- tion/demodulation optical CDMA （OCDMA） system with rate of 2.5 Gbit/s is simulated, which is based on the optical orthogonal code （OCC） designed in our laboratory. The results show that the structure of electric encoding/optical transmission can encode/decode signal correctly, and can achieve the chip rate equal to the user data rate. It can over- come the rate limitation of electronic bottleneck, and bring some potential applications in the electro-optical OCDMA system.     

Simulation and design methodology for a 50-Gb/s multiplexer/demultiplexer package

A 50 Gb/s package for SiGe BiCMOS 4:1 multiplexer and 1:4 demultiplexer targeting SONET OC-768 serial communication systems is introduced in this work. The package was designed to facilitate bit-error-rate tests and constructed with high-speed coaxial connectors, transmission lines on ceramic substrate, ribbon bonds for chip-to-package interconnects, and a metal composite housing. Numerical simulations were conducted to guide the package design, and both small signal measurements and operational tests were performed thereafter to verify the design and modeling concepts. To keep the model structure under the existing computing capability, the simulation was segmented into three sections - coaxial connector to transmission line, transmission line alone, and transmission line to ribbon bond, and then the results were assembled to predict the performance of the entire package. The package was operated up to 50 Gb/s with low degradation to input digital waveforms and free of error.     

16 Gbit/s multiplexer IC using double mesa Si/SiGe heterojunction bipolar transistors

A double mesa Si/SiGe heterojunction bipolar transistor (HBT) was developed for application in integrated circuits. The HBT is characterised by an emitter base heterojunction and consequently by a high base doping concentration. By using these transistors an integrated digital circuit, a multiplexer, was implemented. The measured bit rate of this first Si/SiGe HBT circuit was 16 Gbit/s.<>     

2 Gbit/s and 2.4 Gbit/s optical transmission field trial over a 32 km installed route

High-speed optical data transmission at 2Gbit/s and 2.4 Gbit/s has been demonstrated for the first time over an installed fibre-optic cable. Error-free transmission with operating margins of 15.8 dB and 12 dB over 10?9 BER was achieved over a 32 km route. The systems featured a 1.5 ?m DFB laser, Ge APD transimpedance receivers and full regeneration.     

11.4 Gbit/s silicon bipolar multiplexer IC employing 2 mu m lithography transistors

A very high-speed 2:1 multiplexer IC operating up to 11.4 Gbit/s has been implemented. The circuit was fabricated using a 12 GHz non-polysilicon-emitter self-aligning bipolar process with 2 mu m lithography. Despite realisation in a relatively simple technology, this is the highest operating speed yet achieved with any technology.<>     

Over 80 Gbit/s 2:1 multiplexer and low power selector ICs using InP/InGaAs DHBTs

A 2:1 multiplexer (MUX) and low power selector ICs have been successfully designed and manufactured using an InP/InGaAs DHBT technology. The 2:1 MUX has been tested at data rates up to 80 Gbit/s with an output swing of 600 mV, while the selector IC has achieved operation speed up to 90 Gbit/s at a power consumption of only 385 mW.     

Wideband guided-wave periodic multi/demultiplexer with a ringcavity for optical FDM transmission systems

A guided-wave periodic multi/demultiplexer with a ring cavity for optical frequency-division-multiplexing (FDM) transmission systems is demonstrated. The frequency spacing is 5 GHz at the 1.55 μm wavelength region and the bandwidth is 1.8 times as wide as that of conventional periodic filters with simple Mach-Zehnder interferometer structure