Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.     

Switched-capacitor filters

A novel technique for building active filters using switched-capacitor (SC) circuits is proposed. Principles of operation, methods of control, analysis, and design of a typical SC filter are presented. To assess its effectiveness, the technique is used to control input current harmonics in a phase-controlled converter. It is shown that a wide range of harmonics can be controlled using a single filter     

SC front-end with wide dynamic range

A novel front-end circuit for capacitive sensors and switched-capacitor (SC) circuits is presented. In this circuit charge is transferred to an input integrator circuit in a controlled way to prevent overload of the input amplifier. Application of this technique extends the linear range for large input signals     

Switched-Capacitor Track-and-Hold Amplifiers With Low Sensitivity to Op-Amp Imperfections

This paper describes high-precision switched-capacitor (SC) track-and-hold amplifier (THA) stages. They use a novel continuous-time correlated double sampling (CDS) scheme to desensitize the operation to amplifier imperfections. Unlike earlier predictive-CDS amplifiers, the circuits do not need a sampled-and-held input signal for their operation. During the tracking period, an auxiliary continuous-time signal path is established, which predicts the output voltage during the holding period. This allows accurate operation even for low amplifier gains and large offsets over a wide input frequency range. Extensive simulations were performed to compare the performance of the proposed THAs with earlier circuits utilizing CDS. The results verify that their operation is far more robust than that of any previously described SC amplifiers     

An optimum CMOS switched-capacitor antialiasing decimating filter

An optimum switched-capacitor (SC) decimating filter is capable of achieving a high input sampling frequency while the time period for the setting of the operational amplifiers can be maximized with respect to the lower output sampling frequency. Thus, for the same speed of the operational amplifiers, the oversampling ratio of the input signal in optimum SC decimating filters is much larger than in conventional SC filtering circuits, yielding a significant relaxation of the continuous-time prefiltering requirements. This is demonstrated by considering the design of a second-order SC antialiasing decimating filter with a threefold sampling rate reduction, which has been realized in a 1.8-μm CMOS double-poly technology. The experimental evaluation of prototype samples confirms the expected operation of the circuit     

一个开关电容电路的模拟和优化程序

本文介绍了一个以分析开关电容(SC)电路为目的面向用户的通用程序。该程序可以完成对SC电路的时域、频域和灵敏度模拟,可以对SC电路进行多目标优化,并可以求得SC电路的传输极点,且对电路的输入信号、开关序列、网络拓扑没有限制,文中提出了在改进节点法基础上求出电路传输极点的方法,以贡献的方式建立求传输函数对电容比的灵敏度方程,通过线性变换求得对电容比的灵敏度的方法和SC电路的多目标优化方法。最后给出了用该程序对SC电路进行模拟和优化的两个算例。     

Low-voltage dynamic biasing technique for CMOS class ABcurrent-mode circuits

A novel dynamic biasing technique that can be used for the design of CMOS class AB current-mode circuits is presented. The approach takes advantage of the switched capacitor (SC) technique and enables extremely low voltage operations. An application of the proposed technique to the design of a basic input stage is given and simulations showing good agreement with the expected results are provided     

Transient analysis of charge-transfer in SC filters-gain error and distortion

In switched-capacitor (SC) circuits, op amps often slew during the charge-transfer transient. When this happens, the charge-transfer error is no longer proportional to the input signal. The charge-transfer transient is studied in detail, taking into account the slewing behavior of the amplifiers. Analytical expressions are obtained for the charge-transfer error of an SC integrator. In switched-capacitor signal processing, the harmonic distortion can be defined as the harmonic distortion of the envelope of the sampled-data sequence. A Fourier analysis is carried out on the sampled-data sequence corrupted by the charge-transfer error due to slewing of the operational transconductance amplifiers. Analytical expressions are derived for harmonic distortions of an SC integrator. Analysis of the results shows that slew-induced harmonic distortion can be minimized by using large transconductance. It is possible to design SC filters with low power consumption and low harmonic distortion without resorting to class AB amplifiers.     

单一单位增益放大器的Q增强SC滤波器

本文阐述了采用单位增益放大器的SC滤波器的设计方法。基于无源Q增强技术,由Sallew Key有源RC电路导出了一系列Q增强的二阶SC低通、高通和带通滤波器。设计表明,本文提出的Q增强SC电路比文献给出的电路需要小得多的电容分散度。本文考察了这些电路灵敏度和有限GB对SC电路的影响。用分立元件做了实验,实验结果与理论计算相吻合。     

On the use of current control scheme for switched-capacitor DC/DCconverters

This paper presents an investigation into the use of a current control scheme (CCS) and a comparison with a classical switching scheme for switched-capacitor (SC) step-down DC/DC converters. With the CCS, capacitors are charged with near-constant current, controlled by the gate-source voltage of MOSFETs. By paralleling two SC cells, the converter input current becomes continuous, resulting in much reduced conducted electromagnetic interference with other circuits fed by the same power supply. All MOSFETs are operated for half of the switching period, in order to improve the regulation capability. Static and dynamic behaviors of the converter with the CCS are predicted and confirmed in an experimental 36 W 12 V/9 V prototype     

HIGH SELECTIVITY SC BANDPASS FILTERS WITH LESS CAPACITOR SPREAD

Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps on the proposed SC circuits are taken intoconsideration.Comparisons with the proposed circuits and the circuits given by the literatureshow that the new circuits require less chip area in monolithic integration and are less sensitiveto the GB effects.     

SC电路混合分析的一种方法

本文提出了ＳＣ电路混合分析的一种方法，此法特别适合于计算机辅助电路分析，并且所推导的ＳＣ电路混合议程与状态议程有着紧密的联系，由此可方便地求得ＳＣ电路的频域传递函数。     

Efficient encoding of quasi-cyclic low-density parity-check codes

Quasi-cyclic (QC) low-density parity-check (LDPC) codes form an important subclass of LDPC codes. These codes have encoding advantage over other types of LDPC codes. This paper addresses the issue of efficient encoding of QC-LDPC codes. Two methods are presented to find the generator matrices of QC-LDPC codes in systematic-circulant (SC) form from their parity-check matrices, given in circulant form. Based on the SC form of the generator matrix of a QC-LDPC code, various types of encoding circuits using simple shift registers are devised. It is shown that the encoding complexity of a QC-LDPC code is linearly proportional to the number of parity bits of the code for serial encoding, and to the length of the code for high-speed parallel encoding.     

Pseudo-N-path switched capacitor filters with out-of-band noise peaks

Novel pseudo-N-path (PNP) switched-capacitor (SC) integrator structures which avoid noise peaks in the main passband are described. They combine the simplicity of the previously proposed RAM-type PNP SC circuits with the desirable properties of hybrid-type circuits. Simulation results are presented for filters employing these structures to verify their usefulness.<>     

Switched-capacitor integrators with low finite-gain sensitivity

Compensated SC integrator stages are analysed and compared with respect to their sensitivities to finite amplifier gain effects. Simple single-stage amplifiers may be used in such circuits even in highly selective filtering applications. This may allow an extension of the present frequency range of SC circuits.     

Analysis of SC networks using continuous-time equivalent circuits without frequency-dependent elements

Continuous-time equivalent circuits for the analysis of SC networks are derived by using the mixed bilinear and LDI transformation, the developed equivalent circuits contain no frequency-dependent elements.     

Sigma-delta modulator modeling analysis and design

This paper introduces a new method for SC sigma-delta modulator modeling.It studies the integrator's different equivalent circuits in the integrating and sampling phases.This model uses the OP-AMP input pair's tail current(I_0) and overdrive voltage(v_(on)) as variables.The modulator's static and dynamic errors are analyzed.A group of optimized I_0 and v_(on) for maximum SNR and power x area ratio can be obtained through this model.As examples, a MASH21 modulator for digital audio and a second order modu...     

Technological design considerations for monolithic MOS switched-capacitor filtering systems

In this paper, various technological and topological considerations for the design of monolithic MOS switched-capacitor (SC) filtering systems are described. The properties of the passive and active devices typically available in depletion-load NMOS and CMOS technologies are presented as they relate to various SC peformance parameters. Layout techniques for improving specific performance parameters are also given. An overview of MOS operational-amplifier design emphasizes technological considerations in the design of high-performance SC systems. Finally, several important techniques are reviewed for maximizing dynamic range in SC circuits.