Message length adaptive LDPC codes

LDPC codes achieve better performance and lower decoding complexity than turbo codes, with a major drawback of high encoding complexity. The encoder generator matrix is derived from the inverse of portion of parity check matrix. If the message length is changed, the structure of parity check matrix is modified and hence, the generator matrix must be re-computed. This increases the encoding complexity as the computation of matrix inverse is time and resource consuming operation. In this paper, we consider the encoding problem for LDPC codes as the complexity of encoding is essentially quadratic with respect to the block length. Using an efficient encoding method proposed by Richardson and Urbanke, we propose a systematic procedure to construct parity check matrix and generator matrix such that with change in message length, the re-computation for constructing generator matrix is avoided. The presented design uses fixed sub-matrices to construct a semi-random parity check matrix. The resultant design will reduce the pre-computation time of converting parity check matrix to generator matrix. The reported encoder reduces encoding time without the loss of coding gain and Bit Error Rate (BER) performance.     

基于LTE-Advanced标准的LDPC码编码器设计与实现

针对LTE-Advanced标准,在分析其低密度奇偶校验(LDPC)码校验矩阵构造基础上,设计了一种低成本高吞吐率的准循环LDPC码编码器结构。通过分析校验矩阵的子矩阵结构,将整个校验矩阵划分为全零子矩阵及循环移位单位子矩阵的块状结构,进行串行编码。实验结果表明,与同类方法相比,设计的编码器编码时间约为同类最理想时间的32%,资源消耗约为同类最理想情况的33%,在编码时间和资源消耗上达到平衡,满足LTE-Advanced标准低成本高传输的要求。此外,改变校验矩阵存储单元的参数,可实现不同码长码率的LDPC码编码。     

误码条件下BCH码的盲识别方法

针对误码条件下的BCH码盲识别问题,提出了一种低复杂度的算法。现有的对BCH码的识别方法多采用通用的线性分组码识别方法,不能同时适用于码长较长、误码率较高时的情况。该算法基于BCH码是汉明码的子空间,通过汉明码的校验矩阵校验BCH码。识别内容包括码长、码字起点和生成多项式。仿真结果表明:对码长为1023的BCH码,在误码率0.5%的条件下,仍能正确识别。     

可变码长LDPC码的GAU构造算法

考虑度分布、最小环长和环近似外信息度等因素,从减少短环和增加外信息度入手,提出了可变码长LDPC码的GAU(Girth ACE union)构造算法。该算法构造的校验矩阵能适应较大范围的码长变化,其短码的纠错性能与802.16e中的LDPC码相当,中长码的性能较后者略优。不同码长的码字具有结构相同的校验矩阵,便于编译码器对所有码长采用同一架构设计,能有效降低编译码器的实现复杂度。GA U算法适用于支持可变长度数据传输的各类通信系统的LDPC码设计,具有重要的理论意义和 实用价值。     

均衡不完全区组设计的满秩LDPC码构造及快速编码

为了降低准循环低密度奇偶校验（Low-Density Parity-Check,LDPC）码编码的复杂度,提出了一种基于均衡不完全区组设计（Balanced Incomplete Block Designs,BIBD）满秩LDPC码的构造及快速编码方法。基于BIBD构造的满秩校验矩阵可以快速得到系统循环阵形式的生成矩阵。此方案设计不但可以实现线性化编码,而且编出的码字都为系统码。仿真结果表明,构造出的LDPC码具有很好的误码率性能和收敛特性,而其满秩的编码方法具有较好的通用性和实用价值。     

Lower bounds over codes correcting bursts with a given lee weight or intensity

The burst error correcting or detecting capability of a linear code depends upon the number of parity check symbols. In this paper two types of bursts of length b (fixed) of the Chien-Tang type are defined, and lower bounds on the number of parity check digits for a linear code which is capable of correcting errors of this type are obtained by combinatorial considerations.     

Blind recognition of punctured convolutional codes

~~Blind recognition of punctured convolutional codes1. Alouini, M. S , Goldsmith, A. J., Capacity of Rayleigh fading channels under different adaptive transmission and diversity-combining techniques, IEEE Trans. Veh. Technol., 1999, 48(4): 1165-1181 2. Goldsmith, A. J., Chua, S G., Variable-rate variable-power MQAM for fading channels, IEEE Trans. Comm., 1997,45(10): 1218-1230. 3. Lee. J M.. Song, I., Jung, S. et al., A rate adaptive convolutional coding method for multica…     

Hybrid weighted bit flipping low density parity check decoding

Low density parity check codes (LDPC) exhibit near capacity performance in terms of error correction. Large hardware costs, limited flexibility in terms of code length/code rate and considerable power consumption limit the use of belief-propagation algorithm based LDPC decoders in area and energy sensitive mobile environment. Serial bit flipping algorithms offer a trade-off between resource utilization and error correction performance at the expense of increased number of decoding iterations required for convergence. Parallel weighted bit flipping decoding and its variants aim at reducing the decoding iteration and time by flipping the potential erroneous bits in parallel. However, in most of the existing parallel decoding methods, the flipping threshold requires complex computations.In this paper, Hybrid Weighted Bit Flipping (HWBF) decoding is proposed to allow multiple bit flipping in each decoding iteration. To compute the number of bits that can be flipped in parallel, a criterion for determining the relationship between the erroneous bits in received code word is proposed. Using the proposed relation the proposed scheme can detect and correct a maximum of 3 erreneous hard decision bits in an iteration. The simulation results show that as compared to existing serial bit flipping decoding methods, the number of iterations required for convergence is reduced by 45% and the decoding time is reduced by 40%, by the use of proposed HWBF decoding. As compared to existing parallel bit flipping decoding methods, the proposed HWBF decoding can achieve similar bit error rate (BER) with same number of iterations and lesser computational complexity. Due to reduced number of decoding iterations, less computational complexity and reduced decoding time, the proposed HWBF decoding can be useful in energy sensitive mobile platforms.     

一种码率可调嵌套LDPC码的设计

设计了一种码率可调的嵌套LDPC码。该码具有差分编码结构,易于硬件实现。校验矩阵采用嵌套结构,同一系统中可以含有多种码率的码字。对于不同信道情况,可以传送不同码率的码字,以提高系统性能。这种码率可调的编码也适合于出错重发系统。仿真结果表明,该构造方法确定的码字同通过复杂方法随机构造出来的码字性能接近。     

基于准循环低密度奇偶校验码的压缩感知测量矩阵

针对随机测量矩阵元素随机产生、不易于硬件实现的缺点,利用有限域上准循环低密度奇偶校验(QC-LDPC)码奇偶校验矩阵的构造方法,设计了一种确定性的结构化稀疏测量矩阵。由于QC-LDPC码的信道编解码性能较好,故以此为基础构造压缩感知(CS)测量矩阵预计有较好的性能。分别用一维和二维信号的CS重建实验验证新矩阵的性能,结果表明,与常用的测量矩阵相比,在相同的重建算法和压缩比条件下,新矩阵对应的重建误差较低,在峰值信噪比(PSNR)的评价指标上有所提高(0.5~1dB)。特别地,所提的确定性测量矩阵在结构上具有对称特性和准循环特性,如将其应用于硬件实现,可降低物理内存的需求量与硬件实现的复杂度。     

大围长结构化LDPC码构造方法

在LDPC码的构造中,校验矩阵拥有大围长对于改善码的性能有着重要的意义.结构化是提高码实用性的关键.提出一种低复杂度的基于列差搜索法(Column-Difference Search AIgorithm)的准循环LDPC码构造方法,用以设计大围长和任意码率的规则QC-LDPC码(以下称为CDS-LDPC码).该方法可线性编码,易于IC实现.仿真结果表明,该方法构造的各种码率CDS-LDPC码在BER性能上均优于对应的随机码,与同属QC-LDPC码的Tanner码和Array码相比明显提高了0.79～3.28dB,并且在码长、码率等参数设计上更为灵活.     

改进的基于奇偶校验码的McEliece变型方案

McEliece公钥加密体制是基于编码理论的公钥密码体制,其安全性可以归约到一般线性码译码问题,可以抵抗量子攻击。提出了一种改进的基于准循环中密度奇偶校验（QC-MDPC）码和准循环低密度奇偶校验（QC-LDPC）码的McEliece变型方案。主要改进是将QC-LDPC码和QC-MDPC码的奇偶校验矩阵结合作为私钥,生成两者的级联码字应用于McEliece变型方案,并且给出了改进的译码算法。分析表明在80 bit安全参数下该体制密钥量小且实现的复杂度低,能抵抗最近提出的分别针对QC-MDPC和QC-LDPC体制的密钥恢复攻击。     

串行通信系统中一种综合容错技术的研究

数据传送的准确性和连贯性是串行通信系统的重要性能指标,通常采用一定的容错技术,广泛使用的有奇偶校验、CRC校验和海明码校验等,但奇偶校验无法检验出偶数个码元出错,CRC4校验只能检错2位或纠错1位。通过综合运用奇偶校验和CRC-4校验,提出一种综合容错技术,能够纠错1位和检错2位、检错4位、检错2．7％的3位码元错。     

低编码复杂度不规则准循环LDPC码的构造方法

针对不规则低密度奇偶校验码（LDPC码）误码性能好,但编码复杂度高的问题,利用重复积累码（RA码）能有效编码的特性和掩模技术,提出了一种不规则LDPC码的构造方法,该码具有线性复杂度的编码算法。该构造方法,首先对RA码的校验矩阵进行了改进,消除了RA码常产生的错误平层效应;然后基于范德蒙矩阵构造了一种新的校验矩阵,该校验矩阵具有代数结构,易于硬件实现。理论分析和实验结果表明,构造的不规则LDPC码的编码复杂度低于Mackay随机码,在加性高斯白噪声（AWGN）信道条件下,误码率为1.0×10^-4时,比Mackay随机码性能提高约0.4~0.6 dB。     

Remarks concerning the optimization of matrix codes

This paper describes the results of a general theory of matrix codes correcting a set of given types of multiple errors. A detailed study has been made of certain matrix classes of these systematic binary error correcting codes that will correct typical errors of some digital channels. These codes published by Elias,^(2,3) Hobb's,⁽⁵⁾ and Voukalis⁽¹¹⁾ account for this theory and other new families of binary systematic matrix codes of arbitrary size, correcting random, burst and clusters of errors are given here. Also presented here are the basic ideas of each of these codes. We can easily find practical decoding algorithms for each of these codes. The characteristic calculation of the parity check equations that the information matrix codebook has to satisfy are also shown. Further on we deal with the optimum construction of these codes showing their use in certain applications. We answer questions such as: “What is the optimum size of the code?” “What is the best structure of the code?” “What is the probability of error correction and the mean error correction performance?” Consequently, in this paper we also describe the results of an extensive search for optimum matrix codes designed to correct a given set of multiple errors as well as their implementation.     

抗突发错误的短码长随机LDPC码设计

短码长低密度奇偶校验(LDPC)码校验矩阵列相关性较大,易出现突发错误。为了提高短码长LDPC码抗突发错误能力,提出一种分层随机构造的非规则LDPC码,通过在各层中随机地分配比特节点的边,利用分层随机的结构特点,降低了校验矩阵的列相关性,使得短码长时具有较好的抑制突发错误的能力。通过计算码字最小汉明距离以及相邻列的列相关性,证明了该设计方法的有效性。仿真结果显示,短码长时采用该方法构造的LDPC码较PEG法、CCSDS标准、IEEE802.16e标准LDPC码在低信噪比时性能优势较为明显。     

基于隐私计算的网络会议数字评选系统设计方案

针对目前网络会议数字评选系统无法做到既保证评审人意见的隐私性又获得安全可信的结果的问题,提出一种基于隐私计算的网络会议数字评选系统设计方案。首先,通过里所（RS）码的编码矩阵对评审数据进行秘密分享以得到秘密份额,并将每一方评审数据的哈希值作为存根交由主办方存档以防止抵赖;然后,通过编码矩阵之单调扩张矩阵对秘密份额进行协同计算以得出计票结果;最后,通过校验矩阵检查多方协同计算过程中是否有秘密份额的分享错误或篡改行为存在。理论分析与仿真实验表明,所提方案可在中小规模的网络会议数字评选系统中实现隐私计算功能。     

基于滑动矩形窗和准三对角线结构的QC-LDPC码

针对IEEE 802.16e标准QC-LDPC码的码长和码率有限,及其采用的准双对角线结构包含大量度为2的变量节点导致较高错误平层的缺陷,提出一种基于滑动矩形窗和准三对角线结构的QC-LDPC码的快速编码算法,可以灵活地扩展码长和码率的范围,改善纠错性能,降低编码复杂度,适合于变速率的自适应传输系统。     

基于奇偶校验的三容错数据布局研究

基于单容错编码的数据布局已经不能满足存储系统对可靠性越来越高的要求。对基于多容错编码的数据布局的研究受到了广泛的关注,并且出现了一些三容错的布局算法,如HDD1,HDD2等。但这些布局算法普遍存在冗余度较差、计算负载大等缺点。提出了一种基于三重奇偶校验的多容错数据布局算法TP-RAID(Triple Parity RAID)。该算法只需要在RAID5阵列系统中增加两个校验磁盘,通过水平、正向对角和反向对角三重奇偶校验,可容许同时发生的三个磁盘故障。该算法编码、解码简单,三重校验条纹长度相等,计算负载小,易于实现。此外,由于该算法中尽量减少了三重校验之间逻辑关联,使得该算法的小写性能比其他的三容错算法相比有了大幅度的提高。     

大围长结构化LDPC码线性编码器设计

校验矩阵拥有大围长对于改善LDPC码的性能有着重要的意义.结构化是提高码实用性的关键.提出一种基于列差搜索算法(Column-Difference Search Algorithm)和步进边增长算法(Progressive Edge Growth Algorithm,PEG)的准循环LDPC码构造方法,可以设计任意围长和码率的QC-LDPC码(称为CP-LDPC码).利用该码校验矩阵的近似下三角特性,推导出递推编码方法,使得该码编码复杂度与码长成线性关系.仿真结果表明,CP-LDPC码在BER性能上与随机码以及同属QC-LDPC码的Tanner码和Array码相比有明显提高,优于随机码、Tanner码和Array码1.35dB～3.95dB.