Digitally programmable second generation current conveyor‐based FPAA

A novel fully differential digitally programmable current conveyor (DPCCII) is presented in this paper. The programmability of the proposed DPCCII is achieved using three‐bit MOS R‐2R ladder current division network. The DPCCII is used to realize a field programmable analog array (FPAA). The FPAA consists of seven configurable analog blocks arranged in a hexagonal form. The FPAA power consumption is 72.3 mW from 1 V voltage supply. A second‐order programmable universal filter is realized using the proposed FPAA as an application. All the circuits are realized and simulated using 90 nm IBM CMOS technology model under balanced supply voltage of ±0.5 V. Copyright © 2012 John Wiley & Sons, Ltd.     

Improved analogue fault coverage estimation using probabilistic analysis

A method for fault detection probability estimation using statistical multi‐parameter circuit simulation is proposed, in order to check circuits for which double or multiple analogue measurements are utilized. Theoretical analysis for the estimation of the fault coverage is given, based on conditional probability calculations. The proposed method can be applied for both test measurement and input stimulus selection. Simulation results from the application of the method on typical analogue circuits—filter and amplifier—are given, showing a sufficient improvement over the fault coverage achieved by single measurements. Copyright © 2009 John Wiley & Sons, Ltd.     

Using MOS current dividers for linearization of programmable gain amplifiers

Two highly linear, digitally programmable gain amplifiers are presented and compared in terms of linearity, frequency, area and power consumption. High linearity and wide gain tuning range with moderate area consumption are the main benefits of both configurations. Furthermore, constant bandwidth is achieved by means of switched compensation capacitor arrays. Three‐bit prototypes were integrated in a 0.35 µm–3.3 V CMOS process with 2.5 V supply voltage. Experimental distortion levels are better than ?68 dB for 1 MHz and 1 V_p?p output signals in both configurations; hence, the suitability of the linearization technique based on MOS current dividers is shown. Copyright © 2007 John Wiley & Sons, Ltd.     

A generalized fault diagnosis method in dynamic analogue circuits

Fault diagnosis of analogue circuits is essential for analogue and mixed‐signal systems testing and maintenance. A new method is proposed in this paper for multiple fault diagnosis of linear analogue circuits in frequency domain. The Woodbury formula is applied to the modified nodal equation to construct the fault diagnosis equation, which relates the limited measured circuit responses with the multiple faults inside the circuit in a linear way. A recently developed ambiguity group locating technique is modified here to identify the faulty parameters directly. Computation cost is reduced compared to combinatorial search in traditional fault verification methods. Only one node is needed for voltage measurement, but multiple excitations on accessible nodes are required for fault identification. Parameter evaluation can provide the exact solution to the deviated values of faulty parameters. The faulty parameter deviations can have any finite values. Example circuits are provided to illustrate the proposed method. Two other methods for multiple analogue fault diagnosis sharing the same mechanism as the method proposed in this paper are also briefly described. The proposed method is extremely effective for the circuit with very limited accessible nodes and is also computationally efficient. Copyright © 2002 John Wiley & Sons, Ltd.     

A DSP‐like analogue processing unit for smart image sensors

An electronic retina featuring DSP‐like programmable analogue processing is addressed. The motivations for designing such an original smart image sensor are accounted for. The architecture of the circuit is described and then the two more important building blocks are detailed. Finally, the practical implementation and tests results are given so as to validate the approach. Copyright © 2002 John Wiley & Sons, Ltd.     

Current differential amplifiers: new circuits and applications

New CMOS current differential amplifiers are proposed suitable for analogue signal processing at high frequencies. They consist of simple current mirrors, which are easy to design and to implement in IC form. Low‐voltage low‐power design is feasible. Relying on these devices a number of applications are obtained, including lossy and lossless integrators, simulated inductors, active filters, and harmonic oscillators. Theoretical expressions are given for all of the proposed new circuits. The verification of the circuits is also achieved by simulation. Copyright 2001 © John Wiley & Sons, Ltd.     

An algorithm for multiple fault diagnosis in analogue circuits

The paper deals with multiple fault diagnosis of analogue AC or DC circuits with limited accessible terminals for excitation and measurement and brings an algorithm for identificating faulty elements and evaluating their parameters. The main achievement is a method enabling us to efficiently identify faulty elements. For this purpose some testing equations are derived playing a key role in identification of possibly faulty elements which are next verified using a test of acceptance. The proposed approach is described in detail for double fault diagnosis. Also extension to triple fault diagnosis is given. Although the method pertains to linear circuits, some aspects of multiple fault diagnosis of non‐linear circuits can be also performed using the small signal approach. Two numerical examples illustrate the proposed method and show its efficiency. Copyright © 2006 John Wiley & Sons, Ltd.     

使用ispPAC20实现对电压的监视

可编程模拟器件ispPAC具有在系统可编程技术的优势和特点，取代了很多标准的分立元件或传统的ASIC所实现的电路功能。具有开发速度快，成本低、可靠性高、保密性强的特点。     

Estimation of circuit output measurements including statistically dependent parameters

An extension to the method for estimating statistical variables of output measurements, in order to take into account the statistical variations and matching dependencies between circuit parameters, is studied. The enhanced method results in sufficient estimations, while additional circuit simulations are needed. Comparative results from the application of the method and of the Monte‐Carlo analysis on three analogue circuits are presented to show the effectiveness of the extended method. Copyright © 2003 John Wiley & sons, Ltd.     

A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs

This paper presents an integrated approach of simulated annealing (SA) and genetic algorithm (GA) for the analogue module placement in mixed‐signal integrated circuit layout designs. The proposed algorithm follows the optimization flow of a normal GA controlled by the methodology of SA. The bit‐matrix chromosomal representation is employed to describe the location and the orientation of modules. Compared with the conventional bit‐string representation, the proposed chromosomal representation tends to significantly improve the search efficiency. In addition, a slide‐based flat scheme is developed to transform an absolute co‐ordinate placement of modules to a relative placement. In this way, the symmetry constraints imposed on analogue very large scale integration circuits can be easily fulfilled in the placement run. Use of a radiation‐decoder can also drastically shrink the configuration space without degrading search opportunities. The proposed algorithm has been tested with several example circuits. The experiments show this promising algorithm makes the better performance than the simpler SA or GA approaches working alone, and the quality of the automatically generated layouts is comparable to those done manually. Copyright © 2005 John Wiley & Sons, Ltd.     

Cellular neural networks with non-linear and delay-type template elements and non-uniform grids

The cellular neural network (CNN) paradigm is a powerful framework for analogue non-linear processing arrays placed on a regular grid. In this paper we extend the current repertoire of CNN cloning template elements (atoms) by introducing additional non-linear and delay-type characteristics. In addition, architectures with non-uniform processors and neighbourhoods (grid sizes) are introduced. With this generalization, several well-known and powerful analogue array-computing structures can be interpreted as special cases of the CNN. Moreover, we show that the CNN with these generalized cloning templates has a general programmable circuit structure (a prototype machine) with analogue macros and algorithms. the relations with the cellular automaton (CA) and the systolic array (SA) are analysed. Finally, some robust stability results and the state space structure of the dynamics are presented.     

大规模电路故障诊断的集团法

本文提出了一种可以诊断大规模模拟电路的新方法——集团法，它能不经过撕裂直接用于大规模电路，且能迅速缩小可疑故障集范围。本文详述了其诊断原理及诊断步骤，并给出了诊断实例。     

Design of square‐root domain filters by substituting the passive elements of the prototype filter by their equivalents

A novel technique for designing square‐root domain (SRD) filters is introduced in this paper. The concept of the proposed method is based on the substitution of the passive elements of the corresponding prototype filter by their SRD equivalents. The signal processing performed by the proposed SRD equivalents achieves that the voltage at each terminal of the SRD equivalent is the compressed version of the voltage at the corresponding terminal of the passive element, and that the current that flows through the SRD equivalent is the same as that flows through the passive element. The main attractive characteristic of the proposed method is that a quick procedure for designing SRD filters is offered. The validity of the proposed technique was verified by studying the behaviour of a 5th‐order SRD low‐pass filter. In order to demonstrate the benefits offered by the proposed technique, a SRD leapfrog filter was also designed and its performance is compared with that of the active filter that topologically simulates the same prototype filter. Copyright © 2007 John Wiley & Sons, Ltd.     

模拟电路故障诊断的小波方法

利用小波与神经网络相结合的方法,将小波作为消噪工具,对信号进行消噪和小波多尺度分解,进行正交和归一化处理后,提取特征信息,作为样本输入神经网络进行分类,提出了模拟电路故障诊断的系统方法.本文详述了其诊断原理及诊断步骤,并给出了诊断实例.     

Electronically controlled multiphase sinusoidal oscillators using current amplifiers

A novel current‐mode multiphase oscillator topology is introduced in this letter. This is realized by employing current amplifiers and only grounded capacitors. Attractive characteristics offered by the new topology are the electronic adjustment of the oscillation frequency, the absence of passive resistors, and the requirement of only grounded capacitors. Comparison with the corresponding already published current follower based structure shows that the proposed topology has better performance in terms of the number of required active elements, the employment of passive resistors, and the ability for electronic adjustment of the oscillation frequency. Copyright © 2008 John Wiley & Sons, Ltd.     

Harmonic oscillators realized using current amplifiers and grounded capacitors

New configurations of harmonic oscillators, realized using current amplifier blocks and only grounded capacitors, are introduced in this article. The proposed configurations are based on a grounded inductor simulator scheme and on a loop constructed from first‐order sections, respectively. Comparison with the already published topologies shows that the new configurations have attractive characteristics concerning their implementation in integrated form. Copyright © 2006 John Wiley & Sons, Ltd.     

On the transposition of Gm–C filters to DC stabilized log‐domain filters

High‐order log‐domain filters could be designed by transposing the already known linear‐domain G_m–C filter topologies to the corresponding topologies in the log‐domain. This is achieved by using a non‐linear transconductor configuration, where the output current is exponentially related to its input and output voltages. A drawback of the non‐linear transconductor configuration already introduced in the literature is that a number of the transposed log‐domain filter topologies suffer from DC instability, while in some others a DC offset current appears at their output. In order to eliminate the aforementioned problems a modified non‐linear transconductor configuration for transposing G_m–C filter topologies to log‐domain filter topologies is introduced in this paper. The achieved improvements are demonstrated through a number of log‐domain filter configurations derived using the already introduced and the proposed transposition schemes. Copyright © 2006 John Wiley & Sons, Ltd.     

First direct implementation of a true random source on programmable hardware

True random sources are not implementable in digital hardware, so that many practical applications have historically relied on pseudo‐random generators in order to avoid the potentially long prototyping times and the costs of dedicated analog design. However, pseudo‐random sources have liabilities that make them hardly suitable for some tasks (notably security related ones). Previous attempts to conciliate security, cost‐effectiveness, and rapid development included the exploitation of the analog accessory parts often present on programmable devices. In these designs some analog blocks are used for their side effects (noise amplification) rather than for their originally intended behaviour. Conversely, here we report a direct implementation of a true random source on programmable, low‐cost, general‐purpose hardware, where all blocks are used only for their nominal function. To the best of the authors' knowledge, this is the first proposal of this sort. The design exploits an FPAA, and is based on a non‐linear system exhibiting chaotic behaviour. Measures confirm the correct operation, high throughput, and robustness of the system. Copyright © 2005 John Wiley & Sons, Ltd.     

Analytical comparison of frequency compensation techniques in three‐stage amplifiers

In this paper, design equations of the most common Nested Miller topologies are derived. Moreover, a coherent and comprehensive analytical comparison among the different topologies is also presented. In particular, after deriving design equations, following the approach previously proposed by the authors that have the phase margin as the main design parameter, the different solutions are compared by evaluating a novel figure of merit that expresses a trade‐off between gain‐bandwidth product, load capacitance and total transconductance, for equal values of phase margin. It is shown that there is no unique optimal solution as this depends on the load condition and the relative magnitude of the transconductance of each stage. From this point of view, the proposed comparison also provides useful design guidelines for the optimization of small‐signal performance. Simulations confirming the effectiveness of the comparison are also given. Copyright © 2006 John Wiley & Sons, Ltd.     

Realization of log‐domain high‐order transfer functions using first‐order building blocks and complementary operators

High‐order log‐domain filters could be easily designed by using the functional block diagram (FBD) representation of the corresponding linear prototype and a set of complementary operators. For this purpose, lossy and lossless integrator blocks have been already introduced in the literature. Novel first‐order log‐domain highpass and allpass filter configurations, which are fully compatible with the already published integrator blocks, are introduced in this paper. These are realized using integration and subtraction blocks or a novel differentiation configuration. As a result, a complete set of first‐order building blocks would be available for synthesizing any arbitrary high‐order transfer function. In order to verify the correct operation of the proposed structures, the performance of the introduced highpass filters was evaluated through simulation results. In addition, a fifth‐order log‐domain bandpass filter was designed and simulated using one of the introduced first‐order highpass filter configurations. Copyright © 2006 John Wiley & Sons, Ltd.