氮化H2-O2合成薄栅介质的击穿特性

研究了14～16nm的H2-O2合成薄栅介质击穿特性.实验发现,N2O气氛氮化H2-O2合成法制备的薄栅介质能够有效地提高栅介质的零时间击穿特性.H2-O2合成法制备的样品,其击穿场强分布特性随测试MOS电容面积的增加而变差,而氮化H2-O2合成薄栅介质的击穿特性随测试MOS电容面积的增加基本保持不变.对于时变击穿,氮化同样能够明显提高栅介质的击穿电荷及其分布.     

氮化H2-O2合成薄栅介质的击穿特性

研究了14～16nm的H2-O2合成薄栅介质击穿特性.实验发现,N2O气氛氮化H2-O2合成法制备的薄栅介质能够有效地提高栅介质的零时间击穿特性.H2-O2合成法制备的样品,其击穿场强分布特性随测试MOS电容面积的增加而变差,而氮化H2-O2合成薄栅介质的击穿特性随测试MOS电容面积的增加基本保持不变.对于时变击穿,氮化同样能够明显提高栅介质的击穿电荷及其分布.     

恒电流应力引起HfO2栅介质薄膜的击穿特性

利用磁控溅射的方法在p-Si上制备了高k(高介电常数)栅介质HfO2薄膜的MOS电容,对薄栅氧化层电容的软击穿和硬击穿特性进行了实验研究.利用在栅极加恒电流应力的方法研究了不同面积HfO2薄栅介质的击穿特性以及击穿对栅介质的I-V特性和C-V特性的影响.实验结果表明薄栅介质的击穿过程中有很明显的软击穿现象发生,与栅氧化层面积有很大的关系,面积大的电容比较容易发生击穿.分析比较了软击穿和硬击穿的区别,并利用统计分析模型对薄栅介质的击穿机理进行了解释.     

恒电流应力引起HfO_2栅介质薄膜的击穿特性

利用磁控溅射的方法在p- Si上制备了高k(高介电常数)栅介质Hf O2薄膜的MOS电容,对薄栅氧化层电容的软击穿和硬击穿特性进行了实验研究.利用在栅极加恒电流应力的方法研究了不同面积Hf O2 薄栅介质的击穿特性以及击穿对栅介质的I- V特性和C- V特性的影响.实验结果表明薄栅介质的击穿过程中有很明显的软击穿现象发生,与栅氧化层面积有很大的关系,面积大的电容比较容易发生击穿.分析比较了软击穿和硬击穿的区别,并利用统计分析模型对薄栅介质的击穿机理进行了解释     

衬底热空穴耦合的薄栅TDDB效应

通过衬底热空穴 (SHH,Substrate Hot Hole)注入技术 ,对 SHH增强的薄 Si O2 层击穿特性进行了研究 .与通常的 F- N应力实验相比 ,SHH导致的薄栅氧化层击穿显示了不同的击穿特性 .其击穿电荷要比 F- N隧穿的击穿电荷大得多 ,栅氧化层的击穿电荷量与注入的空穴流密度和注入时空穴具有的能量以及栅电压有关 .这些新的实验结果表明 F- N应力导致的薄栅氧化层的击穿不仅由注入的空穴数量决定 .提出了一个全新的衬底热空穴耦合的TDDB(Tim e Dependent Dielectric Breakdown)模型     

离子注入氮化薄SiO_2栅介质的特性

研究了通过多晶硅栅注入氮离子氮化 10 nm薄栅 Si O2 的特性 .实验证明氮化后的薄 Si O2 栅具有明显的抗硼穿透能力 ,它在 FN应力下的氧化物陷阱电荷产生速率和正向 FN应力下的慢态产生速率比常规栅介质均有显著下降 ,氮化栅介质的击穿电荷 (Qbd)比常规栅介质提高了 2 0 % .栅介质性能改善的可能原因是由于离子注入工艺在栅 Si O2 中引进的 N+离子形成了更稳定的键所致     

离子注入氮化薄SiO2栅介质的特性

研究了通过多晶硅栅注入氮离子氮化10nm薄栅SiO2的特性.实验证明氮化后的薄SiO2栅具有明显的抗硼穿透能力,它在FN应力下的氧化物陷阱电荷产生速率和正向FN应力下的慢态产生速率比常规栅介质均有显著下降,氮化栅介质的击穿电荷(Qbd)比常规栅介质提高了20%.栅介质性能改善的可能原因是由于离子注入工艺在栅SiO2中引进的N+离子形成了更稳定的键所致.     

Al2O3高k栅介质的可靠性

利用反应溅射方法制备了等效氧化层厚度为3.45nm的Al2O3栅介质MOS电容,研究了Al2O3作为栅介质的瞬时击穿和恒压应力下的时变击穿等可靠性特征.击穿实验显示,样品的Al2O3栅介质的等效击穿场强大小为12.8MV/cm.在时变击穿的实验中,Al2O3栅介质表现出类似于SiO2的软击穿现象.不同栅压应力作用的测试结果表明,介质中注入电荷的积累效应是引起软击穿的主要因素,其对应的介质击穿电荷QBD约为30～60C/cm2.     

Al_2O_3高k栅介质的可靠性

利用反应溅射方法制备了等效氧化层厚度为3 45nm的Al2 O3栅介质MOS电容,研究了Al2 O3作为栅介质的瞬时击穿和恒压应力下的时变击穿等可靠性特征.击穿实验显示,样品的Al2 O3栅介质的等效击穿场强大小为1 2 8MV/cm .在时变击穿的实验中,Al2 O3栅介质表现出类似于SiO2 的软击穿现象.不同栅压应力作用的测试结果表明,介质中注入电荷的积累效应是引起软击穿的主要因素,其对应的介质击穿电荷QBD约为30～60C/cm2 .     

Al2O3高k栅介质的可靠性

利用反应溅射方法制备了等效氧化层厚度为3．45nm的Al2O3栅介质MOS电容，研究了Al2O3作为栅介质的瞬时击穿和恒压应力下的时变击穿等可靠性特征．击穿实验显示，样品的Al2O3栅介质的等效击穿场强大小为12.8MV／cm.在时变击穿的实验中，Al2O3栅介质表现出类似于SiO2的软击穿现象．不同栅压应力作用的测试结果表明，介质中注入电荷的积累效应是引起软击穿的主要因素，其对应的介质击穿电荷QBD约为30～60C／cm^2．     

Oxide thickness dependence of nitridation effects on TDDB characteristics

Wet oxide thicknesses dependence of nitridation effects on electrical characteristics, charge trapping properties and TDDB (Time Dependent Dielectric Breakdown) characteristics have been investigated. It is found that the difference of conduction current between the wet and nitrided wet oxide increases with increasing oxide thickness both for negative and positive bias to the gate until constant current stress is applied. After the stress, with decreasing oxide thickness both in wet and nitrided wet oxide leakage current increases. Up to 60 Å no difference was observed between the wet and nitrided wet oxide but at 50 Å nitrided wet oxide has less increase of current comparing to the wet oxide for the same stress. In wet oxide with increasing stress current density initial hole trap decreases but electron trap increases whereas in nitrided wet oxide has less initial hole trap and also electron trap is less comparing to the wet oxide. Both in wet and nitrided wet oxide for negative bias stress, time to 50 % breakdown decreases with decreasing thickness but at 50 Å a turn-around effect was observed due to nitridation i.e., the 50 % breakdown time is greater for nitrided wet oxide comparing to the wet oxide. On the contrary, for positive bias stress 50 % breakdown time increases with decreasing oxide thickness both in wet and nitrided wet oxide. For positive bias also a turn-around effect is observed at 50 Å i.e., 50% breakdown time is less in nitrided wet oxide comparing to the wet oxide. The improved reliability of nitrided wet oxide at the thin region of 50 Å seems to be due to the increase of more Si---N bond to the interface of oxide and Si comparing to the thick oxide of above 60 Å for the same nitridation conditions.     

The effects of thermal nitridation conditions on the reliability of thin nitrided oxide films

MIS capacitors on n-type silicon substrate with thin oxide films thermally nitrided in NH3gas ambient at different temperatures and for different times have been fabricated. The effects of nitridation temperature and time on the properties of the thin nitrided oxide films have been examined and analyzed by using a constant current stress. It is found that the oxide films nitrided at 900°C exhibit much improved total charge to breakdown and interface trap generation if proper nitridation time is used. The superior characteristics of the fabricated nitrided oxide films using the proposed optimum conditions are suitable for existing CMOS/VLSI applications.     

薄栅氧化层击穿特性的实验研究

在恒流应力条件下测试了薄栅氧化层的击穿特性,研究了ＴＤＤＢ的击穿机理,讨论了栅氧化层面积对击穿特性的影响．对相关击穿电荷ＱＢＤ进行了实验测试和分析,研究结果表明：相关击穿电荷ＱＢＤ除了与氧化层质量有关外,还与应力电流密度以及栅氧化层面积强相关．得出了ＱＢＤ的解析表达式,并且对相关参数进行了研究     

Characterization of charge trapping and high-field endurance for15-nm thermally nitrided oxides

Device-quality gate oxides have been nitrided using both rapid thermal processing and conventional furnace treatment. Charge trapping and high-field endurance including breakdown field and time-dependent dielectric breakdown, are investigated in detail. It is found that proper nitridation can eliminate positive charge accumulation in oxides, increase charge to breakdown, suppress high-field injection-induced interface state generation, and decrease the dependence of the breakdown field on the gate area as a result of the reduced density of microdefects. Experimental results show that although both the density and capture cross-section of the bulk and interface traps increased by nitridation, the combined effects of bulk and interface traps induced by high-field injection can improve the stability of the flatband voltage. For lightly nitrided oxides, the trap generation rate is greatly decreased as compared with the as-grown oxide. Not only are the density and capture cross-section of the traps affected by nitridation, but also the locations of the trapped-charge centroids are changed. The experimental results for postnitridation annealing suggest that these property modifications most likely result from nitridation-induced structural changes rather than hydrogenation alone     

Degradation of insulators in Silicon Selective Epitaxial Growth(SEG) ambient

The degradation of various insulators in Silicon Selective Epitaxial Growth (SEG) ambient was studied. The insulators studied were thermal oxide, reoxidized nitride/oxide stack, poly-oxide, and nitrided oxide. Breakdown electric fields of MIS capacitors were measured and yields were calculated before and after the insulators were exposed to Silicon SEG ambient. It was found that the nitrided oxide was more resistant to degradation in the SEG ambient than thermal and poly oxide; results reported here for the first time. The increased resistance of nitrided oxide in SEG ambient coupled with their superior performance as thin gate insulators makes them an excellent candidate for use in novel 3-D structures using selective silicon growth     

Theoretical analysis of HEMT breakdown dependence on device designparameters

A two-dimensional numerical analysis is presented to investigate the breakdown characteristics of single- and double-channel AlGaAs/GaAs HEMTs. The influence of the doped layer thickness and the thickness of an undoped i-layer under the gate is analyzed. Impact ionization is considered to be the dominant breakdown mechanism. All simulations reveal the existence of a high electric field region near the gate contact. Breakdown occurs in the gate-drain region and the (breakdown) path which maximizes the ionization integral is entirely in the AlGaAs layer. For increased donor layer thickness, single-channel devices biased near pinchoff have gate-drain breakdown voltages varying from 8 to 14 V with corresponding peak electric field values in the range of 8.2×10⁵ to 2.4×10⁶ V/cm. The breakdown voltage increases with increasing gate bias |V _gs| due to a screening effect of transverse from longitudinal electric field. Double-channel HEMTs have slightly higher breakdown than single-channel, especially near pinchoff and for thin donor layers     

Channel thickness dependence of breakdown dynamic in InP-based lattice-matched HEMTs

We have investigated, by using Monte Carlo simulations, the effects of channel thickness on the breakdown dynamics in InP-based lattice-matched HEMTs (LM-HEMTs). Breakdown is due to the parasitic bipolar action of holes generated by impact ionization and accumulated in the low electric field regions near the source. Our results show that channel shrinking results in an increase in time-to-breakdown values due to holes real-space-transfer effects occurring in thin channel devices. The breakdown behavior of thin-channel devices (channel thickness /spl les/20 nm) is dominated by the accumulation of holes in the InAlAs buffer layer; in thick-channel devices breakdown is due to the parasitic bipolar action of holes accumulating in the InGaAs channel. These results suggest a frequency dependence of breakdown which can be relevant for power rf device applications and/or in the study of device survivability to rf overstress.     

超薄栅氧化层中的软击穿的击穿机理和击穿模型

软击穿是与氧化层质量密切相关的一种新的击穿形式。当氧化层厚度小于5nm时,软击穿效应显著,是超薄栅氧化层的主要失效机理。通过对国外软击穿研究状况的分析,对超薄栅氧化层中软击穿的失效模型和机理进行了综述。