On the design of asynchronous optical packet switch architectures with shared delay lines and converters

Optical packet switching (OPS) is a promising technology to enable next-generation high-speed IP networks. A major issue in OPS is packet contention that occurs when two or more packets attempt to access the same output fiber. In such a case, packets may be dropped, leading to degraded overall switching performance. Several contention resolution techniques have been investigated in the literature including the use of fiber delay lines (FDLs), wavelength converters (WCs), and deflection routing. These solution typically induce extra complexity to the switch design. Accordingly, a key design objective for OPS is to reduce packet loss without increasing switching complexity and delay. In this paper, we investigate the performance of contention resolution in asynchronous OPS architectures with shared FDLs and WCs in terms of packet loss and average switching delay. In particular, an enhanced FDL-based and a novel Hybrid architecture with shared FLDs and WCs are proposed, and their packet scheduling algorithms are presented and evaluated. Extensive simulation studies show that the performance of proposed FDL-based architecture outperforms typical OPS architectures reported in the literature. In addition, it shown that, for the same packet loss ratio, the proposed hybrid architecture can achieve up to 30% reduction in the total number of ports and around 80% reduction in the overall length of fiber as compared to the FDL-based architectures.     

Performances of the Data Vortex switch architecture under nonuniform and bursty traffic

The Data Vortex switch architecture has been proposed as a scalable low-latency interconnection fabric for optical packet switches. This self-routed hierarchical architecture employs synchronous timing and distributed traffic-control signaling to eliminate optical buffering and to reduce the required routing logic, greatly facilitating a photonic implementation. In previous work, we have shown the efficient scalability of the architecture under uniform and random traffic conditions while maintaining high throughput and low-latency performance. This paper reports on the performance of the Data Vortex architecture under nonuniform and bursty traffic conditions. The results show that the switch architecture performs well under modest nonuniform traffic, but an excessive degree of nonuniformity will severely limit the scalability. As long as a modest degree of asymmetry between the number of input and output ports is provided, the Data Vortex switch is shown to handle very bursty traffic with little performance degradation.     

具有反馈式光缓存的OPS节点结构性能研究

对反馈式光分组交换节点的性能进行深入分析,并针对现有反馈式光分组交换节点结构的不足,提出一种改进的反馈式光分组交换节点结构,即SMOP-TWC交换结构.最后,本文使用仿真实验的方法对SMOP-TWC交换结构的性能进行深入研究.     

Performance of a nonblocking space-division packet switch withcorrelated input traffic

This work studies the performance of a nonblocking space-division packet switch in a correlated input traffic environment. In constructing the input traffic model, the author considers that each input is a time division multiaccess (TDM) link connecting to multiple sources. Every source on a link supports one call at a time. Each call experiences the alternation of ON and OFF periods, and generates packets periodically while in ON period. The stochastic property of each call does not have to be identical. Packets from each individual call are destined to the same output. The output address of each call is assumed to be uniformly assigned at random. The author derives both upper and lower bounds of the maximum throughput at system saturation. His study indicates that, if the source access rate is substantially lower than the link transmission rate, the effect of input traffic correlation on the output contentions can generally be ignored. Also, the analysis of each input queue becomes separable from the rest of the switch. The same study is carried out with nonuniform call address assignment     

Delay-bounded packet scheduling of bursty traffic over wireless channels

In this paper, we study minimal power transmission of bursty sources over wireless channels with constraints on mean queuing delay. The power minimizing schedulers adapt power and rate of transmission based on the queue and channel state. We show that packet scheduling based on queue state can be used to trade queuing delay with transmission power, even on additive white Gaussian noise (AWGN) channels. Our extensive simulations show that small increases in average delay can lead to substantial savings in transmission power, thereby providing another avenue for mobile devices to save on battery power. We propose a low-complexity scheduler that has near-optimal performance. We also construct a variable-rate quadrature amplitude modulation (QAM)-based transmission scheme to show the benefits of the proposed formulation in a practical communication system. Power optimal schedulers with absolute packet delay constraints are also studied and their performance is evaluated via simulations.     

A high-performance two-stage packet switch architecture

This paper contributes a distributed packet controller which reduces queueing to a single stage in two-stage packet switches. Software and neural network based controllers are described. Simulations under a range of traffic conditions for a 1024×1024 switch size shows the simplest architecture has the best performance     

Modified RED gateways under bursty traffic

We propose modified random early detection (MRED) gateways for congestion avoidance in TCP/IP networks. MRED aims at providing better control over the burstiness level while remaining the advantages of RED. We use ns2 to simulate a series of network configurations and the numerical results demonstrate that MRED can achieve higher link utilization compared to RED without sacrificing its advantages in all simulation scenarios. The improvement becomes more significant under bursty traffic.     

A new analytical model for the CQ switch throughput calculation under the bursty traffic

In this paper we propose a new analytical iterative method for the throughput calculation of the Crosspoint Queued (CQ) switch with a random scheduling algorithm under the bursty traffic model. This method is verified by comparing it with the simulation results, which shows a very good match. To the authors’ knowledge, this is the first analytical method for the throughput calculation of such a switch for the bursty traffic model.     

Performance evaluation of multiple input-queued ATM switches withPIM scheduling under bursty traffic

In this letter, we analyze the performance of multiple input-queued asynchronous transfer mode (ATM) switches that use parallel iterative matching (PIM) for scheduling the transmission of head-of-line cells in the input queues. A queueing model of the switch is developed under independently, identically distributed, two-state Markov modulated Bernoulli processes bursty traffic. The underlying Markov chain of the queueing model is a quasi-birth-death (QBD) chain. The QBD chain is solved using an iterative computing method. Interesting performance metrics of the ATM switch such as the throughput, the mean cell delay, and the cell loss probability can be derived from the model. Numerical results from both the analytical model and simulation are presented, and the accuracy of the analysis is briefly discussed     

Wavelength allocation in an optical switch with a fiber delay line buffer and limited-range wavelength conversion

This paper presents an approach to evaluate the performance of an optical switch equipped with both limited-range wavelength conversion and Fiber Delay Lines to resolve contention. We propose an analytical model that allows a general behavior for the packet size distribution while the inter-arrival times are assumed to be of Phase-Type and can easily be relaxed to be generally distributed if needed. As the set of reachable wavelengths is a major issue in limited-range wavelength conversion, we first focus on a simple wavelength set configuration that allows the comparison of different policies and their effect on the loss rate of the system. In addition, a linear association between the loss rate of the simple and a more complex set configuration is identified. Using this association and the results from the analytical model, we derive an approximation for the more complex case, where the interactions among adjacent wavelengths play an important role. The approximation works well for different parameter instances and is particularly useful for the mid load case, when simulations become computationally prohibitive.     

A 5 bit fiber delay line based on magneto-optic switch

In order to fulfill the reliability requirements in field application, the high reliability magneto-optic (MO) switches are used to realize an optical true time delay (OTTD) line. This paper first analyzes the characteristics of MO switch, then the topologies of OTTD are analyzed. Latter, two key supporting aspects are put forward, including measuring method and integrated structure design. In this article, we present and demonstrate a 5 bit optical fiber delay line (FDL) based on MO switches and fiber. The FDL exhibits the maximal delay error of 2.98 ps in 32 states.     

Buffer sizing for synchronous self-routeing broadband packet switches with bursty traffic

Previous studies on the performance of synchronous self-routeing packet switches have assumed that the input traffic is random, i.e. there is no correlation between adjacent packet arrivals. This assumption is generally not valid in the data communication environment (e.g. host-to-host communication) where a file transfer usually generates a string of correlated packets. The consequence is that the random traffic assumption greatly underestimates the buffer requirement of the switch. In this paper, we model each input traffic stream as a binary source as a first step to understand the performance of a packet switch in a bursty traffic environment. We found that, given a fixed traffic load (or switch utilization), the required buffer size increases linearly as the burstiness index (the average burst length) of the traffic increases. In addition, the required buffer size is more sensitive to the burstiness of the traffic, when the average traffic load is higher and when the packet loss requirement is more stringent. Initial applications of broadband packet switches are likely to be the interconnections of LANs and hosts. The results of the study indicate that the high burstiness in certain broadband traffic significantly reduces the allowable switch utilization, given a fixed amount of buffers. To increase the switch utilization, an appropriate congestion control mechanism needs to be implemented.     

Service differentiation using shared fiber delay line bank in OBS networks

A new algorithm is proposed using the feed-forward type shared FDL bank to achieve service differentiation in optical burst switching networks, which is composed of many fiber delay lines. In our scheme, the proposed algorithm divides a shared FDL bank into sub-groups, and the different sub-group reservation policies for each class are related to each other. By doing so, the algorithm can accomplish service differentiation easily. The optimal number of delay lines for each sub-group is decided by the algorithm. The scheme is verified through extensive simulations and numerical analysis.     

X波段光纤延迟线光纤分系统的设计与实现

光路部分是光纤延迟线信号延迟的主要组成部分, 为了降低光学损耗、提高系统性能 、精简优化组成结构,提出了一种X波段光纤延迟线光纤分系统的设计方案。首先进行系统 整体结构设计,结合光纤的膨胀效应及改进后的马库塞公式,建立了光纤的弯曲半径模型并 进行分析计算。然后依据计算结果,针对光纤长度及实际生产精度等对光路部分的主体结构 进行了设计与实现、对绕制光纤的传输特性进行了理论分析及计算。最后,将光纤分系统放 入系统整体结构 中,利用矢量网络分析仪对系统的传输性能进行了测试分析,结果表明,光 纤的插入损耗在－38.56 dB到－39 dB之间、 幅度平坦度≤±1.5 dB、温度漂移时的增益变化幅 度小于±1dB,系统性能稳定、工作可靠,基本满足光纤延迟线信号传输的指标及误差范围 。     

两级交换机中分组有序到达算法研究

为了提高高性能分组交换机的扩展性,张尚正等人提出了一种称为负载平衡交换机(load-balancedswitch)的交换结构,该交换机分为两级交换结构,每一级都采用一种时序固定的连接方式,具有良好的扩展性;同时可以提供100%吞吐量保证。但是,负载平衡交换机的基本结构会出现分组乱序的情况。本文提出了一种在两级负载平衡交换机中保证分组顺序到达的满帧填充算法,该算法具有良好的交换特性(平均时延及吞吐量),同时也是一种分布式算法,各个端口可以独立地进行操作。     

Performance of A prioritized non-blocking switch under hotspot traffic conditions with head of line resolution

In this paper, we pursue a performance analysis under hotspot traffic conditions of a four-level prioritized non-blocking baseband switch for use on board a switching multibeam satellite. Both finite input and output buffering as well as speed-up are employed to reduce the loss which is critical in a satellite application. In addition, in order to improve the performance of the two lowest priority users a head of line resolution (HLR) technique is implemented. It is shown that with HLR and the proper adjustment of the switch speed-up and the input and output buffers the loss can be substantially reduced. It is also shown that the dependence on the switch size which is characteristic of the unbuffered discard case is substantially reduced, even in a prioritized environment, allowing larger switches to be implemented.     

Performance of a nonblocking space-division packet switch in a timevariant nonuniform traffic environment

The authors study the performance of a nonblocking space-division packet switch, given that the traffic intensities at the switch not only are nonuniform but also change as a function of time. A finite-state Markov chain is used as an underlying process to govern the time variation of traffic for the entire switch. The packet arrivals at each input form an independent Bernoulli process modulated by the underlying Markov chain. The output address of each packet is independently and randomly assigned with probability distributions, which are also modulated by the Markov chain. Provided that the traffic on each output is not dominated by individual inputs the service time of each output queue for sufficiently large switches can be characterized by an independent Markov modulated phase-type process. A matrix geometric solution for the resultant quasi-birth-death type queuing process is presented. The maximum throughput is obtained at the system saturation. The performance of the switch is numerically examined under various traffic conditions. A contention priority scheme to improve the switch performance is proposed     

光纤延迟线编/解码器的研究

在光码分多址（ＣＤＭＡ）通信中,光延迟线编／解码器是实现全光编／解码的关键技术．本文对并行结构的光纤延迟线编／编码器的原理及构造方法进行了分析,并给出相应的实验结果。     

光纤延迟线编解码器的设计

光纤延迟线编码解器作为光码分多址系统时域编解码的基本器件,它起的作用是对光脉冲进行延时编码,同时也会给系统带来别的问题。例如：功率分离,延时损耗,温度抖动等。本文介绍了编码器的设计,同时对以上问题进行了分析,得出的结论包括：设计时必须考虑温度的影响,系统的损耗随着码重和用户数的增加而增加。这些可以对系统的设计提供一个参考。