共查询到20条相似文献,搜索用时 0 毫秒
1.
The letter suggests how a Cockroft-Walton voltage multiplier can be generalised to be driven by multiphase square waves. 相似文献
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An idea is investigated that combines traditional voltage-based logic with recently presented current-mode logic into one architecture. The combined implementation constitutes a hybrid multiplier. Each logic mode contains attributes that compensate for undesirable characteristics incorporated into the alternative technology 相似文献
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《Solid-State Circuits, IEEE Journal of》1971,6(3):132-135
An expression for the equivalent source resistance of the capacitor diode voltage multiplier circuit is derived. The source resistance is found to increase as the cube of the multiplication factor, explaining the poor regulation observed with large multiplication. The distribution of capacitors that minimizes source resistance is presented. Good regulation is shown to be necessary for high efficiency, and to require relatively larger capacitors than needed for ripple filtering. 相似文献
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A small-signal model of the parallel-plane vacuum diode is determined by employing the Lindholm?Hamilton systematic modelling theory. 相似文献
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Compact low voltage four quadrant CMOS current multiplier 总被引:2,自引:0,他引:2
A new compact low voltage four quadrant current mode CMOS multiplier is presented. Post layout simulation in a CMOS 0.5 μm technology shows a linearity error lower than 0.9% for signal swings up to ±50 μA. The circuit operates at a supply of ±1.5 V, has a static power dissipation of 0.6 mW and a 1 dB bandwidth of 33 MHz 相似文献
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Optical voltage sensor based on electrooptic crystal multiplier 总被引:3,自引:0,他引:3
A novel optical voltage sensor based on the electrooptic crystal multiplier is proposed and experimentally investigated. Different from the conventional bulk-type optical voltage sensor, the optical sensing unit is simply composed of an electrooptic crystal and two polarizers and does not need quarter wave-plate. By using different modulation approaches, both ac and dc voltages can be measured with controllable sensitivity and measurement range. The effective value of ac voltage can also be measured with nonmodulation approach. The dc voltage from 0.1 to 120 V and 50 Hz ac voltage from 0.05 to 100 V have been measured with good linearity. The potential applications of the proposed voltage sensor include the low voltage measurement in the field of electromagnetic compatibility and the high voltage measurement in electric power industry. 相似文献
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M.S. Shur 《Solid-state electronics》1979,22(8):723-728
Simple analytical expressions are derived for the drain-to-gate feedback capacitance, for the gate-to-source input capacitance, for the equivalent domain capacitance and the equivalent domain resistance for a GaAs metal-semiconductor field-effect transistor (MESFET). The equivalent circuit parameters are related to the material parameters such as the doping density, the dielectric constant, the low-field mobility, the diffusion coefficient, the built-in voltage and to the design parameters such as the gate length, the gate periphery, the active layer thickness, etc. The results which are in good agreement with the results of Willing et al. [4] may be used for a computer-aided design of GaAs power amplifiers and logic circuits. 相似文献
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The small-signal model for a multiple-output forward power converter with weighted voltage control is derived. The effects of the weighting factors on the small-signal behavior are investigated. In addition, the small-signal characteristics of weighted voltage control are compared with the characteristics of a multiple-output power converter with coupled output-filter inductors. Finally, the effects of weighted voltage control on the small-signal characteristics of the converter with coupled inductors are examined. Based on the analysis, the design procedure for loop compensation is presented. The small-signal model and the design procedure are verified on an experimental two-output forward power converter 相似文献
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Small-signal and temperature noise model for MOSFETs 总被引:1,自引:0,他引:1
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An analog multiplier driven by a single supply voltage is proposed. Some improvements are introduced so as to get a higher performance. The proposed analog multiplier can work precisely in four quadrants with a very small THD. An added OTA keeps the linearity error of the circuit smaller than 1%. The presented multiplier is designed on the 0.6???m BCD process and the simulation results by HSPICE shows a perfect performance. It can be used in any system that requires a high performance analog multiplier. 相似文献
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Gallium nitride (GaN) high electron mobility transistor (HEMT) with symmetrical structure as a control device is discussed in this paper. The equivalent circuit model is proposed on the basis of physical and electrical properties of the GaN HEMT device. A transistor with 0.5 μm gate length and 6 × 125 μm gate width is fabricated to verify the model, which can be treated as a single pole single throw (SPST) switch due to the ON state and OFF state. The measurement results show a good agreement with the simulation results, which demonstrates the effectiveness of the proposed model. 相似文献
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A distributed modelling approach for micro- and millimetre-wave FETs is presented. Model identification is directly carried out on the bases of S-parameter measurements and electromagnetic analysis of the device layout without requiring cumbersome optimisation techniques. Experimental results confirm that the model is consistent with device scaling 相似文献
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Analogue OTA multiplier without input voltage swing restrictions, and temperature-compensated 总被引:2,自引:0,他引:2
An analogue multiplier with operational transconductance amplifiers (OTAs) is presented. It overcomes the typical problems of previous OTA multipliers: limited input voltage swings and temperature dependence. It uses a minimum number of resistive components, and only two of them are critical in their performance. A simple temperature compensation scheme for the OTA multiplier is introduced. 相似文献
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《Microelectronics Reliability》2015,55(1):107-113
Process and temperature invariant voltage multiplier performance has been examined. The analytical predictions of ripple voltage and frequency response are in good agreement with ADS simulation results. In addition, a threshold voltage compensation scheme is investigated to improve the output voltage sensitivity against process variations and temperature fluctuation. The threshold voltage compensation technique effectively reduces the temperature and process variability on the voltage multiplier performance. 相似文献
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Small-signal charge transfer inefficiency experiments explained by the McWhorter interface state model 总被引:1,自引:0,他引:1
《Electron Devices, IEEE Transactions on》1984,31(10):1454-1462
The small-signal charge transfer inefficiency (SCTI) of a surface-channel CCD has been studied. The experimentally observed behavior of the SCTI could not be explained by the conventional interface state model. Using the McWhorter model for the interface states, which assumes a distribution of the states in the oxide perpendicular to the interface, an excellent agreement between theory and experiment is obtained. Essentially, this is due to the fact that in the McWhorter model a spectrum of capture cross sections is associated with each energy level. No evidence for the edge effect has been found in devices with a channel width above 50 µm. 相似文献
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On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique 总被引:5,自引:0,他引:5
《Solid-State Circuits, IEEE Journal of》1976,11(3):374-378
An improved voltage multiplier technique has been developed for generating +40 V internally in p-channel MNOS integrated circuits to enable them to be operated from standard +5- and -12-V supply rails. With this technique, the multiplication efficiency and current driving capability are both independent of the number of multiplier stages. A mathematical model and simple equivalent circuit have been developed for the multiplier and the predicted performance agrees well with measured results. A multiplier has already been incorporated into a TTL compatible nonvolatile quad-latch, in which it occupies a chip area of 600 /spl mu/m/spl times/240 /spl mu/m. It is operated with a clock frequency of 1 MHz and can supply a maximum load current of about 10 /spl mu/A. The output impedance is 3.2 M/spl Omega/. 相似文献