32位嵌入式系统中扩展精度数学算法实现

提出了一种32位嵌入式系统中应用的扩展精度数学算法。适用于缺乏数字协处理器硬件支持并且软件浮点运算达不到系统时间要求的系统。算法运算数据精度高、扩展性好。介绍了32位乘法、除法、开方算法以及64位加法、减法、乘法算法。     

Machine cycle simulator for a microprocessor

The technique used in the construction of a simulator for a processor affects the range of applications for which the simulator can be used. A machine cycle simulator has been constructed for the MC68000 microprocessor, and some of the advantages of this technique are discussed.     

16-bit operating systems

16-bit microprocessors have only recently begun to be considered for applications. Now the advantages they can offer for colour graphics and input without keyboards make them competitive with the already established 8-bit devices. This review of 16-bit operating systems covers design features, functions, resources and various problems that arise when several processes occur in one operating system.     

MC微控器在汽车CAN/LIN网关中的应用

结合汽车车身网络的特点,提出了一种基于MC68HC908GZ32微控制器的汽车CAN/LIN网关应用方案.给出了具体的硬件设计电路及通信软件,说明了网关工作流程.经实验验证,网络运行较为稳定,可正确收发CAN/LIN报文,实现高速及高可靠性网关通信功能.     

The Gmicro/300 32-bit microprocessor

A high-end microprocessor, the Gmicro/300, based on the TRON architecture specification is described. In contrast to other RISC (reduced-instruction-set-computer) or CISC (complex-instruction-set-computer) chips, it executes an instruction with a memory operand and a register operand in one clock cycle. Separate cache memories improve performance more than 13.8%. The Gmicro/300's pipeline structure, its other one-cycle structures, and the effects of using internal caches are discussed     

Multichannel software event counter for the MC6809

Software can provide a cheap means of counting low-frequency events such as egg laying. A counting technique and driver program for this example are described.     

Switched memory for multiprocessor MC6809E systems

An increasing interest is being shown in the use of multimicroprocessor systems in a variety of applications. It is often desirable that the constituent processors have a fast communications link for the sharing of data and/or results. Both of these aims can be achieved by the sharing of blocks of memory between the two or more processors; this method has the added advantage of little, or in some cases no, software overhead. The design of a shared memory system for Motorola MC6809E microprocessors is presented.     

The TX1 32-bit microprocessor: performance analysis, and debuggingsupport

The 32-bit TX1 microprocessor, developed to meet the architectural specification of Japan's TRON (The Real-Time-Operating Nucleus) project, has been given a loosely coupled pipeline structure to meet the demands of high-performance systems. The authors discuss the design architecture of the TX1, provide some performance analysis for the design, and describe the debugging feature provided on the processor. Results for several benchmark programs show that the average performance of the TX1 is over 5 MIPS (million instructions per second)     

基于MC68HC908GP32的深海热液多点温度、压力采集及控制系统

为了实现深海热液采样器对深海热液的数据采集及控制,设计了一种多点温度、压力采集及步进电机、电磁阀控制系统。该系统用MOTOROLA单片机MC68HC908GP32进行数据处理和控制。测温范围0～500℃,测压范围0～45Mpa,由数码管实时显示并存储至EEPROM,也可与PC机通信做更复杂的数据处理。同时通过继电器控制电磁阀吸合,并实时调整步进电机转速。     

基于MC68HC908GZ32的CAN-LIN网关设计

根据某微型车的特点,提出了一个具有高低速CAN网络及LIN网络的整体汽车网络构架方案;使用Freescale公司8位微控制器MC68HC908GZ32设计实现了CAN-LIN网关,并且作为一个CAN节点实现了对电动后视镜的控制等节点功能,给出了其软硬件设计.该设计用于某微型车车身网络中的网关已测试成功.     

32位RISC微处理器FPGA验证平台设计与实现

微处理器的验证工作是一项复杂而重要的工作。针对传统的FPGA验证在板级验证过程中存在不能快速定位错误和调试方法单一等问题,同时结合“龙腾R2”微处理器的验证需求,设计了“龙腾R2”微处理器的FPGA验证平台,在该验证平台上成功进行了指令和VxWorks操作系统的测试。实践表明该验证平台大大缩短了验证周期,整个验证平台原理清晰,结构简单,扩展灵活、方便。     

MC9S12UF32的嵌入式文件系统数据存储模块

随着嵌入式技术的发展,越来越多的系统需要具备大容量数据存储、传输和分析的功能,对于数据灵活性和通用性的要求也随之提高。本文基于MC9S12UF32设计了一款使用FAT文件系统对数据进行管理的数据存储模块。详细介绍了该模块的软、硬件构架,并给出了开放源代码的文件系统FatFs软件包的移植与使用方法。     

MC68HC908GP32单片机编程器的设计与实现

在分析Motorola M68HC08系列MCU的Flash存储器编程模式基础上，提出了MC68HC908HP32芯片的一种简明而实用的编程器设计方案，给出了基本设计思想，硬件设计电路，软件设计框架，并与Motorola公司提供的电路进行了对比分析。     

Highly serial architecture for a microprocessor

The paper describes the derivation of an architecture for a microcomputer intended for educational applications. The derivation of the microprogrammable architecture given is followed by one possible instruction set and format of the computer for the user. The microinstructions and their sequence that achieve this view for the user are described in some detail. The architecture is fluid and not only is the microinstruction sequence defined by programmable elements but also a programmable element defines the meanings of the microinstructions and many of the interconnections within the processor. Wherever possible steps have been taken to minimize chip area usually by sacrificing parallel for serial operation.     

基于24位AD自然电位法海底探矿系统研究

为了测量近海底矿物和矿石产生的微弱自然电场信号,设计了一种灵敏的海底自然电位法检测系统。该系统前端采用精密仪表放大器INA118对来自碳电极的微弱电场信号进行一级差分放大,后级采用内置PGA的24位高精密的A/D转换器ADS1256对电场信号进行二级放大和A/D转换。主控制器采用32位ARM内核微处理器STM32,将采集的数据存放在SD卡中。本系统通过了"大洋一号"科考船在南海海试的验收,并已在第26次大洋科考中用于海底热液硫化物勘探。     

Using a microprocessor in high performance liquid chromatography

The background and use of a microprocessor-controlled liquid chromatograph to carry out the automatic optimization of high performance liquid chromatography (HPLC) separations is discussed. The procedure is based upon the use of the modified sequential simplex algorithm to select the optimum composition of a three component mobile phase. The way in which the simplex algorithm is incorporated into a program and the hardware used is described. The use of this approach provides the chromatographer with the ability to optimize HPLC separations without requiring either extensive theoretical knowledge or a great expenditure of time and effort.     

32位和8位单片机的无线传感器网络系统

采用STM32F10X系列的芯片为主芯片、SH79F32为辅芯片,温度传感器DS18B20做采集工具,PTR8000无线模块做通信工具,实现无线传感器网络功能。通过Altium Designer Release 10进行原理图设计及PCB板的绘制,并制作电路板、焊接电路板,之后利用Keil软件设计程序,实现不同单片机之间的无线传感器网络通信,并完成了无线通信平台的设计与制作。     

32位微处理器中存储管理单元的全定制设计

介绍了一种支持32位精简指令集处理器中页式地址管理的存储管理单元（MMU）的设计与实现。该单元实现了完整的虚实地址转换功能和保护机制,支持固定映射和地址转换旁路缓冲器转换两种模式。该单元基于全定制设计方式完成设计,采用中芯国际0.18 μm工艺。两次流片后的测试结果表明,采用此设计的32位微处理器可以正常地完成所定义的各类存储管理功能,可以正常地启动和运行Linux操作系统。     

Application of a microprocessor to monitor a destructive test machine

The need to monitor the minimum and maximum load or extension being applied to a test specimen in cyclic loading on a destructive test machine arose in work on stress analysis. Specialized techniques were developed to achieve this aim. The techniques employed and the microprocessor-controlled monitor developed to detect, track, display and record the loading characteristics as they were applied during the test are described.Use of a microprocessor allows additional features to be readily incorporated. The inclusion of adequate processing in the actual design is valuable. An IEEE standard interface bus permits communication directly to service computers. Additional outputs allow warning of imminent conditions and indications of the rate of progress in a particular test.Post design modifications via software can be applied and the real possibility of making this inhouse manual destructive test machine perform destructive tests under microprocessor control is now possible.